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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.17 98.22 96.03 97.44 93.22 98.38 98.17 98.73


Total test records in report: 3905
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T314 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.3601423329 Sep 09 10:17:38 AM UTC 24 Sep 09 10:17:40 AM UTC 24 264865843 ps
T302 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.3523753175 Sep 09 10:17:38 AM UTC 24 Sep 09 10:17:41 AM UTC 24 285088012 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.1284015282 Sep 09 10:17:38 AM UTC 24 Sep 09 10:17:41 AM UTC 24 545832173 ps
T3214 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.2434821345 Sep 09 10:17:38 AM UTC 24 Sep 09 10:17:41 AM UTC 24 711892060 ps
T3215 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.2028876204 Sep 09 10:17:38 AM UTC 24 Sep 09 10:17:41 AM UTC 24 866097611 ps
T3216 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.3547952481 Sep 09 10:17:22 AM UTC 24 Sep 09 10:17:42 AM UTC 24 1973431186 ps
T309 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.2536071609 Sep 09 10:17:40 AM UTC 24 Sep 09 10:17:42 AM UTC 24 249858121 ps
T598 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.2927067362 Sep 09 10:17:40 AM UTC 24 Sep 09 10:17:42 AM UTC 24 230604987 ps
T3217 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.560736756 Sep 09 10:17:40 AM UTC 24 Sep 09 10:17:42 AM UTC 24 275551665 ps
T523 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.262072159 Sep 09 10:17:40 AM UTC 24 Sep 09 10:17:42 AM UTC 24 429103353 ps
T3218 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.2353463189 Sep 09 10:17:40 AM UTC 24 Sep 09 10:17:43 AM UTC 24 429716790 ps
T3219 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.429110907 Sep 09 10:17:40 AM UTC 24 Sep 09 10:17:43 AM UTC 24 620325185 ps
T3220 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1477186320 Sep 09 10:17:40 AM UTC 24 Sep 09 10:17:43 AM UTC 24 633644568 ps
T3221 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.1599878236 Sep 09 10:17:30 AM UTC 24 Sep 09 10:17:43 AM UTC 24 1636527603 ps
T463 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.3544297976 Sep 09 10:17:40 AM UTC 24 Sep 09 10:17:43 AM UTC 24 707043772 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.172020255 Sep 09 10:17:41 AM UTC 24 Sep 09 10:17:44 AM UTC 24 251820318 ps
T573 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.2187072130 Sep 09 10:17:41 AM UTC 24 Sep 09 10:17:44 AM UTC 24 301470529 ps
T3222 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.3546063258 Sep 09 10:17:10 AM UTC 24 Sep 09 10:17:44 AM UTC 24 20531340078 ps
T3223 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.1248248031 Sep 09 10:17:41 AM UTC 24 Sep 09 10:17:44 AM UTC 24 188222129 ps
T395 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.1615476681 Sep 09 10:17:41 AM UTC 24 Sep 09 10:17:44 AM UTC 24 250082691 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.2667409908 Sep 09 10:17:41 AM UTC 24 Sep 09 10:17:44 AM UTC 24 482114558 ps
T3224 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.1474089652 Sep 09 10:17:41 AM UTC 24 Sep 09 10:17:44 AM UTC 24 550824830 ps
T3225 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.2527525334 Sep 09 10:17:41 AM UTC 24 Sep 09 10:17:44 AM UTC 24 591436012 ps
T3226 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.3571271534 Sep 09 10:16:19 AM UTC 24 Sep 09 10:17:45 AM UTC 24 3351937163 ps
T3227 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.2969237919 Sep 09 10:17:43 AM UTC 24 Sep 09 10:17:45 AM UTC 24 171783036 ps
T376 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.2303757322 Sep 09 10:17:43 AM UTC 24 Sep 09 10:17:45 AM UTC 24 164049289 ps
T464 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.579181896 Sep 09 10:17:43 AM UTC 24 Sep 09 10:17:46 AM UTC 24 179554964 ps
T3228 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.640160224 Sep 09 10:17:10 AM UTC 24 Sep 09 10:17:46 AM UTC 24 24308872971 ps
T525 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.734312882 Sep 09 10:17:43 AM UTC 24 Sep 09 10:17:46 AM UTC 24 433375739 ps
T3229 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.1884659689 Sep 09 10:17:43 AM UTC 24 Sep 09 10:17:46 AM UTC 24 501046202 ps
T3230 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.4152713335 Sep 09 10:17:43 AM UTC 24 Sep 09 10:17:46 AM UTC 24 619426418 ps
T476 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.3489865198 Sep 09 10:17:43 AM UTC 24 Sep 09 10:17:46 AM UTC 24 523504306 ps
T3231 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.3830971145 Sep 09 10:17:43 AM UTC 24 Sep 09 10:17:46 AM UTC 24 573357696 ps
T3232 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.4253030906 Sep 09 10:17:29 AM UTC 24 Sep 09 10:17:46 AM UTC 24 10254649622 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.2062976297 Sep 09 10:17:45 AM UTC 24 Sep 09 10:17:47 AM UTC 24 172783128 ps
T3233 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.1960007181 Sep 09 10:17:50 AM UTC 24 Sep 09 10:17:52 AM UTC 24 249234964 ps
T562 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.1964586339 Sep 09 10:17:45 AM UTC 24 Sep 09 10:17:47 AM UTC 24 327061198 ps
T3234 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2670206902 Sep 09 10:17:45 AM UTC 24 Sep 09 10:17:48 AM UTC 24 168756280 ps
T3235 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.1991207256 Sep 09 10:17:46 AM UTC 24 Sep 09 10:17:48 AM UTC 24 265093442 ps
T538 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.745024072 Sep 09 10:17:46 AM UTC 24 Sep 09 10:17:48 AM UTC 24 304838790 ps
T3236 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.249057865 Sep 09 10:16:52 AM UTC 24 Sep 09 10:17:48 AM UTC 24 31464368424 ps
T365 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.1999007347 Sep 09 10:17:46 AM UTC 24 Sep 09 10:17:48 AM UTC 24 271175270 ps
T3237 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.3352903661 Sep 09 10:17:45 AM UTC 24 Sep 09 10:17:48 AM UTC 24 469821168 ps
T304 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.4133785665 Sep 09 10:17:46 AM UTC 24 Sep 09 10:17:48 AM UTC 24 276304336 ps
T481 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.3314056521 Sep 09 10:17:46 AM UTC 24 Sep 09 10:17:48 AM UTC 24 558894095 ps
T3238 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.2745389651 Sep 09 10:17:45 AM UTC 24 Sep 09 10:17:48 AM UTC 24 550013909 ps
T578 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.2453938319 Sep 09 10:17:46 AM UTC 24 Sep 09 10:17:48 AM UTC 24 453975316 ps
T3239 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.10947065 Sep 09 10:17:46 AM UTC 24 Sep 09 10:17:48 AM UTC 24 583581561 ps
T3240 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.3270922792 Sep 09 10:17:15 AM UTC 24 Sep 09 10:17:49 AM UTC 24 4366643298 ps
T3241 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.1033916597 Sep 09 10:17:46 AM UTC 24 Sep 09 10:17:49 AM UTC 24 609538823 ps
T3242 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3713028282 Sep 09 10:17:24 AM UTC 24 Sep 09 10:17:49 AM UTC 24 19888782290 ps
T563 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.1159373729 Sep 09 10:17:47 AM UTC 24 Sep 09 10:17:49 AM UTC 24 183126202 ps
T3243 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.1751812115 Sep 09 10:17:47 AM UTC 24 Sep 09 10:17:49 AM UTC 24 186672499 ps
T3244 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.2591562778 Sep 09 10:17:48 AM UTC 24 Sep 09 10:17:50 AM UTC 24 157705707 ps
T3245 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.902590113 Sep 09 10:17:31 AM UTC 24 Sep 09 10:17:50 AM UTC 24 2411357126 ps
T343 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2211168344 Sep 09 10:17:48 AM UTC 24 Sep 09 10:17:50 AM UTC 24 261532055 ps
T3246 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.1706502337 Sep 09 10:17:47 AM UTC 24 Sep 09 10:17:50 AM UTC 24 577638220 ps
T555 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.2175990391 Sep 09 10:17:48 AM UTC 24 Sep 09 10:17:50 AM UTC 24 337730188 ps
T474 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.2316290737 Sep 09 10:17:48 AM UTC 24 Sep 09 10:17:50 AM UTC 24 368828760 ps
T3247 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1177683398 Sep 09 10:17:47 AM UTC 24 Sep 09 10:17:50 AM UTC 24 696744890 ps
T3248 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.2943859536 Sep 09 10:17:48 AM UTC 24 Sep 09 10:17:50 AM UTC 24 460175820 ps
T3249 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.3108509469 Sep 09 10:17:13 AM UTC 24 Sep 09 10:17:50 AM UTC 24 4393567229 ps
T577 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.698404559 Sep 09 10:17:48 AM UTC 24 Sep 09 10:17:51 AM UTC 24 714909676 ps
T3250 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.3669886178 Sep 09 10:17:48 AM UTC 24 Sep 09 10:17:51 AM UTC 24 649433928 ps
T3251 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.2533805194 Sep 09 10:17:49 AM UTC 24 Sep 09 10:17:52 AM UTC 24 253792393 ps
T515 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.3873499747 Sep 09 10:17:50 AM UTC 24 Sep 09 10:17:52 AM UTC 24 383346961 ps
T504 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.1748232923 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:54 AM UTC 24 602162840 ps
T319 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.3735840993 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:54 AM UTC 24 250833693 ps
T3252 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.496319300 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:54 AM UTC 24 473173687 ps
T3253 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.2465302031 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:54 AM UTC 24 535478808 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.3564258004 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:54 AM UTC 24 249551524 ps
T3254 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.1628521989 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:54 AM UTC 24 336517447 ps
T512 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.2815815972 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:54 AM UTC 24 539616775 ps
T520 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.3191467839 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:55 AM UTC 24 472195075 ps
T3255 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.4000717182 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:55 AM UTC 24 528564427 ps
T3256 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.826118968 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:55 AM UTC 24 467312278 ps
T531 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.422384213 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:55 AM UTC 24 466244695 ps
T3257 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.1202695996 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:55 AM UTC 24 520543900 ps
T3258 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.1467035159 Sep 09 10:17:36 AM UTC 24 Sep 09 10:17:55 AM UTC 24 2010883042 ps
T3259 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.273868824 Sep 09 10:17:52 AM UTC 24 Sep 09 10:17:55 AM UTC 24 557661249 ps
T3260 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.3861842953 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:56 AM UTC 24 195168388 ps
T597 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.713446279 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:56 AM UTC 24 260496951 ps
T3261 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.646131788 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:56 AM UTC 24 270002268 ps
T3262 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.1279404579 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:56 AM UTC 24 208383268 ps
T385 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.3154047471 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:56 AM UTC 24 151474321 ps
T3263 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.3092211966 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:56 AM UTC 24 250843336 ps
T596 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.3468243931 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:56 AM UTC 24 220672257 ps
T206 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.899347944 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:56 AM UTC 24 527397431 ps
T584 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.1316932222 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:56 AM UTC 24 372807688 ps
T513 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.1780458012 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:57 AM UTC 24 490974478 ps
T3264 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.1373060318 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:57 AM UTC 24 583456774 ps
T3265 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.4179290 Sep 09 10:16:27 AM UTC 24 Sep 09 10:17:57 AM UTC 24 7079458797 ps
T3266 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.553275954 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:57 AM UTC 24 472255353 ps
T3267 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.4210283391 Sep 09 10:17:16 AM UTC 24 Sep 09 10:17:57 AM UTC 24 4150281599 ps
T3268 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.832883838 Sep 09 10:17:54 AM UTC 24 Sep 09 10:17:57 AM UTC 24 600904193 ps
T3269 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.2122995858 Sep 09 10:17:20 AM UTC 24 Sep 09 10:17:58 AM UTC 24 12796329830 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.3090364181 Sep 09 10:17:56 AM UTC 24 Sep 09 10:17:58 AM UTC 24 312079532 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.3021941776 Sep 09 10:18:02 AM UTC 24 Sep 09 10:18:05 AM UTC 24 261446505 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.2409780032 Sep 09 10:17:56 AM UTC 24 Sep 09 10:17:59 AM UTC 24 266773369 ps
T505 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.3596997977 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 404705056 ps
T3270 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.4013922413 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 305440012 ps
T313 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.2727394972 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 294560733 ps
T529 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.584067509 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 279832365 ps
T528 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.1668337298 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 456682534 ps
T372 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.2404719641 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 251188583 ps
T3271 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.3647901855 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 468788133 ps
T207 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.12059122 Sep 09 10:17:56 AM UTC 24 Sep 09 10:17:59 AM UTC 24 509205389 ps
T3272 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.3854919889 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 337154888 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.3394356275 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 276558040 ps
T3273 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.253387349 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 487780738 ps
T3274 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.4284279884 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 448892099 ps
T125 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.429361371 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 576746495 ps
T482 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.3705054434 Sep 09 10:17:57 AM UTC 24 Sep 09 10:17:59 AM UTC 24 838095519 ps
T568 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.1958249900 Sep 09 10:17:56 AM UTC 24 Sep 09 10:18:00 AM UTC 24 759367415 ps
T3275 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.1994786232 Sep 09 10:17:57 AM UTC 24 Sep 09 10:18:00 AM UTC 24 599475115 ps
T3276 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.2709976046 Sep 09 10:17:57 AM UTC 24 Sep 09 10:18:00 AM UTC 24 566929711 ps
T484 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.1928689578 Sep 09 10:17:57 AM UTC 24 Sep 09 10:18:00 AM UTC 24 618994414 ps
T3277 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.2978253026 Sep 09 10:17:04 AM UTC 24 Sep 09 10:18:01 AM UTC 24 19646727197 ps
T354 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.2843544882 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:02 AM UTC 24 260207970 ps
T3278 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.1538649999 Sep 09 10:18:01 AM UTC 24 Sep 09 10:18:04 AM UTC 24 594240261 ps
T3279 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.3675636884 Sep 09 10:17:15 AM UTC 24 Sep 09 10:18:05 AM UTC 24 3909920868 ps
T3280 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.12252352 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:02 AM UTC 24 196014887 ps
T337 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.31072482 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:02 AM UTC 24 297732218 ps
T351 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.969215541 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:02 AM UTC 24 294708831 ps
T3281 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.2927221081 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:02 AM UTC 24 475470192 ps
T535 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.207020220 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:02 AM UTC 24 495492849 ps
T3282 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.281314623 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:02 AM UTC 24 510494743 ps
T3283 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.4197006157 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:02 AM UTC 24 162581784 ps
T497 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2635444880 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:02 AM UTC 24 532752751 ps
T585 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.2135947074 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:02 AM UTC 24 534617074 ps
T3284 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.1746825094 Sep 09 10:18:00 AM UTC 24 Sep 09 10:18:02 AM UTC 24 158726312 ps
T366 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.2474410768 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:03 AM UTC 24 265745194 ps
T576 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.2361803526 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:03 AM UTC 24 596979198 ps
T3285 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.2689662889 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:03 AM UTC 24 511596075 ps
T599 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.2839895268 Sep 09 10:18:00 AM UTC 24 Sep 09 10:18:03 AM UTC 24 499232414 ps
T3286 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3222406372 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:03 AM UTC 24 513605932 ps
T3287 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1805982871 Sep 09 10:18:00 AM UTC 24 Sep 09 10:18:03 AM UTC 24 659124890 ps
T3288 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1717772930 Sep 09 10:17:59 AM UTC 24 Sep 09 10:18:03 AM UTC 24 483580308 ps
T3289 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.4083553079 Sep 09 10:18:01 AM UTC 24 Sep 09 10:18:04 AM UTC 24 151304172 ps
T591 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.235830318 Sep 09 10:18:01 AM UTC 24 Sep 09 10:18:04 AM UTC 24 197342859 ps
T396 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.3332561678 Sep 09 10:18:01 AM UTC 24 Sep 09 10:18:04 AM UTC 24 249636270 ps
T3290 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1008294782 Sep 09 10:18:01 AM UTC 24 Sep 09 10:18:04 AM UTC 24 452819512 ps
T323 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.2236603689 Sep 09 10:18:01 AM UTC 24 Sep 09 10:18:04 AM UTC 24 291378015 ps
T579 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.3308477303 Sep 09 10:18:01 AM UTC 24 Sep 09 10:18:04 AM UTC 24 453654958 ps
T590 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.2213816527 Sep 09 10:18:02 AM UTC 24 Sep 09 10:18:04 AM UTC 24 331741137 ps
T360 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.1922445937 Sep 09 10:18:02 AM UTC 24 Sep 09 10:18:05 AM UTC 24 317988947 ps
T485 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2405561085 Sep 09 10:18:02 AM UTC 24 Sep 09 10:18:05 AM UTC 24 498156789 ps
T540 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.48155629 Sep 09 10:18:01 AM UTC 24 Sep 09 10:18:05 AM UTC 24 459398278 ps
T3291 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.68797885 Sep 09 10:18:02 AM UTC 24 Sep 09 10:18:05 AM UTC 24 426356734 ps
T387 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.1586564007 Sep 09 10:18:02 AM UTC 24 Sep 09 10:18:05 AM UTC 24 282389268 ps
T3292 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.993663911 Sep 09 10:18:01 AM UTC 24 Sep 09 10:18:05 AM UTC 24 502327964 ps
T3293 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.1703575298 Sep 09 10:18:02 AM UTC 24 Sep 09 10:18:05 AM UTC 24 615175709 ps
T3294 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.1108239645 Sep 09 10:18:02 AM UTC 24 Sep 09 10:18:05 AM UTC 24 510825403 ps
T3295 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.2748380844 Sep 09 10:18:02 AM UTC 24 Sep 09 10:18:05 AM UTC 24 538703227 ps
T3296 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.2618309580 Sep 09 10:16:44 AM UTC 24 Sep 09 10:18:06 AM UTC 24 11535273024 ps
T3297 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.2765214792 Sep 09 10:16:54 AM UTC 24 Sep 09 10:18:06 AM UTC 24 37804378460 ps
T3298 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.1827956680 Sep 09 10:17:24 AM UTC 24 Sep 09 10:18:06 AM UTC 24 28788082177 ps
T3299 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.401384383 Sep 09 10:16:57 AM UTC 24 Sep 09 10:18:07 AM UTC 24 10242524237 ps
T367 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.2948665443 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:09 AM UTC 24 265475513 ps
T486 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.2268506836 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:10 AM UTC 24 526169111 ps
T3300 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.2983466072 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:10 AM UTC 24 684480203 ps
T3301 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.3002122071 Sep 09 10:17:18 AM UTC 24 Sep 09 10:18:13 AM UTC 24 2155900581 ps
T397 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.233185747 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:14 AM UTC 24 259795505 ps
T361 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.549015863 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:14 AM UTC 24 310878585 ps
T3302 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.3954821577 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:14 AM UTC 24 645861046 ps
T501 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.1734187100 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:14 AM UTC 24 728821510 ps
T3303 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.3299213819 Sep 09 10:18:10 AM UTC 24 Sep 09 10:18:15 AM UTC 24 165857337 ps
T3304 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.372172953 Sep 09 10:18:07 AM UTC 24 Sep 09 10:18:16 AM UTC 24 168548152 ps
T3305 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.795305061 Sep 09 10:18:10 AM UTC 24 Sep 09 10:18:16 AM UTC 24 272243225 ps
T3306 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.922802126 Sep 09 10:18:14 AM UTC 24 Sep 09 10:18:16 AM UTC 24 391722599 ps
T536 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.2821076982 Sep 09 10:18:07 AM UTC 24 Sep 09 10:18:16 AM UTC 24 594375087 ps
T3307 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.2632852743 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:16 AM UTC 24 492543586 ps
T3308 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.1490577448 Sep 09 10:18:10 AM UTC 24 Sep 09 10:18:16 AM UTC 24 527038527 ps
T592 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1595941785 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:16 AM UTC 24 518252550 ps
T3309 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.774829211 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:17 AM UTC 24 286388689 ps
T3310 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.1198193024 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:17 AM UTC 24 439914778 ps
T3311 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.3572846849 Sep 09 10:17:12 AM UTC 24 Sep 09 10:18:18 AM UTC 24 33007586737 ps
T586 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.676572398 Sep 09 10:18:16 AM UTC 24 Sep 09 10:18:19 AM UTC 24 738491866 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.3137815295 Sep 09 10:18:16 AM UTC 24 Sep 09 10:18:19 AM UTC 24 255025753 ps
T303 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.1793983355 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:19 AM UTC 24 310694737 ps
T3312 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.1448651700 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 183082648 ps
T349 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.2659653129 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:20 AM UTC 24 150132117 ps
T3313 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.1301073124 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 531235764 ps
T3314 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3464106438 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 475369966 ps
T3315 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.3733599204 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 173718759 ps
T516 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.2843062098 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 397313706 ps
T572 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.1689147638 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 170446092 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.845126058 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 267764992 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.159218755 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 308519054 ps
T502 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.4126837388 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 553926498 ps
T479 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.1273268767 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 529343237 ps
T3316 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3792899439 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 179030064 ps
T3317 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.1328162093 Sep 09 10:18:17 AM UTC 24 Sep 09 10:18:20 AM UTC 24 281219746 ps
T3318 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.3678222952 Sep 09 10:18:16 AM UTC 24 Sep 09 10:18:20 AM UTC 24 577701258 ps
T3319 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.1815404547 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:20 AM UTC 24 504690157 ps
T388 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.2700365463 Sep 09 10:18:17 AM UTC 24 Sep 09 10:18:20 AM UTC 24 342077287 ps
T3320 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.1150280568 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 510791140 ps
T3321 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.1943371298 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:20 AM UTC 24 512462209 ps
T3322 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.245741414 Sep 09 10:18:17 AM UTC 24 Sep 09 10:18:20 AM UTC 24 373770675 ps
T3323 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.835087049 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 569846551 ps
T560 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.3473740919 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:20 AM UTC 24 292358426 ps
T3324 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.3021187680 Sep 09 10:18:16 AM UTC 24 Sep 09 10:18:20 AM UTC 24 536358795 ps
T532 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.2928371824 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:20 AM UTC 24 674336073 ps
T305 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.2565109519 Sep 09 10:18:17 AM UTC 24 Sep 09 10:18:20 AM UTC 24 275170867 ps
T569 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.3704917669 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:20 AM UTC 24 399326634 ps
T3325 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.247209490 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:20 AM UTC 24 268457156 ps
T3326 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.2899225582 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:20 AM UTC 24 261497810 ps
T3327 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.526740845 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:21 AM UTC 24 520571919 ps
T3328 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.3453486004 Sep 09 10:18:17 AM UTC 24 Sep 09 10:18:21 AM UTC 24 634820259 ps
T3329 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.1749331405 Sep 09 10:18:17 AM UTC 24 Sep 09 10:18:21 AM UTC 24 632615743 ps
T3330 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.2684009298 Sep 09 10:18:04 AM UTC 24 Sep 09 10:18:21 AM UTC 24 593211363 ps
T3331 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.149556903 Sep 09 10:18:06 AM UTC 24 Sep 09 10:18:21 AM UTC 24 513415564 ps
T3332 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.3526923488 Sep 09 10:18:08 AM UTC 24 Sep 09 10:18:24 AM UTC 24 312206160 ps
T325 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.1108047794 Sep 09 10:18:15 AM UTC 24 Sep 09 10:18:24 AM UTC 24 295545928 ps
T392 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.3509930882 Sep 09 10:18:22 AM UTC 24 Sep 09 10:18:24 AM UTC 24 278025593 ps
T3333 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.1364514276 Sep 09 10:18:22 AM UTC 24 Sep 09 10:18:25 AM UTC 24 572668428 ps
T3334 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.3159149906 Sep 09 10:16:59 AM UTC 24 Sep 09 10:18:28 AM UTC 24 3474152445 ps
T3335 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.2537388701 Sep 09 10:16:44 AM UTC 24 Sep 09 10:18:29 AM UTC 24 3840850784 ps
T3336 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.1489289255 Sep 09 10:18:20 AM UTC 24 Sep 09 10:18:29 AM UTC 24 185025413 ps
T3337 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.3757141656 Sep 09 10:18:20 AM UTC 24 Sep 09 10:18:29 AM UTC 24 224019616 ps
T306 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.1316662969 Sep 09 10:18:20 AM UTC 24 Sep 09 10:18:29 AM UTC 24 271486493 ps
T3338 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.2437932591 Sep 09 10:18:24 AM UTC 24 Sep 09 10:18:29 AM UTC 24 307653631 ps
T3339 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.3796785470 Sep 09 10:18:20 AM UTC 24 Sep 09 10:18:30 AM UTC 24 551382272 ps
T3340 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.4282398725 Sep 09 10:18:15 AM UTC 24 Sep 09 10:18:30 AM UTC 24 177964410 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.4028448645 Sep 09 10:18:08 AM UTC 24 Sep 09 10:18:30 AM UTC 24 167509955 ps
T582 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.368016555 Sep 09 10:18:15 AM UTC 24 Sep 09 10:18:30 AM UTC 24 536771547 ps
T3341 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.1571676817 Sep 09 10:16:44 AM UTC 24 Sep 09 10:18:31 AM UTC 24 3945958018 ps
T3342 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.2363122738 Sep 09 10:18:15 AM UTC 24 Sep 09 10:18:31 AM UTC 24 501739181 ps
T3343 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.3736280371 Sep 09 10:18:08 AM UTC 24 Sep 09 10:18:31 AM UTC 24 511374407 ps
T3344 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.2462501231 Sep 09 10:18:08 AM UTC 24 Sep 09 10:18:31 AM UTC 24 632958627 ps
T3345 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.1896480881 Sep 09 10:17:34 AM UTC 24 Sep 09 10:18:33 AM UTC 24 23352376217 ps
T3346 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.2795605708 Sep 09 10:17:38 AM UTC 24 Sep 09 10:18:34 AM UTC 24 2262114664 ps
T583 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.3668936710 Sep 09 10:18:23 AM UTC 24 Sep 09 10:18:52 AM UTC 24 232932124 ps
T3347 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.1312464310 Sep 09 10:17:08 AM UTC 24 Sep 09 10:18:34 AM UTC 24 3354939388 ps
T386 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.2179245647 Sep 09 10:18:31 AM UTC 24 Sep 09 10:18:34 AM UTC 24 162996614 ps
T542 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.1812213279 Sep 09 10:18:31 AM UTC 24 Sep 09 10:18:34 AM UTC 24 333116501 ps
T3348 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.401705046 Sep 09 10:18:31 AM UTC 24 Sep 09 10:18:34 AM UTC 24 287502694 ps
T3349 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.4168949705 Sep 09 10:18:22 AM UTC 24 Sep 09 10:18:34 AM UTC 24 311021887 ps
T3350 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.2623437393 Sep 09 10:18:32 AM UTC 24 Sep 09 10:18:34 AM UTC 24 261286278 ps
T3351 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.1758832986 Sep 09 10:18:31 AM UTC 24 Sep 09 10:18:35 AM UTC 24 460320203 ps
T3352 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.932226915 Sep 09 10:18:22 AM UTC 24 Sep 09 10:18:35 AM UTC 24 342059317 ps
T3353 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.2154973736 Sep 09 10:18:22 AM UTC 24 Sep 09 10:18:35 AM UTC 24 488415042 ps
T3354 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.2876016822 Sep 09 10:18:31 AM UTC 24 Sep 09 10:18:35 AM UTC 24 564552388 ps
T3355 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.3973967427 Sep 09 10:18:22 AM UTC 24 Sep 09 10:18:35 AM UTC 24 518325305 ps
T3356 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.3896671525 Sep 09 10:18:31 AM UTC 24 Sep 09 10:18:35 AM UTC 24 553965852 ps
T3357 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.1598103841 Sep 09 10:18:32 AM UTC 24 Sep 09 10:18:35 AM UTC 24 534852319 ps
T3358 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.1476036185 Sep 09 10:18:36 AM UTC 24 Sep 09 10:18:40 AM UTC 24 280434512 ps
T339 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.11518956 Sep 09 10:18:37 AM UTC 24 Sep 09 10:18:40 AM UTC 24 336611623 ps
T3359 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.3885734527 Sep 09 10:17:26 AM UTC 24 Sep 09 10:18:40 AM UTC 24 45146121640 ps
T3360 /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.2085057652 Sep 09 10:18:36 AM UTC 24 Sep 09 10:18:40 AM UTC 24 467370589 ps
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