| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 97.17 | 98.22 | 96.03 | 97.44 | 93.22 | 98.38 | 98.17 | 98.73 |
| T278 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.4280753141 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:46 AM UTC 24 | 220371901 ps | ||
| T3799 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.549771755 | Sep 09 10:20:23 AM UTC 24 | Sep 09 10:20:46 AM UTC 24 | 254781034 ps | ||
| T3800 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.2603869607 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:46 AM UTC 24 | 137825263 ps | ||
| T3801 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.44323880 | Sep 09 10:20:23 AM UTC 24 | Sep 09 10:20:47 AM UTC 24 | 159835182 ps | ||
| T256 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.1896277542 | Sep 09 10:20:23 AM UTC 24 | Sep 09 10:20:48 AM UTC 24 | 828107638 ps | ||
| T268 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2460751318 | Sep 09 10:20:23 AM UTC 24 | Sep 09 10:20:48 AM UTC 24 | 975744887 ps | ||
| T281 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.3972338123 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:49 AM UTC 24 | 1337048558 ps | ||
| T224 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.2287512557 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:49 AM UTC 24 | 47450661 ps | ||
| T269 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.2519742080 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:51 AM UTC 24 | 104320129 ps | ||
| T270 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.1743645751 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:49 AM UTC 24 | 75800123 ps | ||
| T245 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.3886591454 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:51 AM UTC 24 | 236201462 ps | ||
| T403 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.4126831396 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:51 AM UTC 24 | 343398018 ps | ||
| T225 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.1751415165 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 42537024 ps | ||
| T271 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2258937121 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:49 AM UTC 24 | 77312614 ps | ||
| T272 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.1178677151 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:49 AM UTC 24 | 59535592 ps | ||
| T273 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.2136812506 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:49 AM UTC 24 | 51799566 ps | ||
| T279 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.3784663416 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 82994732 ps | ||
| T293 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.1654792607 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:49 AM UTC 24 | 64900943 ps | ||
| T294 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.2839786646 | Sep 09 10:20:36 AM UTC 24 | Sep 09 10:20:49 AM UTC 24 | 51726750 ps | ||
| T280 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.1791881138 | Sep 09 10:20:27 AM UTC 24 | Sep 09 10:20:51 AM UTC 24 | 206424219 ps | ||
| T246 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.2660454239 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 345895189 ps | ||
| T286 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.3621941582 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:49 AM UTC 24 | 51454873 ps | ||
| T282 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.1124144405 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 123300067 ps | ||
| T296 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.247855947 | Sep 09 10:20:47 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 56784598 ps | ||
| T276 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.2942219826 | Sep 09 10:20:48 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 79153108 ps | ||
| T274 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.1140184439 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 46001325 ps | ||
| T257 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.2599001900 | Sep 09 10:20:36 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 142387754 ps | ||
| T3802 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.4060180900 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 136598875 ps | ||
| T258 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.3723143058 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 102060992 ps | ||
| T251 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.1345299863 | Sep 09 10:20:36 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 102298944 ps | ||
| T3803 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.730037837 | Sep 09 10:20:36 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 287182977 ps | ||
| T300 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2865412443 | Sep 09 10:20:27 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 39800221 ps | ||
| T3804 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.630172240 | Sep 09 10:20:36 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 87585320 ps | ||
| T3805 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.838872876 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 308792836 ps | ||
| T275 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.1739047837 | Sep 09 10:20:31 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 44033057 ps | ||
| T248 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.2444779992 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 74785134 ps | ||
| T3806 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2352428232 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 139276505 ps | ||
| T253 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.1409426152 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 72803862 ps | ||
| T3807 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.1597837294 | Sep 09 10:20:31 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 97291824 ps | ||
| T3808 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.3288041959 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 111416054 ps | ||
| T3809 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.2415590266 | Sep 09 10:20:27 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 125418976 ps | ||
| T3810 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.2646822032 | Sep 09 10:20:31 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 160651184 ps | ||
| T3811 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.1485117608 | Sep 09 10:20:48 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 153377323 ps | ||
| T3812 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.1953919197 | Sep 09 10:20:37 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 196478062 ps | ||
| T3813 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.1799082780 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 153599538 ps | ||
| T3814 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.3832130297 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 77689383 ps | ||
| T404 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.2383166902 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:50 AM UTC 24 | 355240623 ps | ||
| T283 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.3067038099 | Sep 09 10:20:36 AM UTC 24 | Sep 09 10:20:51 AM UTC 24 | 207014156 ps | ||
| T284 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.1876410804 | Sep 09 10:20:46 AM UTC 24 | Sep 09 10:20:51 AM UTC 24 | 417774308 ps | ||
| T3815 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.3710007588 | Sep 09 10:20:27 AM UTC 24 | Sep 09 10:20:51 AM UTC 24 | 108092330 ps | ||
| T3816 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.1687981961 | Sep 09 10:20:49 AM UTC 24 | Sep 09 10:20:51 AM UTC 24 | 71651294 ps | ||
| T249 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.1879078168 | Sep 09 10:20:49 AM UTC 24 | Sep 09 10:20:51 AM UTC 24 | 185113383 ps | ||
| T250 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.3242259218 | Sep 09 10:20:27 AM UTC 24 | Sep 09 10:20:51 AM UTC 24 | 109587561 ps | ||
| T285 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3187065902 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:52 AM UTC 24 | 390703783 ps | ||
| T3817 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.1539355310 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:52 AM UTC 24 | 379444769 ps | ||
| T3818 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.3889383232 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:52 AM UTC 24 | 536371937 ps | ||
| T3819 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2327276604 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:52 AM UTC 24 | 184667340 ps | ||
| T3820 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1980599300 | Sep 09 10:20:36 AM UTC 24 | Sep 09 10:20:52 AM UTC 24 | 671097569 ps | ||
| T405 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.1430709714 | Sep 09 10:20:36 AM UTC 24 | Sep 09 10:20:53 AM UTC 24 | 563598902 ps | ||
| T3821 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.1944678583 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:53 AM UTC 24 | 703427491 ps | ||
| T3822 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2726386784 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 122247202 ps | ||
| T3823 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.2049253169 | Sep 09 10:20:26 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 115626454 ps | ||
| T295 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.1252798984 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 41819648 ps | ||
| T3824 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.4281037697 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 42642465 ps | ||
| T297 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.163744495 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 49552940 ps | ||
| T3825 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.145397240 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 58644721 ps | ||
| T3826 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.884512084 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 156032378 ps | ||
| T3827 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.1244335060 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 44892356 ps | ||
| T3828 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.3770389993 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 41878692 ps | ||
| T298 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.3979583818 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:54 AM UTC 24 | 44695301 ps | ||
| T3829 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.2402869717 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:55 AM UTC 24 | 40182250 ps | ||
| T3830 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.570058176 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:55 AM UTC 24 | 109317313 ps | ||
| T3831 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3590350931 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:55 AM UTC 24 | 191943774 ps | ||
| T3832 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.3805393073 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:55 AM UTC 24 | 160810170 ps | ||
| T3833 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.896776104 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:55 AM UTC 24 | 177052664 ps | ||
| T3834 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2680425019 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:55 AM UTC 24 | 180086391 ps | ||
| T3835 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2742374085 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:55 AM UTC 24 | 83703902 ps | ||
| T3836 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2026962976 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:56 AM UTC 24 | 331208785 ps | ||
| T252 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.1622403964 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:56 AM UTC 24 | 262946925 ps | ||
| T255 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.1776053986 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:56 AM UTC 24 | 128916679 ps | ||
| T3837 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.155732545 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:56 AM UTC 24 | 562921781 ps | ||
| T3838 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.587092623 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:20:57 AM UTC 24 | 54573947 ps | ||
| T3839 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.3177968446 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:20:57 AM UTC 24 | 39303698 ps | ||
| T3840 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3570132581 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:57 AM UTC 24 | 725912320 ps | ||
| T3841 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.3326531551 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:57 AM UTC 24 | 350378673 ps | ||
| T3842 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.3914474999 | Sep 09 10:20:51 AM UTC 24 | Sep 09 10:20:58 AM UTC 24 | 711220266 ps | ||
| T407 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.1946748873 | Sep 09 10:20:52 AM UTC 24 | Sep 09 10:20:58 AM UTC 24 | 1332805631 ps | ||
| T3843 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.3505139934 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:20:58 AM UTC 24 | 151844242 ps | ||
| T299 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.3836268396 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:20:58 AM UTC 24 | 41453704 ps | ||
| T3844 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.1470127596 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:20:58 AM UTC 24 | 47971552 ps | ||
| T3845 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.343039371 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:20:58 AM UTC 24 | 48161885 ps | ||
| T408 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.3449418776 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:20:59 AM UTC 24 | 519337897 ps | ||
| T3846 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.2978838427 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:20:59 AM UTC 24 | 160591080 ps | ||
| T3847 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.841818052 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:20:59 AM UTC 24 | 173271194 ps | ||
| T3848 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.3134436833 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:20:59 AM UTC 24 | 48188120 ps | ||
| T3849 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.1531076159 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:20:59 AM UTC 24 | 76551497 ps | ||
| T3850 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.948232873 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:20:59 AM UTC 24 | 94788343 ps | ||
| T3851 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.1480490327 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:20:59 AM UTC 24 | 100982518 ps | ||
| T3852 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.3771123188 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:20:59 AM UTC 24 | 78143650 ps | ||
| T3853 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.2326880151 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:21:00 AM UTC 24 | 66201401 ps | ||
| T3854 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.2530175903 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:21:00 AM UTC 24 | 100263174 ps | ||
| T3855 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.530856805 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:00 AM UTC 24 | 101057002 ps | ||
| T3856 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.568808294 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:21:01 AM UTC 24 | 143745169 ps | ||
| T3857 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.1793106409 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:21:02 AM UTC 24 | 371467568 ps | ||
| T3858 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.1601322420 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:02 AM UTC 24 | 971922266 ps | ||
| T3859 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.2037017792 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:21:02 AM UTC 24 | 140237568 ps | ||
| T3860 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.889634936 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:04 AM UTC 24 | 135862972 ps | ||
| T3861 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.2869316671 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 44837617 ps | ||
| T3862 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.2541613095 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 53358779 ps | ||
| T3863 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.2018867540 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:04 AM UTC 24 | 170843998 ps | ||
| T3864 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.3802762332 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:21:04 AM UTC 24 | 121008847 ps | ||
| T3865 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.1758080856 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:04 AM UTC 24 | 148902026 ps | ||
| T3866 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.1611529568 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:21:05 AM UTC 24 | 136433966 ps | ||
| T3867 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.4072964690 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:21:05 AM UTC 24 | 342838564 ps | ||
| T3868 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.1107348088 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:05 AM UTC 24 | 113307850 ps | ||
| T3869 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.1853425238 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:08 AM UTC 24 | 862968641 ps | ||
| T401 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.67525099 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:21:09 AM UTC 24 | 2045412034 ps | ||
| T3870 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.4195375936 | Sep 09 10:21:07 AM UTC 24 | Sep 09 10:21:09 AM UTC 24 | 114167423 ps | ||
| T3871 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.1992074008 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:10 AM UTC 24 | 36321471 ps | ||
| T3872 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.939588989 | Sep 09 10:20:55 AM UTC 24 | Sep 09 10:21:10 AM UTC 24 | 134979783 ps | ||
| T3873 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.4160806276 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:15 AM UTC 24 | 39766047 ps | ||
| T3874 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.735759173 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:15 AM UTC 24 | 102603387 ps | ||
| T3875 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3025161207 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:15 AM UTC 24 | 152686673 ps | ||
| T3876 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.2284359931 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:16 AM UTC 24 | 173345615 ps | ||
| T3877 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.915570591 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:16 AM UTC 24 | 83185950 ps | ||
| T402 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.4107851103 | Sep 09 10:20:56 AM UTC 24 | Sep 09 10:21:18 AM UTC 24 | 948303494 ps | ||
| T3878 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.2225785921 | Sep 09 10:21:07 AM UTC 24 | Sep 09 10:21:19 AM UTC 24 | 63287877 ps | ||
| T3879 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.2277330763 | Sep 09 10:21:07 AM UTC 24 | Sep 09 10:21:19 AM UTC 24 | 84055091 ps | ||
| T3880 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.3108751185 | Sep 09 10:21:07 AM UTC 24 | Sep 09 10:21:19 AM UTC 24 | 51928813 ps | ||
| T3881 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.2463207998 | Sep 09 10:21:07 AM UTC 24 | Sep 09 10:21:19 AM UTC 24 | 64469714 ps | ||
| T3882 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.3908992879 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 39599068 ps | ||
| T3883 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.3421750284 | Sep 09 10:21:07 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 68769512 ps | ||
| T3884 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3438286698 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 61312968 ps | ||
| T3885 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.3068637075 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 78958912 ps | ||
| T3886 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.2539462024 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 64597398 ps | ||
| T3887 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.2655715834 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 74632036 ps | ||
| T3888 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.902712302 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 47879127 ps | ||
| T3889 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1321863678 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 42480363 ps | ||
| T3890 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.3367358748 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 41691700 ps | ||
| T3891 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.2684214523 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 57765612 ps | ||
| T3892 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.4080809698 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 37127611 ps | ||
| T3893 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.3971932526 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 54790889 ps | ||
| T3894 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1149265164 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 35570229 ps | ||
| T3895 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3322607651 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 39511079 ps | ||
| T3896 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.1830264428 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 44288695 ps | ||
| T3897 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3795004928 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 49585538 ps | ||
| T3898 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.627948812 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 55391070 ps | ||
| T3899 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.3685450970 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 43416390 ps | ||
| T3900 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.3193933695 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 60683147 ps | ||
| T3901 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.2264295996 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 30895165 ps | ||
| T3902 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.3312794273 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 30751516 ps | ||
| T3903 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.3284618966 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 56212113 ps | ||
| T3904 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.1344928866 | Sep 09 10:21:07 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 131104660 ps | ||
| T3905 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.4189633791 | Sep 09 10:21:08 AM UTC 24 | Sep 09 10:21:20 AM UTC 24 | 119611569 ps | ||
| T406 | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.375580726 | Sep 09 10:21:07 AM UTC 24 | Sep 09 10:21:24 AM UTC 24 | 1654215379 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.680899946 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 229798164 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 09:55:07 AM UTC 24 |
| Finished | Sep 09 09:55:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=680899946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_data_toggle_clear.680899946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1625163074 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 1863796365 ps |
| CPU time | 17.83 seconds |
| Started | Sep 09 09:55:17 AM UTC 24 |
| Finished | Sep 09 09:55:36 AM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625163074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.1625163074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.3081629392 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 459003664 ps |
| CPU time | 2.14 seconds |
| Started | Sep 09 09:55:13 AM UTC 24 |
| Finished | Sep 09 09:55:16 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081629392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.3081629392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.3539167177 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 25748818415 ps |
| CPU time | 49.1 seconds |
| Started | Sep 09 09:55:08 AM UTC 24 |
| Finished | Sep 09 09:55:58 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539167177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.3539167177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.3748416485 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 24326938106 ps |
| CPU time | 38.15 seconds |
| Started | Sep 09 09:55:06 AM UTC 24 |
| Finished | Sep 09 09:55:46 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748416485 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.3748416485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.2805314524 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 69654120 ps |
| CPU time | 0.71 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:44 AM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805314524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.2805314524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.562615005 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 216113160 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 09:55:24 AM UTC 24 |
| Finished | Sep 09 09:55:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=562615005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -c m_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.562615005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.4116374934 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 3297490639 ps |
| CPU time | 34.31 seconds |
| Started | Sep 09 09:55:17 AM UTC 24 |
| Finished | Sep 09 09:55:53 AM UTC 24 |
| Peak memory | 233956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116374934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.4116374934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.351024569 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 184554980 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:20:40 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 226824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=351024569 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.351024569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.3810015997 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 13711483514 ps |
| CPU time | 32.96 seconds |
| Started | Sep 09 09:55:15 AM UTC 24 |
| Finished | Sep 09 09:55:50 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810015997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_resume.3810015997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.2577139896 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 8566786462 ps |
| CPU time | 16.05 seconds |
| Started | Sep 09 10:02:06 AM UTC 24 |
| Finished | Sep 09 10:02:23 AM UTC 24 |
| Peak memory | 227432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2577139896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.2577139896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3344649052 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 942679574 ps |
| CPU time | 3.65 seconds |
| Started | Sep 09 09:55:07 AM UTC 24 |
| Finished | Sep 09 09:55:12 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344649052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.3344649052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.3505023425 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 449614890 ps |
| CPU time | 2.24 seconds |
| Started | Sep 09 09:55:38 AM UTC 24 |
| Finished | Sep 09 09:55:42 AM UTC 24 |
| Peak memory | 251540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505023425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.3505023425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.2260583399 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 336352866 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 09:55:24 AM UTC 24 |
| Finished | Sep 09 09:55:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2260583399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test _mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.2260583399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.2950423189 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 9313704602 ps |
| CPU time | 24.1 seconds |
| Started | Sep 09 09:57:51 AM UTC 24 |
| Finished | Sep 09 09:58:16 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950423189 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.2950423189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.3282231196 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 478822208 ps |
| CPU time | 1.9 seconds |
| Started | Sep 09 10:03:52 AM UTC 24 |
| Finished | Sep 09 10:03:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3282231196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.3282231196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.600702811 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 39100056 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 09:55:25 AM UTC 24 |
| Finished | Sep 09 09:55:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=600702811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_phy_pins_sense.600702811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.1654792607 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 64900943 ps |
| CPU time | 0.77 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:49 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654792607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.1654792607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.1997497023 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 427670375 ps |
| CPU time | 2.35 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:36 AM UTC 24 |
| Peak memory | 217564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1997497023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.1997497023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.901054536 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 6712323102 ps |
| CPU time | 84.81 seconds |
| Started | Sep 09 09:57:46 AM UTC 24 |
| Finished | Sep 09 09:59:13 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=901054536 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_0 8/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.901054536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.2570290834 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 19595881416 ps |
| CPU time | 37.33 seconds |
| Started | Sep 09 09:57:52 AM UTC 24 |
| Finished | Sep 09 09:58:31 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570290834 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.2570290834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.797353312 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 12809948938 ps |
| CPU time | 52.95 seconds |
| Started | Sep 09 09:55:25 AM UTC 24 |
| Finished | Sep 09 09:56:20 AM UTC 24 |
| Peak memory | 231564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797353312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_pkt_buffer.797353312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.3929123379 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 5380736505 ps |
| CPU time | 14.36 seconds |
| Started | Sep 09 09:55:42 AM UTC 24 |
| Finished | Sep 09 09:55:57 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3929123379 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.3929123379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.1723529966 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 481636697 ps |
| CPU time | 2.68 seconds |
| Started | Sep 09 10:04:26 AM UTC 24 |
| Finished | Sep 09 10:04:30 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1723529966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.1723529966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.496725862 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 54495933 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 226824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=496725862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.496725862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.2181129362 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 34848735980 ps |
| CPU time | 62.81 seconds |
| Started | Sep 09 09:57:59 AM UTC 24 |
| Finished | Sep 09 09:59:03 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181129362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.2181129362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.1409071789 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 151615878 ps |
| CPU time | 0.92 seconds |
| Started | Sep 09 09:55:06 AM UTC 24 |
| Finished | Sep 09 09:55:08 AM UTC 24 |
| Peak memory | 216448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1409071789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.1409071789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.3666179571 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 292339936 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 09:56:26 AM UTC 24 |
| Finished | Sep 09 09:56:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666179571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.3666179571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.3544297976 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 707043772 ps |
| CPU time | 2.69 seconds |
| Started | Sep 09 10:17:40 AM UTC 24 |
| Finished | Sep 09 10:17:43 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544297976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.3544297976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.782077386 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 4599190945 ps |
| CPU time | 55.4 seconds |
| Started | Sep 09 09:58:25 AM UTC 24 |
| Finished | Sep 09 09:59:22 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=782077386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.782077386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.3587702727 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 640821122 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:19:05 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587702727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.3587702727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.2660454239 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 345895189 ps |
| CPU time | 2.78 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660454239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.2660454239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.1080487749 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 22136540586 ps |
| CPU time | 42.16 seconds |
| Started | Sep 09 09:59:11 AM UTC 24 |
| Finished | Sep 09 09:59:54 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080487749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.1080487749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.597622412 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 142811504 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 09:55:09 AM UTC 24 |
| Finished | Sep 09 09:55:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=597622412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_disconnected.597622412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.2928371824 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 674336073 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928371824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.2928371824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.1429972540 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 526436891 ps |
| CPU time | 1.98 seconds |
| Started | Sep 09 10:05:22 AM UTC 24 |
| Finished | Sep 09 10:05:25 AM UTC 24 |
| Peak memory | 214432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429972540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.1429972540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.332882835 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 157032709 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 09:55:29 AM UTC 24 |
| Finished | Sep 09 09:55:31 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332882835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_rx_crc_err.332882835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.3979583818 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 44695301 ps |
| CPU time | 0.71 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979583818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.3979583818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.1273268767 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 529343237 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1273268767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.1273268767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.438374410 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 1057773176 ps |
| CPU time | 2.05 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:16 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=438374410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.438374410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.225433614 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 1271477255 ps |
| CPU time | 3.73 seconds |
| Started | Sep 09 10:06:57 AM UTC 24 |
| Finished | Sep 09 10:07:02 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=225433614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.225433614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.3596997977 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 404705056 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596997977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.3596997977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.62667818 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 628560390 ps |
| CPU time | 2.95 seconds |
| Started | Sep 09 10:04:34 AM UTC 24 |
| Finished | Sep 09 10:04:38 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=62667818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.62667818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.617583583 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 803053872 ps |
| CPU time | 2 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=617583583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.617583583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.3314056521 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 558894095 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:17:46 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314056521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.3314056521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.1928689578 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 618994414 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:18:00 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928689578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.1928689578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.649188016 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 257486654 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 09:55:10 AM UTC 24 |
| Finished | Sep 09 09:55:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=649188016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_fifo_levels.649188016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.2874301146 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 298983925 ps |
| CPU time | 1.97 seconds |
| Started | Sep 09 09:55:56 AM UTC 24 |
| Finished | Sep 09 09:55:58 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2874301146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.2874301146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.1012730724 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 579759594 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:18:58 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012730724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.1012730724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.976502365 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 47161077867 ps |
| CPU time | 132.6 seconds |
| Started | Sep 09 10:08:53 AM UTC 24 |
| Finished | Sep 09 10:11:08 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=976502365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_device_address.976502365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.4233829590 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 4228049624 ps |
| CPU time | 29.06 seconds |
| Started | Sep 09 09:55:28 AM UTC 24 |
| Finished | Sep 09 09:55:58 AM UTC 24 |
| Peak memory | 227740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233829590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.4233829590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.4107851103 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 948303494 ps |
| CPU time | 4.31 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:18 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4107851103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.4107851103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.4008737596 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 477688289 ps |
| CPU time | 2.67 seconds |
| Started | Sep 09 09:55:30 AM UTC 24 |
| Finished | Sep 09 09:55:34 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008737596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.4008737596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.2496098141 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 494143539 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:18:58 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496098141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.2496098141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.2206678843 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 711039908 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206678843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.2206678843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.734312882 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 433375739 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:17:43 AM UTC 24 |
| Finished | Sep 09 10:17:46 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=734312882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.734312882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.542531373 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 181801820 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 09:58:33 AM UTC 24 |
| Finished | Sep 09 09:58:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=542531373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_nak_trans.542531373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.4225917130 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 49999702 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 09:55:40 AM UTC 24 |
| Finished | Sep 09 09:55:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4225917130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.4225917130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.1848472099 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 11821980161 ps |
| CPU time | 237.92 seconds |
| Started | Sep 09 10:02:29 AM UTC 24 |
| Finished | Sep 09 10:06:30 AM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848472099 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.1848472099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.4275410482 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 35489055 ps |
| CPU time | 0.7 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 215216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275410482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.4275410482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.1430709714 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 563598902 ps |
| CPU time | 4.2 seconds |
| Started | Sep 09 10:20:36 AM UTC 24 |
| Finished | Sep 09 10:20:53 AM UTC 24 |
| Peak memory | 217332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1430709714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.1430709714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.1379243754 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 194684988 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 09:55:25 AM UTC 24 |
| Finished | Sep 09 09:55:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379243754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.1379243754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.2268506836 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 526169111 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268506836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.2268506836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.245741414 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 373770675 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:18:17 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 216736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=245741414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.245741414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.699286319 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 513578741 ps |
| CPU time | 1.94 seconds |
| Started | Sep 09 10:09:39 AM UTC 24 |
| Finished | Sep 09 10:09:42 AM UTC 24 |
| Peak memory | 214784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=699286319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.699286319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.1776053986 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 128916679 ps |
| CPU time | 2.44 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:56 AM UTC 24 |
| Peak memory | 234604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776053986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.1776053986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.506099747 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 5123189465 ps |
| CPU time | 40.36 seconds |
| Started | Sep 09 09:55:09 AM UTC 24 |
| Finished | Sep 09 09:55:51 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506099747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.506099747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.549287962 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 1178639445 ps |
| CPU time | 6.03 seconds |
| Started | Sep 09 09:56:53 AM UTC 24 |
| Finished | Sep 09 09:57:00 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=549287962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.549287962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.2840840949 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 132077509 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 09:55:06 AM UTC 24 |
| Finished | Sep 09 09:55:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840840949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.2840840949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1595941785 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 518252550 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:16 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595941785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.1595941785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.3935079754 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 590602117 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935079754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.3935079754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.4181634238 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 416002011 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4181634238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.4181634238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.2201346991 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 624974873 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:18:36 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2201346991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.2201346991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.658635429 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 612628684 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:18:46 AM UTC 24 |
| Finished | Sep 09 10:18:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=658635429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.658635429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.3114430712 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 605093099 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:18:53 AM UTC 24 |
| Finished | Sep 09 10:18:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114430712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.3114430712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.53294472 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 546465836 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:19:12 AM UTC 24 |
| Finished | Sep 09 10:19:14 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=53294472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.53294472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.422384213 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 466244695 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:55 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=422384213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.422384213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.48155629 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 459398278 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:18:01 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=48155629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.48155629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.1396077988 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 243760232 ps |
| CPU time | 1.89 seconds |
| Started | Sep 09 10:04:57 AM UTC 24 |
| Finished | Sep 09 10:05:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396077988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_fifo_levels.1396077988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.4026170249 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 318982779 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 09:55:56 AM UTC 24 |
| Finished | Sep 09 09:55:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026170249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_fifo_levels.4026170249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.89130631 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 7620414099 ps |
| CPU time | 34.4 seconds |
| Started | Sep 09 09:56:41 AM UTC 24 |
| Finished | Sep 09 09:57:16 AM UTC 24 |
| Peak memory | 229540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=89130631 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08 /usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.89130631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.3013755398 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 217441297 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:10:52 AM UTC 24 |
| Finished | Sep 09 10:10:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013755398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.3013755398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.2182611565 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 34795212 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 09:58:39 AM UTC 24 |
| Finished | Sep 09 09:58:41 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182611565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.2182611565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.2383166902 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 355240623 ps |
| CPU time | 2.45 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2383166902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.2383166902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.179434612 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 88177456730 ps |
| CPU time | 183.26 seconds |
| Started | Sep 09 09:55:11 AM UTC 24 |
| Finished | Sep 09 09:58:17 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179434612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.179434612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.2485656671 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 157426724 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 09:55:32 AM UTC 24 |
| Finished | Sep 09 09:55:35 AM UTC 24 |
| Peak memory | 216992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485656671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_setup_trans_ignored.2485656671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.2146697417 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 202526328 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 09:55:34 AM UTC 24 |
| Finished | Sep 09 09:55:37 AM UTC 24 |
| Peak memory | 214460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2146697417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.2146697417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.348790527 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 276547892 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:04:08 AM UTC 24 |
| Finished | Sep 09 10:04:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=348790527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_fifo_levels.348790527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.2948665443 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 265475513 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2948665443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 100.usbdev_fifo_levels.2948665443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.2659653129 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 150132117 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2659653129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 102.usbdev_fifo_levels.2659653129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.233185747 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 259795505 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=233185747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 103.usbdev_fifo_levels.233185747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.549015863 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 310878585 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=549015863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 104.usbdev_fifo_levels.549015863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.1793983355 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 310694737 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1793983355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 106.usbdev_fifo_levels.1793983355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.4126837388 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 553926498 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126837388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.4126837388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.845126058 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 267764992 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=845126058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 108.usbdev_fifo_levels.845126058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.159218755 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 308519054 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 216664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159218755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 109.usbdev_fifo_levels.159218755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.3464446582 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 1000264320 ps |
| CPU time | 4.08 seconds |
| Started | Sep 09 10:04:30 AM UTC 24 |
| Finished | Sep 09 10:04:35 AM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464446582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.3464446582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.3733599204 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 173718759 ps |
| CPU time | 0.91 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733599204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 110.usbdev_fifo_levels.3733599204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/110.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.4028448645 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 167509955 ps |
| CPU time | 0.8 seconds |
| Started | Sep 09 10:18:08 AM UTC 24 |
| Finished | Sep 09 10:18:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028448645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 113.usbdev_fifo_levels.4028448645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.2700365463 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 342077287 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:18:17 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700365463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 118.usbdev_fifo_levels.2700365463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.2565109519 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 275170867 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:18:17 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2565109519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 119.usbdev_fifo_levels.2565109519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.4168949705 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 311021887 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:34 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4168949705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.4168949705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.932226915 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 342059317 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932226915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 123.usbdev_fifo_levels.932226915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.3668936710 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 232932124 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3668936710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.3668936710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.2558026052 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 264293310 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 214852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2558026052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 129.usbdev_fifo_levels.2558026052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.1122194196 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 557955746 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122194196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.1122194196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.2692772118 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 177403484 ps |
| CPU time | 0.81 seconds |
| Started | Sep 09 10:18:25 AM UTC 24 |
| Finished | Sep 09 10:18:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2692772118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.2692772118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.3077848440 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 304381869 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:18:30 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3077848440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 134.usbdev_fifo_levels.3077848440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.4165351365 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 447978290 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:18:30 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165351365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.4165351365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.2179245647 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 162996614 ps |
| CPU time | 0.79 seconds |
| Started | Sep 09 10:18:31 AM UTC 24 |
| Finished | Sep 09 10:18:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179245647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 136.usbdev_fifo_levels.2179245647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/136.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.3531291358 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 257531363 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:18:35 AM UTC 24 |
| Finished | Sep 09 10:18:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3531291358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 140.usbdev_fifo_levels.3531291358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.1476036185 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 280434512 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:18:36 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1476036185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 141.usbdev_fifo_levels.1476036185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.11518956 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 336611623 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:18:37 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=11518956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 142.usbdev_fifo_levels.11518956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/142.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/144.usbdev_fifo_levels.2263212593 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 149069358 ps |
| CPU time | 0.77 seconds |
| Started | Sep 09 10:18:41 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2263212593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 144.usbdev_fifo_levels.2263212593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/144.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/150.usbdev_fifo_levels.910440996 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 338688348 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:18:49 AM UTC 24 |
| Finished | Sep 09 10:18:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=910440996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 150.usbdev_fifo_levels.910440996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/150.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.489694421 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 258433059 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:18:51 AM UTC 24 |
| Finished | Sep 09 10:18:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=489694421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 151.usbdev_fifo_levels.489694421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/151.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.3598135980 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 358180058 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:18:52 AM UTC 24 |
| Finished | Sep 09 10:18:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598135980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 154.usbdev_fifo_levels.3598135980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/155.usbdev_fifo_levels.4291891751 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 187142700 ps |
| CPU time | 0.89 seconds |
| Started | Sep 09 10:18:52 AM UTC 24 |
| Finished | Sep 09 10:18:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291891751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 155.usbdev_fifo_levels.4291891751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/155.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.3132803955 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 279039727 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:18:53 AM UTC 24 |
| Finished | Sep 09 10:18:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132803955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 156.usbdev_fifo_levels.3132803955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/156.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/157.usbdev_fifo_levels.3619444334 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 272982637 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:18:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619444334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 157.usbdev_fifo_levels.3619444334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/157.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.301418777 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 577760173 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=301418777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.301418777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.1779823420 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 352483476 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:18:59 AM UTC 24 |
| Finished | Sep 09 10:19:24 AM UTC 24 |
| Peak memory | 214804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779823420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.1779823420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.3645886279 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 272097989 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:07:46 AM UTC 24 |
| Finished | Sep 09 10:07:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3645886279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_fifo_levels.3645886279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.108775523 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 685516869 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=108775523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.108775523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.2528932535 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 265322228 ps |
| CPU time | 1.95 seconds |
| Started | Sep 09 10:09:21 AM UTC 24 |
| Finished | Sep 09 10:09:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528932535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_fifo_levels.2528932535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.3375381763 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 283951000 ps |
| CPU time | 1.89 seconds |
| Started | Sep 09 09:58:14 AM UTC 24 |
| Finished | Sep 09 09:58:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3375381763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_fifo_levels.3375381763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.2722603040 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 93137086914 ps |
| CPU time | 186.49 seconds |
| Started | Sep 09 09:58:18 AM UTC 24 |
| Finished | Sep 09 10:01:27 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722603040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.2722603040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.651735156 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 429402039 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 10:12:08 AM UTC 24 |
| Finished | Sep 09 10:12:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=651735156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.651735156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.1349676251 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 244815817 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:12:24 AM UTC 24 |
| Finished | Sep 09 10:12:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1349676251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_fifo_levels.1349676251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.751489159 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 257102882 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:13:24 AM UTC 24 |
| Finished | Sep 09 10:13:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=751489159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_fifo_levels.751489159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.1966024646 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 174012466 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:13:43 AM UTC 24 |
| Finished | Sep 09 10:13:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966024646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_fifo_levels.1966024646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.1406181014 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 148290471 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:14:51 AM UTC 24 |
| Finished | Sep 09 10:14:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406181014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.1406181014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.3607757293 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 3824748378 ps |
| CPU time | 38.55 seconds |
| Started | Sep 09 10:16:09 AM UTC 24 |
| Finished | Sep 09 10:16:49 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607757293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.3607757293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.3601423329 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 264865843 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:17:38 AM UTC 24 |
| Finished | Sep 09 10:17:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3601423329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 51.usbdev_fifo_levels.3601423329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.262072159 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 429103353 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:17:40 AM UTC 24 |
| Finished | Sep 09 10:17:42 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=262072159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.262072159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.2552293499 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 286103553 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 10:02:02 AM UTC 24 |
| Finished | Sep 09 10:02:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2552293499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_fifo_levels.2552293499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.3735840993 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 250833693 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735840993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 74.usbdev_fifo_levels.3735840993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.1668337298 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 456682534 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668337298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.1668337298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.1809447277 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 146668435 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 09:55:25 AM UTC 24 |
| Finished | Sep 09 09:55:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1809447277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.1809447277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.2035779615 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 151895918 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 09:57:53 AM UTC 24 |
| Finished | Sep 09 09:57:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2035779615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.2035779615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.1247415586 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 184795924 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 09:55:06 AM UTC 24 |
| Finished | Sep 09 09:55:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247415586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_empty.1247415586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.667485662 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 4171376592 ps |
| CPU time | 10.3 seconds |
| Started | Sep 09 09:55:13 AM UTC 24 |
| Finished | Sep 09 09:55:24 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=667485662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_host_lost.667485662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.1807763465 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 165577497 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 09:55:14 AM UTC 24 |
| Finished | Sep 09 09:55:17 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807763465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_reset.1807763465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.536860815 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 6328077329 ps |
| CPU time | 89.29 seconds |
| Started | Sep 09 09:55:29 AM UTC 24 |
| Finished | Sep 09 09:57:00 AM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=536860815 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.536860815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.755359240 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 184489355 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 09:55:30 AM UTC 24 |
| Finished | Sep 09 09:55:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=755359240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_rx_pid_err.755359240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.3318544597 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 170873989 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 09:57:53 AM UTC 24 |
| Finished | Sep 09 09:57:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318544597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.3318544597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.730037837 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 287182977 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:20:36 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=730037837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.730037837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.901557159 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 202041403 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 09:55:19 AM UTC 24 |
| Finished | Sep 09 09:55:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901557159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_nak_trans.901557159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.1682843918 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 210990504 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 09:56:09 AM UTC 24 |
| Finished | Sep 09 09:56:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682843918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.1682843918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.2378947566 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 3486001528 ps |
| CPU time | 22.14 seconds |
| Started | Sep 09 10:04:11 AM UTC 24 |
| Finished | Sep 09 10:04:34 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378947566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.2378947566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.1417806694 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 187168410 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:04:17 AM UTC 24 |
| Finished | Sep 09 10:04:19 AM UTC 24 |
| Peak memory | 214712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1417806694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_nak_trans.1417806694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.2115495662 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 220399302 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:04:43 AM UTC 24 |
| Finished | Sep 09 10:04:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2115495662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.2115495662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.631422849 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 225935013 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:05:31 AM UTC 24 |
| Finished | Sep 09 10:05:34 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=631422849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_nak_trans.631422849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.3583340050 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 215203333 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 10:06:00 AM UTC 24 |
| Finished | Sep 09 10:06:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3583340050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_nak_trans.3583340050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.498054825 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 187987492 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:08:14 AM UTC 24 |
| Finished | Sep 09 10:08:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=498054825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_nak_trans.498054825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.2841824469 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 237716603 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:09:26 AM UTC 24 |
| Finished | Sep 09 10:09:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841824469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_nak_trans.2841824469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.1826019665 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 697700439 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:19:23 AM UTC 24 |
| Finished | Sep 09 10:19:37 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1826019665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.1826019665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.22555286 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 225322161 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:12:30 AM UTC 24 |
| Finished | Sep 09 10:12:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=22555286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_nak_trans.22555286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.267510953 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 9012456094 ps |
| CPU time | 246.44 seconds |
| Started | Sep 09 09:59:59 AM UTC 24 |
| Finished | Sep 09 10:04:09 AM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=267510953 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_0 8/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.267510953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.3829950639 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 244676738 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:16:12 AM UTC 24 |
| Finished | Sep 09 10:16:15 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829950639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_nak_trans.3829950639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.44323880 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 159835182 ps |
| CPU time | 3.02 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:47 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=44323880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/ cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.44323880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2460751318 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 975744887 ps |
| CPU time | 4.04 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:48 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460751318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.2460751318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.4091346982 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 59949131 ps |
| CPU time | 0.81 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 216040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4091346982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.4091346982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.3249446545 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 133303823 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:35 AM UTC 24 |
| Peak memory | 226816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249446545 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.3249446545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.1296588676 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 69728065 ps |
| CPU time | 0.74 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296588676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.1296588676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.2769958763 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 94584345 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 225204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769958763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.2769958763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.549771755 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 254781034 ps |
| CPU time | 2.16 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:46 AM UTC 24 |
| Peak memory | 217540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=549771755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.549771755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2368725892 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 78070105 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:35 AM UTC 24 |
| Peak memory | 216868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368725892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.2368725892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.3089055530 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 104688694 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 216716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089055530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.3089055530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.1896277542 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 828107638 ps |
| CPU time | 4.24 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:48 AM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896277542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.1896277542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.2049253169 |
| Short name | T3823 |
| Test name | |
| Test status | |
| Simulation time | 115626454 ps |
| CPU time | 2.79 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 219240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2049253169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.2049253169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.3972338123 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 1337048558 ps |
| CPU time | 4.5 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:49 AM UTC 24 |
| Peak memory | 217552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3972338123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.3972338123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.246488083 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 86259985 ps |
| CPU time | 0.76 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 216208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=246488083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.246488083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2726386784 |
| Short name | T3822 |
| Test name | |
| Test status | |
| Simulation time | 122247202 ps |
| CPU time | 2.31 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 227856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726386784 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.2726386784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.3093568886 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 90106495 ps |
| CPU time | 0.74 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3093568886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.3093568886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.2603869607 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 137825263 ps |
| CPU time | 2.14 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:46 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603869607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.2603869607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.4280753141 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 220371901 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:46 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280753141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.4280753141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2166526745 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 132134465 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:35 AM UTC 24 |
| Peak memory | 216736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166526745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.2166526745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3590350931 |
| Short name | T3831 |
| Test name | |
| Test status | |
| Simulation time | 191943774 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:55 AM UTC 24 |
| Peak memory | 226880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590350931 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.3590350931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.145397240 |
| Short name | T3825 |
| Test name | |
| Test status | |
| Simulation time | 58644721 ps |
| CPU time | 0.8 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=145397240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.145397240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.4281037697 |
| Short name | T3824 |
| Test name | |
| Test status | |
| Simulation time | 42642465 ps |
| CPU time | 0.66 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281037697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.4281037697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.570058176 |
| Short name | T3830 |
| Test name | |
| Test status | |
| Simulation time | 109317313 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:55 AM UTC 24 |
| Peak memory | 216960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=570058176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.570058176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.1622403964 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 262946925 ps |
| CPU time | 2.45 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:56 AM UTC 24 |
| Peak memory | 233808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622403964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.1622403964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3570132581 |
| Short name | T3840 |
| Test name | |
| Test status | |
| Simulation time | 725912320 ps |
| CPU time | 3.6 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:57 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570132581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.3570132581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2742374085 |
| Short name | T3835 |
| Test name | |
| Test status | |
| Simulation time | 83703902 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:55 AM UTC 24 |
| Peak memory | 226880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742374085 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.2742374085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.1244335060 |
| Short name | T3827 |
| Test name | |
| Test status | |
| Simulation time | 44892356 ps |
| CPU time | 0.7 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244335060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.1244335060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2026962976 |
| Short name | T3836 |
| Test name | |
| Test status | |
| Simulation time | 331208785 ps |
| CPU time | 1.99 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:56 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2026962976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.2026962976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.155732545 |
| Short name | T3837 |
| Test name | |
| Test status | |
| Simulation time | 562921781 ps |
| CPU time | 2.54 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:56 AM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=155732545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.155732545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.3805393073 |
| Short name | T3832 |
| Test name | |
| Test status | |
| Simulation time | 160810170 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:55 AM UTC 24 |
| Peak memory | 226892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3805393073 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.3805393073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.2402869717 |
| Short name | T3829 |
| Test name | |
| Test status | |
| Simulation time | 40182250 ps |
| CPU time | 0.75 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:55 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402869717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.2402869717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.3770389993 |
| Short name | T3828 |
| Test name | |
| Test status | |
| Simulation time | 41878692 ps |
| CPU time | 0.68 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770389993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.3770389993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2680425019 |
| Short name | T3834 |
| Test name | |
| Test status | |
| Simulation time | 180086391 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:55 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680425019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.2680425019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.3326531551 |
| Short name | T3841 |
| Test name | |
| Test status | |
| Simulation time | 350378673 ps |
| CPU time | 3.26 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:57 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326531551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.3326531551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.1946748873 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 1332805631 ps |
| CPU time | 4.17 seconds |
| Started | Sep 09 10:20:52 AM UTC 24 |
| Finished | Sep 09 10:20:58 AM UTC 24 |
| Peak memory | 217620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946748873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.1946748873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.568808294 |
| Short name | T3856 |
| Test name | |
| Test status | |
| Simulation time | 143745169 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:21:01 AM UTC 24 |
| Peak memory | 226980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=568808294 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.568808294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.3177968446 |
| Short name | T3839 |
| Test name | |
| Test status | |
| Simulation time | 39303698 ps |
| CPU time | 0.71 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:20:57 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177968446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.3177968446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.587092623 |
| Short name | T3838 |
| Test name | |
| Test status | |
| Simulation time | 54573947 ps |
| CPU time | 0.64 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:20:57 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=587092623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.587092623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.2530175903 |
| Short name | T3854 |
| Test name | |
| Test status | |
| Simulation time | 100263174 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:21:00 AM UTC 24 |
| Peak memory | 218848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530175903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.2530175903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.3505139934 |
| Short name | T3843 |
| Test name | |
| Test status | |
| Simulation time | 151844242 ps |
| CPU time | 1.84 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:20:58 AM UTC 24 |
| Peak memory | 226876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505139934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.3505139934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.3449418776 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 519337897 ps |
| CPU time | 2.45 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:20:59 AM UTC 24 |
| Peak memory | 217492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449418776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.3449418776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.1611529568 |
| Short name | T3866 |
| Test name | |
| Test status | |
| Simulation time | 136433966 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:21:05 AM UTC 24 |
| Peak memory | 226612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611529568 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.1611529568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.3802762332 |
| Short name | T3864 |
| Test name | |
| Test status | |
| Simulation time | 121008847 ps |
| CPU time | 0.79 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:21:04 AM UTC 24 |
| Peak memory | 216676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802762332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.3802762332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.2326880151 |
| Short name | T3853 |
| Test name | |
| Test status | |
| Simulation time | 66201401 ps |
| CPU time | 0.71 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:21:00 AM UTC 24 |
| Peak memory | 216560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326880151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.2326880151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.4072964690 |
| Short name | T3867 |
| Test name | |
| Test status | |
| Simulation time | 342838564 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:21:05 AM UTC 24 |
| Peak memory | 216464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072964690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.4072964690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.2037017792 |
| Short name | T3859 |
| Test name | |
| Test status | |
| Simulation time | 140237568 ps |
| CPU time | 2.51 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:21:02 AM UTC 24 |
| Peak memory | 231776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037017792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.2037017792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.1793106409 |
| Short name | T3857 |
| Test name | |
| Test status | |
| Simulation time | 371467568 ps |
| CPU time | 2.28 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:21:02 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1793106409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.1793106409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.841818052 |
| Short name | T3847 |
| Test name | |
| Test status | |
| Simulation time | 173271194 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:20:59 AM UTC 24 |
| Peak memory | 228796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=841818052 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.841818052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.343039371 |
| Short name | T3845 |
| Test name | |
| Test status | |
| Simulation time | 48161885 ps |
| CPU time | 0.89 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:20:58 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=343039371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.343039371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.3836268396 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 41453704 ps |
| CPU time | 0.65 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:20:58 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836268396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.3836268396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.2978838427 |
| Short name | T3846 |
| Test name | |
| Test status | |
| Simulation time | 160591080 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:20:59 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978838427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.2978838427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.939588989 |
| Short name | T3872 |
| Test name | |
| Test status | |
| Simulation time | 134979783 ps |
| CPU time | 2.63 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:21:10 AM UTC 24 |
| Peak memory | 234204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=939588989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.939588989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.67525099 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 2045412034 ps |
| CPU time | 5.27 seconds |
| Started | Sep 09 10:20:55 AM UTC 24 |
| Finished | Sep 09 10:21:09 AM UTC 24 |
| Peak memory | 217512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=67525099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SE Q=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.67525099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.1758080856 |
| Short name | T3865 |
| Test name | |
| Test status | |
| Simulation time | 148902026 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:04 AM UTC 24 |
| Peak memory | 226828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758080856 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.1758080856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.889634936 |
| Short name | T3860 |
| Test name | |
| Test status | |
| Simulation time | 135862972 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:04 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=889634936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.889634936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.1470127596 |
| Short name | T3844 |
| Test name | |
| Test status | |
| Simulation time | 47971552 ps |
| CPU time | 0.67 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:20:58 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470127596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.1470127596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.2018867540 |
| Short name | T3863 |
| Test name | |
| Test status | |
| Simulation time | 170843998 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:04 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2018867540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.2018867540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.3771123188 |
| Short name | T3852 |
| Test name | |
| Test status | |
| Simulation time | 78143650 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:20:59 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3771123188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.3771123188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.1601322420 |
| Short name | T3858 |
| Test name | |
| Test status | |
| Simulation time | 971922266 ps |
| CPU time | 3.93 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:02 AM UTC 24 |
| Peak memory | 217712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601322420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.1601322420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.915570591 |
| Short name | T3877 |
| Test name | |
| Test status | |
| Simulation time | 83185950 ps |
| CPU time | 2.07 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:16 AM UTC 24 |
| Peak memory | 227916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=915570591 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.915570591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.735759173 |
| Short name | T3874 |
| Test name | |
| Test status | |
| Simulation time | 102603387 ps |
| CPU time | 0.92 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:15 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=735759173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.735759173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.4160806276 |
| Short name | T3873 |
| Test name | |
| Test status | |
| Simulation time | 39766047 ps |
| CPU time | 0.67 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:15 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160806276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.4160806276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3025161207 |
| Short name | T3875 |
| Test name | |
| Test status | |
| Simulation time | 152686673 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:15 AM UTC 24 |
| Peak memory | 216244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025161207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.3025161207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.1107348088 |
| Short name | T3868 |
| Test name | |
| Test status | |
| Simulation time | 113307850 ps |
| CPU time | 2.45 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:05 AM UTC 24 |
| Peak memory | 231812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107348088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.1107348088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.1853425238 |
| Short name | T3869 |
| Test name | |
| Test status | |
| Simulation time | 862968641 ps |
| CPU time | 4.65 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:08 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853425238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.1853425238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.1480490327 |
| Short name | T3851 |
| Test name | |
| Test status | |
| Simulation time | 100982518 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:20:59 AM UTC 24 |
| Peak memory | 226880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1480490327 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.1480490327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.1531076159 |
| Short name | T3849 |
| Test name | |
| Test status | |
| Simulation time | 76551497 ps |
| CPU time | 0.82 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:20:59 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531076159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.1531076159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.3134436833 |
| Short name | T3848 |
| Test name | |
| Test status | |
| Simulation time | 48188120 ps |
| CPU time | 0.63 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:20:59 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134436833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.3134436833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.948232873 |
| Short name | T3850 |
| Test name | |
| Test status | |
| Simulation time | 94788343 ps |
| CPU time | 0.96 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:20:59 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=948232873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.948232873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.2284359931 |
| Short name | T3876 |
| Test name | |
| Test status | |
| Simulation time | 173345615 ps |
| CPU time | 1.91 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:16 AM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284359931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.2284359931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.1344928866 |
| Short name | T3904 |
| Test name | |
| Test status | |
| Simulation time | 131104660 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:21:07 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 226828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344928866 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.1344928866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.2225785921 |
| Short name | T3878 |
| Test name | |
| Test status | |
| Simulation time | 63287877 ps |
| CPU time | 0.77 seconds |
| Started | Sep 09 10:21:07 AM UTC 24 |
| Finished | Sep 09 10:21:19 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2225785921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.2225785921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.2277330763 |
| Short name | T3879 |
| Test name | |
| Test status | |
| Simulation time | 84055091 ps |
| CPU time | 0.7 seconds |
| Started | Sep 09 10:21:07 AM UTC 24 |
| Finished | Sep 09 10:21:19 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277330763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.2277330763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.4195375936 |
| Short name | T3870 |
| Test name | |
| Test status | |
| Simulation time | 114167423 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 10:21:07 AM UTC 24 |
| Finished | Sep 09 10:21:09 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195375936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.4195375936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.530856805 |
| Short name | T3855 |
| Test name | |
| Test status | |
| Simulation time | 101057002 ps |
| CPU time | 2.07 seconds |
| Started | Sep 09 10:20:56 AM UTC 24 |
| Finished | Sep 09 10:21:00 AM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=530856805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.530856805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.375580726 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 1654215379 ps |
| CPU time | 5.17 seconds |
| Started | Sep 09 10:21:07 AM UTC 24 |
| Finished | Sep 09 10:21:24 AM UTC 24 |
| Peak memory | 217576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=375580726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.375580726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.1539355310 |
| Short name | T3817 |
| Test name | |
| Test status | |
| Simulation time | 379444769 ps |
| CPU time | 3.36 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:52 AM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539355310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.1539355310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.3889383232 |
| Short name | T3818 |
| Test name | |
| Test status | |
| Simulation time | 536371937 ps |
| CPU time | 3.88 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:52 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3889383232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.3889383232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2258937121 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 77312614 ps |
| CPU time | 0.91 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:49 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258937121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.2258937121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2352428232 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 139276505 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 226832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352428232 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.2352428232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.1743645751 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 75800123 ps |
| CPU time | 0.74 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:49 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1743645751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.1743645751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.2308678350 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 37639951 ps |
| CPU time | 0.6 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:39 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308678350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.2308678350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.3600640470 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 82808804 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:40 AM UTC 24 |
| Peak memory | 226848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600640470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.3600640470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.2010863260 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 160273379 ps |
| CPU time | 2.09 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:30 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010863260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.2010863260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.1124144405 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 123300067 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124144405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.1124144405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.2497855997 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 258771821 ps |
| CPU time | 2.13 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:30 AM UTC 24 |
| Peak memory | 217640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2497855997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.2497855997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.2463207998 |
| Short name | T3881 |
| Test name | |
| Test status | |
| Simulation time | 64469714 ps |
| CPU time | 0.77 seconds |
| Started | Sep 09 10:21:07 AM UTC 24 |
| Finished | Sep 09 10:21:19 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463207998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.2463207998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.3108751185 |
| Short name | T3880 |
| Test name | |
| Test status | |
| Simulation time | 51928813 ps |
| CPU time | 0.67 seconds |
| Started | Sep 09 10:21:07 AM UTC 24 |
| Finished | Sep 09 10:21:19 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108751185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.3108751185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.3421750284 |
| Short name | T3883 |
| Test name | |
| Test status | |
| Simulation time | 68769512 ps |
| CPU time | 0.76 seconds |
| Started | Sep 09 10:21:07 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421750284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.3421750284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.3908992879 |
| Short name | T3882 |
| Test name | |
| Test status | |
| Simulation time | 39599068 ps |
| CPU time | 0.71 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908992879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.3908992879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.3367358748 |
| Short name | T3890 |
| Test name | |
| Test status | |
| Simulation time | 41691700 ps |
| CPU time | 0.85 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367358748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.3367358748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.2539462024 |
| Short name | T3886 |
| Test name | |
| Test status | |
| Simulation time | 64597398 ps |
| CPU time | 0.69 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539462024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.2539462024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.902712302 |
| Short name | T3888 |
| Test name | |
| Test status | |
| Simulation time | 47879127 ps |
| CPU time | 0.73 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=902712302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.902712302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.2684214523 |
| Short name | T3891 |
| Test name | |
| Test status | |
| Simulation time | 57765612 ps |
| CPU time | 0.82 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684214523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.2684214523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.163744495 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 49552940 ps |
| CPU time | 0.7 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=163744495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.163744495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.3068637075 |
| Short name | T3885 |
| Test name | |
| Test status | |
| Simulation time | 78958912 ps |
| CPU time | 0.78 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068637075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.3068637075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.2519742080 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 104320129 ps |
| CPU time | 2.07 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519742080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.2519742080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2327276604 |
| Short name | T3819 |
| Test name | |
| Test status | |
| Simulation time | 184667340 ps |
| CPU time | 3.52 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:52 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327276604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.2327276604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.838872876 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 308792836 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=838872876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.838872876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.2415590266 |
| Short name | T3809 |
| Test name | |
| Test status | |
| Simulation time | 125418976 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:20:27 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 234520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415590266 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.2415590266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.1140184439 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 46001325 ps |
| CPU time | 0.95 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140184439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.1140184439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.3621941582 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 51454873 ps |
| CPU time | 0.68 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:49 AM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621941582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.3621941582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.3832130297 |
| Short name | T3814 |
| Test name | |
| Test status | |
| Simulation time | 77689383 ps |
| CPU time | 1.87 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 226832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832130297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.3832130297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.1944678583 |
| Short name | T3821 |
| Test name | |
| Test status | |
| Simulation time | 703427491 ps |
| CPU time | 4.52 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:53 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944678583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.1944678583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.1791881138 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 206424219 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:20:27 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1791881138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.1791881138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.2444779992 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 74785134 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2444779992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.2444779992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3187065902 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 390703783 ps |
| CPU time | 3.16 seconds |
| Started | Sep 09 10:20:26 AM UTC 24 |
| Finished | Sep 09 10:20:52 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187065902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.3187065902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.2869316671 |
| Short name | T3861 |
| Test name | |
| Test status | |
| Simulation time | 44837617 ps |
| CPU time | 0.82 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869316671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.2869316671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.2655715834 |
| Short name | T3887 |
| Test name | |
| Test status | |
| Simulation time | 74632036 ps |
| CPU time | 0.7 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655715834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.2655715834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3438286698 |
| Short name | T3884 |
| Test name | |
| Test status | |
| Simulation time | 61312968 ps |
| CPU time | 0.73 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3438286698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.3438286698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.2541613095 |
| Short name | T3862 |
| Test name | |
| Test status | |
| Simulation time | 53358779 ps |
| CPU time | 0.74 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541613095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.2541613095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1321863678 |
| Short name | T3889 |
| Test name | |
| Test status | |
| Simulation time | 42480363 ps |
| CPU time | 0.65 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1321863678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.1321863678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3322607651 |
| Short name | T3895 |
| Test name | |
| Test status | |
| Simulation time | 39511079 ps |
| CPU time | 0.9 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3322607651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.3322607651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.1252798984 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 41819648 ps |
| CPU time | 0.67 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252798984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.1252798984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.4080809698 |
| Short name | T3892 |
| Test name | |
| Test status | |
| Simulation time | 37127611 ps |
| CPU time | 0.7 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4080809698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.4080809698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1149265164 |
| Short name | T3894 |
| Test name | |
| Test status | |
| Simulation time | 35570229 ps |
| CPU time | 0.77 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149265164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.1149265164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.3971932526 |
| Short name | T3893 |
| Test name | |
| Test status | |
| Simulation time | 54790889 ps |
| CPU time | 0.74 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971932526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.3971932526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.3067038099 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 207014156 ps |
| CPU time | 2.08 seconds |
| Started | Sep 09 10:20:36 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067038099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.3067038099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1980599300 |
| Short name | T3820 |
| Test name | |
| Test status | |
| Simulation time | 671097569 ps |
| CPU time | 4.09 seconds |
| Started | Sep 09 10:20:36 AM UTC 24 |
| Finished | Sep 09 10:20:52 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980599300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.1980599300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.2646822032 |
| Short name | T3810 |
| Test name | |
| Test status | |
| Simulation time | 160651184 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:20:31 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2646822032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.2646822032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.2599001900 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 142387754 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:20:36 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 226876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599001900 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.2599001900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.1739047837 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 44033057 ps |
| CPU time | 0.69 seconds |
| Started | Sep 09 10:20:31 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1739047837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.1739047837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2865412443 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 39800221 ps |
| CPU time | 0.86 seconds |
| Started | Sep 09 10:20:27 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865412443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.2865412443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.1597837294 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 97291824 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:20:31 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 226768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597837294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.1597837294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.3710007588 |
| Short name | T3815 |
| Test name | |
| Test status | |
| Simulation time | 108092330 ps |
| CPU time | 2.1 seconds |
| Started | Sep 09 10:20:27 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710007588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.3710007588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.3242259218 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 109587561 ps |
| CPU time | 2.48 seconds |
| Started | Sep 09 10:20:27 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 234884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3242259218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.3242259218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.2171976795 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 291092858 ps |
| CPU time | 2.19 seconds |
| Started | Sep 09 10:20:27 AM UTC 24 |
| Finished | Sep 09 10:20:30 AM UTC 24 |
| Peak memory | 217676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2171976795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.2171976795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.627948812 |
| Short name | T3898 |
| Test name | |
| Test status | |
| Simulation time | 55391070 ps |
| CPU time | 0.78 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=627948812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.627948812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3795004928 |
| Short name | T3897 |
| Test name | |
| Test status | |
| Simulation time | 49585538 ps |
| CPU time | 0.74 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795004928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.3795004928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.3685450970 |
| Short name | T3899 |
| Test name | |
| Test status | |
| Simulation time | 43416390 ps |
| CPU time | 0.82 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685450970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.3685450970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.1830264428 |
| Short name | T3896 |
| Test name | |
| Test status | |
| Simulation time | 44288695 ps |
| CPU time | 0.68 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830264428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.1830264428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.2264295996 |
| Short name | T3901 |
| Test name | |
| Test status | |
| Simulation time | 30895165 ps |
| CPU time | 0.79 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264295996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.2264295996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.3193933695 |
| Short name | T3900 |
| Test name | |
| Test status | |
| Simulation time | 60683147 ps |
| CPU time | 0.73 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3193933695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.3193933695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.3312794273 |
| Short name | T3902 |
| Test name | |
| Test status | |
| Simulation time | 30751516 ps |
| CPU time | 0.81 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312794273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.3312794273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.1992074008 |
| Short name | T3871 |
| Test name | |
| Test status | |
| Simulation time | 36321471 ps |
| CPU time | 0.63 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:10 AM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992074008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.1992074008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.3284618966 |
| Short name | T3903 |
| Test name | |
| Test status | |
| Simulation time | 56212113 ps |
| CPU time | 0.77 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3284618966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.3284618966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.4189633791 |
| Short name | T3905 |
| Test name | |
| Test status | |
| Simulation time | 119611569 ps |
| CPU time | 0.79 seconds |
| Started | Sep 09 10:21:08 AM UTC 24 |
| Finished | Sep 09 10:21:20 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189633791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.4189633791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.630172240 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 87585320 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:20:36 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=630172240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.630172240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.2839786646 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 51726750 ps |
| CPU time | 0.8 seconds |
| Started | Sep 09 10:20:36 AM UTC 24 |
| Finished | Sep 09 10:20:49 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839786646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.2839786646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.1953919197 |
| Short name | T3812 |
| Test name | |
| Test status | |
| Simulation time | 196478062 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:20:37 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953919197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.1953919197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.1345299863 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 102298944 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:20:36 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1345299863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.1345299863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.3288041959 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 111416054 ps |
| CPU time | 1.94 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 226816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3288041959 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.3288041959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.1178677151 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 59535592 ps |
| CPU time | 0.95 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:49 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1178677151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.1178677151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.2287512557 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 47450661 ps |
| CPU time | 0.68 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:49 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287512557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.2287512557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.4060180900 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 136598875 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060180900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.4060180900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.333488746 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 82909522 ps |
| CPU time | 2.02 seconds |
| Started | Sep 09 10:20:41 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 227852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=333488746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.333488746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.3723143058 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 102060992 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 226812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723143058 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.3723143058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.2136812506 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 51799566 ps |
| CPU time | 0.77 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:49 AM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136812506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.2136812506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.1799082780 |
| Short name | T3813 |
| Test name | |
| Test status | |
| Simulation time | 153599538 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799082780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.1799082780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.3886591454 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 236201462 ps |
| CPU time | 2.27 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 234324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886591454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.3886591454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.1876410804 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 417774308 ps |
| CPU time | 2.47 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1876410804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.1876410804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.1687981961 |
| Short name | T3816 |
| Test name | |
| Test status | |
| Simulation time | 71651294 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:20:49 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 226828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687981961 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.1687981961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.2942219826 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 79153108 ps |
| CPU time | 0.82 seconds |
| Started | Sep 09 10:20:48 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942219826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.2942219826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.247855947 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 56784598 ps |
| CPU time | 0.92 seconds |
| Started | Sep 09 10:20:47 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=247855947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.247855947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.1485117608 |
| Short name | T3811 |
| Test name | |
| Test status | |
| Simulation time | 153377323 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:20:48 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485117608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.1485117608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.1409426152 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 72803862 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:50 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1409426152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.1409426152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.4126831396 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 343398018 ps |
| CPU time | 2.14 seconds |
| Started | Sep 09 10:20:46 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 217472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126831396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.4126831396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.896776104 |
| Short name | T3833 |
| Test name | |
| Test status | |
| Simulation time | 177052664 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:55 AM UTC 24 |
| Peak memory | 226812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=896776104 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.896776104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.3784663416 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 82994732 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3784663416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.3784663416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.1751415165 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 42537024 ps |
| CPU time | 0.65 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751415165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.1751415165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.884512084 |
| Short name | T3826 |
| Test name | |
| Test status | |
| Simulation time | 156032378 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:54 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=884512084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.884512084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.1879078168 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 185113383 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:20:49 AM UTC 24 |
| Finished | Sep 09 10:20:51 AM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1879078168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.1879078168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.3914474999 |
| Short name | T3842 |
| Test name | |
| Test status | |
| Simulation time | 711220266 ps |
| CPU time | 4.24 seconds |
| Started | Sep 09 10:20:51 AM UTC 24 |
| Finished | Sep 09 10:20:58 AM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3914474999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.3914474999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.2674188758 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 6210493533 ps |
| CPU time | 9.61 seconds |
| Started | Sep 09 09:55:05 AM UTC 24 |
| Finished | Sep 09 09:55:16 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674188758 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.2674188758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.1341846127 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 14143929263 ps |
| CPU time | 19.48 seconds |
| Started | Sep 09 09:55:05 AM UTC 24 |
| Finished | Sep 09 09:55:26 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341846127 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.1341846127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.3015536775 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 181553954 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 09:55:06 AM UTC 24 |
| Finished | Sep 09 09:55:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015536775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.3015536775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.496211553 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 140639453 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 09:55:08 AM UTC 24 |
| Finished | Sep 09 09:55:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=496211553 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.496211553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.2422494502 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 838812393 ps |
| CPU time | 2.51 seconds |
| Started | Sep 09 09:55:08 AM UTC 24 |
| Finished | Sep 09 09:55:11 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422494502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_disable_endpoint.2422494502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_enable.2720989233 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 53737570 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 09:55:09 AM UTC 24 |
| Finished | Sep 09 09:55:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2720989233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.2720989233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.681877183 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 870688596 ps |
| CPU time | 3.56 seconds |
| Started | Sep 09 09:55:09 AM UTC 24 |
| Finished | Sep 09 09:55:13 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=681877183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.681877183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.3495781692 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 282472357 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 09:55:09 AM UTC 24 |
| Finished | Sep 09 09:55:12 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495781692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.3495781692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.1061702441 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 270268709 ps |
| CPU time | 3.02 seconds |
| Started | Sep 09 09:55:11 AM UTC 24 |
| Finished | Sep 09 09:55:15 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061702441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.1061702441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.1973494341 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 86342274682 ps |
| CPU time | 179.04 seconds |
| Started | Sep 09 09:55:11 AM UTC 24 |
| Finished | Sep 09 09:58:13 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1973494341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.1973494341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.1939407279 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 96097216698 ps |
| CPU time | 142.26 seconds |
| Started | Sep 09 09:55:11 AM UTC 24 |
| Finished | Sep 09 09:57:36 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939407279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.1939407279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.2281694374 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 110244396532 ps |
| CPU time | 201.23 seconds |
| Started | Sep 09 09:55:11 AM UTC 24 |
| Finished | Sep 09 09:58:35 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2281694374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_loclk_max.2281694374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.3744945548 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 94125493393 ps |
| CPU time | 186.53 seconds |
| Started | Sep 09 09:55:13 AM UTC 24 |
| Finished | Sep 09 09:58:22 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744945548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.3744945548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.2982886688 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 190087826 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 09:55:13 AM UTC 24 |
| Finished | Sep 09 09:55:15 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982886688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.2982886688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.2677664015 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 138869097 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 09:55:13 AM UTC 24 |
| Finished | Sep 09 09:55:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677664015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_stall.2677664015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.2117864368 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 269124438 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 09:55:13 AM UTC 24 |
| Finished | Sep 09 09:55:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117864368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_trans.2117864368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.2468890404 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 4565785680 ps |
| CPU time | 53.69 seconds |
| Started | Sep 09 09:55:13 AM UTC 24 |
| Finished | Sep 09 09:56:08 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468890404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.2468890404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.2435415852 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 3590682285 ps |
| CPU time | 39.39 seconds |
| Started | Sep 09 09:55:13 AM UTC 24 |
| Finished | Sep 09 09:55:54 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435415852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.2435415852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.2088843584 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 233875873 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 09:55:14 AM UTC 24 |
| Finished | Sep 09 09:55:18 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2088843584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.2088843584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.2008828964 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 547420319 ps |
| CPU time | 1.99 seconds |
| Started | Sep 09 09:55:14 AM UTC 24 |
| Finished | Sep 09 09:55:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008828964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.2008828964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.3007565628 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 8991981738 ps |
| CPU time | 14.43 seconds |
| Started | Sep 09 09:55:15 AM UTC 24 |
| Finished | Sep 09 09:55:31 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007565628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_suspend.3007565628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.1429219496 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 5372633264 ps |
| CPU time | 151.17 seconds |
| Started | Sep 09 09:55:17 AM UTC 24 |
| Finished | Sep 09 09:57:51 AM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429219496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.1429219496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.1501738287 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 2060193381 ps |
| CPU time | 51.3 seconds |
| Started | Sep 09 09:55:17 AM UTC 24 |
| Finished | Sep 09 09:56:10 AM UTC 24 |
| Peak memory | 227424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501738287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.1501738287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.2294407459 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 245099730 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 09:55:17 AM UTC 24 |
| Finished | Sep 09 09:55:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294407459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.2294407459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.1499109149 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 206141931 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 09:55:17 AM UTC 24 |
| Finished | Sep 09 09:55:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1499109149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.1499109149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.1146089465 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 4103559044 ps |
| CPU time | 37.6 seconds |
| Started | Sep 09 09:55:17 AM UTC 24 |
| Finished | Sep 09 09:55:56 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146089465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.1146089465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.3881408420 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 156327448 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 09:55:18 AM UTC 24 |
| Finished | Sep 09 09:55:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881408420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.3881408420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.1486128889 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 171706848 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 09:55:18 AM UTC 24 |
| Finished | Sep 09 09:55:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486128889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.1486128889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.3749851388 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 502218330 ps |
| CPU time | 2.14 seconds |
| Started | Sep 09 09:55:18 AM UTC 24 |
| Finished | Sep 09 09:55:22 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749851388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.3749851388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.4232399965 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 182203104 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 09:55:19 AM UTC 24 |
| Finished | Sep 09 09:55:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232399965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_out_iso.4232399965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.551833683 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 213039716 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 09:55:20 AM UTC 24 |
| Finished | Sep 09 09:55:24 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=551833683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_out_stall.551833683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.746213976 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 161592537 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 09:55:21 AM UTC 24 |
| Finished | Sep 09 09:55:23 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=746213976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_out_trans_nak.746213976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.1779761798 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 153042764 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 09:55:22 AM UTC 24 |
| Finished | Sep 09 09:55:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779761798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.1779761798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.269926604 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 200347927 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 09:55:22 AM UTC 24 |
| Finished | Sep 09 09:55:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269926604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_b it_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.269926604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.294790473 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 204343823 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 09:55:22 AM UTC 24 |
| Finished | Sep 09 09:55:25 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=294790473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.294790473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.3261729803 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 219981718 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 09:55:23 AM UTC 24 |
| Finished | Sep 09 09:55:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3261729803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.3261729803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.3631114854 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 196956523 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 09:55:24 AM UTC 24 |
| Finished | Sep 09 09:55:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3631114854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.3631114854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.1286886131 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 168039270 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 09:55:26 AM UTC 24 |
| Finished | Sep 09 09:55:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286886131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_sent.1286886131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.1236687432 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 3283252069 ps |
| CPU time | 26.16 seconds |
| Started | Sep 09 09:55:28 AM UTC 24 |
| Finished | Sep 09 09:55:55 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1236687432 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.1236687432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.823213927 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 195667959 ps |
| CPU time | 1.05 seconds |
| Started | Sep 09 09:55:26 AM UTC 24 |
| Finished | Sep 09 09:55:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=823213927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_random_length_in_transaction.823213927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.4287062402 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 166508124 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 09:55:28 AM UTC 24 |
| Finished | Sep 09 09:55:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287062402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.4287062402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.737771742 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 20171908011 ps |
| CPU time | 35 seconds |
| Started | Sep 09 09:55:29 AM UTC 24 |
| Finished | Sep 09 09:56:05 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=737771742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_resume_link_active.737771742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.2207090696 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 332105411 ps |
| CPU time | 2.15 seconds |
| Started | Sep 09 09:55:29 AM UTC 24 |
| Finished | Sep 09 09:55:32 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207090696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_rx_full.2207090696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.2906570623 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 264636621 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 09:55:31 AM UTC 24 |
| Finished | Sep 09 09:55:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2906570623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.2906570623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.1491005125 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 147621901 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 09:55:32 AM UTC 24 |
| Finished | Sep 09 09:55:35 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491005125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.1491005125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.2472723783 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 242234644 ps |
| CPU time | 1.98 seconds |
| Started | Sep 09 09:55:33 AM UTC 24 |
| Finished | Sep 09 09:55:36 AM UTC 24 |
| Peak memory | 216716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472723783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.2472723783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.3412051334 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 2946430082 ps |
| CPU time | 81.73 seconds |
| Started | Sep 09 09:55:33 AM UTC 24 |
| Finished | Sep 09 09:56:57 AM UTC 24 |
| Peak memory | 229540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3412051334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.3412051334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.1459230229 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 180053253 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 09:55:35 AM UTC 24 |
| Finished | Sep 09 09:55:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459230229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.1459230229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.1726833397 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 800276947 ps |
| CPU time | 4.01 seconds |
| Started | Sep 09 09:55:36 AM UTC 24 |
| Finished | Sep 09 09:55:41 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726833397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.1726833397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.1046852240 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 3133732767 ps |
| CPU time | 29.15 seconds |
| Started | Sep 09 09:55:36 AM UTC 24 |
| Finished | Sep 09 09:56:06 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046852240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.1046852240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.1218875649 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 10461105107 ps |
| CPU time | 99.18 seconds |
| Started | Sep 09 09:55:37 AM UTC 24 |
| Finished | Sep 09 09:57:19 AM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218875649 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.1218875649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.1699445387 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 303158690 ps |
| CPU time | 5.46 seconds |
| Started | Sep 09 09:55:08 AM UTC 24 |
| Finished | Sep 09 09:55:14 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699445387 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.1699445387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.2347053762 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 512099584 ps |
| CPU time | 2.92 seconds |
| Started | Sep 09 09:55:37 AM UTC 24 |
| Finished | Sep 09 09:55:41 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2347053762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.2347053762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.1131837490 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 36717876 ps |
| CPU time | 1.01 seconds |
| Started | Sep 09 09:56:47 AM UTC 24 |
| Finished | Sep 09 09:56:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1131837490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.1131837490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.1501147105 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 15631180391 ps |
| CPU time | 27.63 seconds |
| Started | Sep 09 09:55:42 AM UTC 24 |
| Finished | Sep 09 09:56:11 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501147105 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.1501147105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.3282097935 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 23967815191 ps |
| CPU time | 47.68 seconds |
| Started | Sep 09 09:55:43 AM UTC 24 |
| Finished | Sep 09 09:56:32 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282097935 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.3282097935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.2735725215 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 174425430 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 09:55:43 AM UTC 24 |
| Finished | Sep 09 09:55:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735725215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_av_buffer.2735725215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.1776881972 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 154848814 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 09:55:44 AM UTC 24 |
| Finished | Sep 09 09:55:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776881972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.1776881972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.2704097821 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 145005151 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 09:55:46 AM UTC 24 |
| Finished | Sep 09 09:55:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704097821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.2704097821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.1331858404 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 169201862 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 09:55:47 AM UTC 24 |
| Finished | Sep 09 09:55:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331858404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.1331858404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.2181619228 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 213853154 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 09:55:47 AM UTC 24 |
| Finished | Sep 09 09:55:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181619228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.2181619228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.1955290359 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 892555027 ps |
| CPU time | 4.25 seconds |
| Started | Sep 09 09:55:49 AM UTC 24 |
| Finished | Sep 09 09:55:54 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1955290359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.1955290359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.985213043 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 23173435528 ps |
| CPU time | 65.81 seconds |
| Started | Sep 09 09:55:50 AM UTC 24 |
| Finished | Sep 09 09:56:58 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=985213043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_device_address.985213043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.1639350074 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 728654851 ps |
| CPU time | 16.44 seconds |
| Started | Sep 09 09:55:50 AM UTC 24 |
| Finished | Sep 09 09:56:08 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1639350074 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.1639350074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.4170060644 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 707769318 ps |
| CPU time | 2.71 seconds |
| Started | Sep 09 09:55:52 AM UTC 24 |
| Finished | Sep 09 09:55:56 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170060644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_disable_endpoint.4170060644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.1351195623 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 157879292 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 09:55:52 AM UTC 24 |
| Finished | Sep 09 09:55:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1351195623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.1351195623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3990877079 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 40316009 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 09:55:53 AM UTC 24 |
| Finished | Sep 09 09:55:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3990877079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.3990877079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.730838974 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 851692670 ps |
| CPU time | 4.38 seconds |
| Started | Sep 09 09:55:56 AM UTC 24 |
| Finished | Sep 09 09:56:01 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=730838974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.730838974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.4248326195 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 166463030 ps |
| CPU time | 2.39 seconds |
| Started | Sep 09 09:55:56 AM UTC 24 |
| Finished | Sep 09 09:55:59 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248326195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_fifo_rst.4248326195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.2388388160 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 101185275417 ps |
| CPU time | 182.39 seconds |
| Started | Sep 09 09:55:56 AM UTC 24 |
| Finished | Sep 09 09:59:01 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388388160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.2388388160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.2454150114 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 88092549616 ps |
| CPU time | 145.08 seconds |
| Started | Sep 09 09:55:56 AM UTC 24 |
| Finished | Sep 09 09:58:23 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2454150114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.2454150114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.4243324005 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 90110962351 ps |
| CPU time | 140.16 seconds |
| Started | Sep 09 09:55:57 AM UTC 24 |
| Finished | Sep 09 09:58:19 AM UTC 24 |
| Peak memory | 217508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4243324005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.4243324005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.14164631 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 86976864941 ps |
| CPU time | 193.38 seconds |
| Started | Sep 09 09:55:57 AM UTC 24 |
| Finished | Sep 09 09:59:13 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=14164631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_n ame 1.usbdev_freq_loclk_max.14164631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.1950211417 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 101188234569 ps |
| CPU time | 176.61 seconds |
| Started | Sep 09 09:55:58 AM UTC 24 |
| Finished | Sep 09 09:58:57 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950211417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.1950211417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.990722336 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 225688262 ps |
| CPU time | 1.91 seconds |
| Started | Sep 09 09:56:00 AM UTC 24 |
| Finished | Sep 09 09:56:03 AM UTC 24 |
| Peak memory | 227352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=990722336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.990722336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.42612141 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 138255418 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 09:56:00 AM UTC 24 |
| Finished | Sep 09 09:56:02 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=42612141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_in_stall.42612141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.1002520032 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 205439179 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 09:56:00 AM UTC 24 |
| Finished | Sep 09 09:56:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1002520032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_trans.1002520032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.3453389138 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 4756451684 ps |
| CPU time | 45.24 seconds |
| Started | Sep 09 09:56:00 AM UTC 24 |
| Finished | Sep 09 09:56:47 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453389138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.3453389138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.3702215359 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 5668915626 ps |
| CPU time | 62.49 seconds |
| Started | Sep 09 09:56:00 AM UTC 24 |
| Finished | Sep 09 09:57:04 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702215359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.3702215359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.996561112 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 256740626 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 09:56:02 AM UTC 24 |
| Finished | Sep 09 09:56:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=996561112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_link_in_err.996561112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.2718968231 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 27127767943 ps |
| CPU time | 45.61 seconds |
| Started | Sep 09 09:56:03 AM UTC 24 |
| Finished | Sep 09 09:56:50 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718968231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.2718968231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.1342382879 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 9188930527 ps |
| CPU time | 26.79 seconds |
| Started | Sep 09 09:56:03 AM UTC 24 |
| Finished | Sep 09 09:56:31 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342382879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.1342382879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.3197234023 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 3223443340 ps |
| CPU time | 89.6 seconds |
| Started | Sep 09 09:56:03 AM UTC 24 |
| Finished | Sep 09 09:57:35 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197234023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.3197234023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.1636005329 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 3517323042 ps |
| CPU time | 43.72 seconds |
| Started | Sep 09 09:56:05 AM UTC 24 |
| Finished | Sep 09 09:56:50 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636005329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1636005329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.53902324 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 236767037 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 09:56:06 AM UTC 24 |
| Finished | Sep 09 09:56:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=53902324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.53902324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.1646493640 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 193891159 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 09:56:06 AM UTC 24 |
| Finished | Sep 09 09:56:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646493640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.1646493640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.1325894991 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 2430205327 ps |
| CPU time | 32.33 seconds |
| Started | Sep 09 09:56:06 AM UTC 24 |
| Finished | Sep 09 09:56:39 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325894991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.1325894991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.487330470 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 1917972151 ps |
| CPU time | 24.19 seconds |
| Started | Sep 09 09:56:07 AM UTC 24 |
| Finished | Sep 09 09:56:32 AM UTC 24 |
| Peak memory | 229544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=487330470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.487330470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.3448072107 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 3209600336 ps |
| CPU time | 32.17 seconds |
| Started | Sep 09 09:56:09 AM UTC 24 |
| Finished | Sep 09 09:56:43 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448072107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.3448072107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.1118994218 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 157058770 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 09:56:09 AM UTC 24 |
| Finished | Sep 09 09:56:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118994218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.1118994218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.3587718958 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 144954725 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 09:56:09 AM UTC 24 |
| Finished | Sep 09 09:56:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587718958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.3587718958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.3677119405 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 181199737 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 09:56:10 AM UTC 24 |
| Finished | Sep 09 09:56:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677119405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.3677119405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.3842946570 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 186279419 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 09:56:12 AM UTC 24 |
| Finished | Sep 09 09:56:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3842946570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.3842946570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.1642689215 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 209963018 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 09:56:13 AM UTC 24 |
| Finished | Sep 09 09:56:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1642689215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_out_trans_nak.1642689215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.1804373827 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 156813428 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 09:56:13 AM UTC 24 |
| Finished | Sep 09 09:56:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1804373827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_pending_in_trans.1804373827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.697905840 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 249663903 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 09:56:13 AM UTC 24 |
| Finished | Sep 09 09:56:16 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=697905840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.697905840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.3848014116 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 231525241 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 09:56:14 AM UTC 24 |
| Finished | Sep 09 09:56:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848014116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.3848014116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.51530892 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 153888900 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 09:56:15 AM UTC 24 |
| Finished | Sep 09 09:56:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=51530892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.51530892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.4066787015 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 53188802 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 09:56:16 AM UTC 24 |
| Finished | Sep 09 09:56:18 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066787015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.4066787015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.3992850761 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 17423802290 ps |
| CPU time | 59.28 seconds |
| Started | Sep 09 09:56:16 AM UTC 24 |
| Finished | Sep 09 09:57:17 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992850761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_buffer.3992850761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.3840918565 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 185100418 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 09:56:16 AM UTC 24 |
| Finished | Sep 09 09:56:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840918565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_pkt_received.3840918565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.802490545 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 171663985 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 09:56:17 AM UTC 24 |
| Finished | Sep 09 09:56:20 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=802490545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_pkt_sent.802490545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.100179452 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 6600184805 ps |
| CPU time | 52.03 seconds |
| Started | Sep 09 09:56:20 AM UTC 24 |
| Finished | Sep 09 09:57:13 AM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=100179452 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.100179452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.3767365316 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 6892425480 ps |
| CPU time | 43.47 seconds |
| Started | Sep 09 09:56:21 AM UTC 24 |
| Finished | Sep 09 09:57:06 AM UTC 24 |
| Peak memory | 227564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767365316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.3767365316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.3570720325 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 5332710943 ps |
| CPU time | 27.59 seconds |
| Started | Sep 09 09:56:21 AM UTC 24 |
| Finished | Sep 09 09:56:50 AM UTC 24 |
| Peak memory | 227632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570720325 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.3570720325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.1483316876 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 209103572 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 09:56:18 AM UTC 24 |
| Finished | Sep 09 09:56:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1483316876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_random_length_in_transaction.1483316876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.2736378748 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 194156606 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 09:56:19 AM UTC 24 |
| Finished | Sep 09 09:56:22 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2736378748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.2736378748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.1983283641 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 20172172181 ps |
| CPU time | 38.02 seconds |
| Started | Sep 09 09:56:22 AM UTC 24 |
| Finished | Sep 09 09:57:01 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983283641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.1983283641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.3119139499 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 134026645 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 09:56:23 AM UTC 24 |
| Finished | Sep 09 09:56:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119139499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_crc_err.3119139499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.2217222372 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 166624228 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 09:56:29 AM UTC 24 |
| Finished | Sep 09 09:56:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217222372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.2217222372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.2879656602 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 230259869 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 09:56:45 AM UTC 24 |
| Finished | Sep 09 09:56:47 AM UTC 24 |
| Peak memory | 249172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2879656602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.2879656602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.2760115240 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 435895120 ps |
| CPU time | 2.49 seconds |
| Started | Sep 09 09:56:32 AM UTC 24 |
| Finished | Sep 09 09:56:36 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760115240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.2760115240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.932296960 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 299225502 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 09:56:33 AM UTC 24 |
| Finished | Sep 09 09:56:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932296960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.932296960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.4045574163 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 153457269 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 09:56:33 AM UTC 24 |
| Finished | Sep 09 09:56:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4045574163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_setup_stage.4045574163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.1860774539 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 145189718 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 09:56:34 AM UTC 24 |
| Finished | Sep 09 09:56:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860774539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.1860774539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.1853080060 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 202117040 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 09:56:36 AM UTC 24 |
| Finished | Sep 09 09:56:39 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853080060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.1853080060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.166247440 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 2441680170 ps |
| CPU time | 66.38 seconds |
| Started | Sep 09 09:56:36 AM UTC 24 |
| Finished | Sep 09 09:57:44 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=166247440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.166247440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.384925428 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 146294303 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 09:56:37 AM UTC 24 |
| Finished | Sep 09 09:56:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=384925428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.384925428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.3314058431 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 186053412 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 09:56:37 AM UTC 24 |
| Finished | Sep 09 09:56:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314058431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.3314058431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.2346543118 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 675330767 ps |
| CPU time | 2.88 seconds |
| Started | Sep 09 09:56:40 AM UTC 24 |
| Finished | Sep 09 09:56:44 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346543118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.2346543118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.3378285701 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 2030594697 ps |
| CPU time | 16.22 seconds |
| Started | Sep 09 09:56:39 AM UTC 24 |
| Finished | Sep 09 09:56:57 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3378285701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_streaming_out.3378285701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.1257539963 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 555794314 ps |
| CPU time | 13.07 seconds |
| Started | Sep 09 09:55:50 AM UTC 24 |
| Finished | Sep 09 09:56:05 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1257539963 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.1257539963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.1976677309 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 630987068 ps |
| CPU time | 2.76 seconds |
| Started | Sep 09 09:56:44 AM UTC 24 |
| Finished | Sep 09 09:56:47 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1976677309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.1976677309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.413690853 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 55755083 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:04:27 AM UTC 24 |
| Finished | Sep 09 10:04:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=413690853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.413690853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.3458885564 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 10586073027 ps |
| CPU time | 30.16 seconds |
| Started | Sep 09 10:03:52 AM UTC 24 |
| Finished | Sep 09 10:04:24 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3458885564 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.3458885564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.3090860687 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 13314991795 ps |
| CPU time | 23.07 seconds |
| Started | Sep 09 10:03:53 AM UTC 24 |
| Finished | Sep 09 10:04:17 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3090860687 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.3090860687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.824921574 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 25895303689 ps |
| CPU time | 51.55 seconds |
| Started | Sep 09 10:03:54 AM UTC 24 |
| Finished | Sep 09 10:04:47 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=824921574 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.824921574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.3299818565 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 251891061 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:03:54 AM UTC 24 |
| Finished | Sep 09 10:03:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299818565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.3299818565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.87253349 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 173428455 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:03:54 AM UTC 24 |
| Finished | Sep 09 10:03:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=87253349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_bitstuff_err.87253349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.1514787373 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 458522127 ps |
| CPU time | 2.82 seconds |
| Started | Sep 09 10:03:56 AM UTC 24 |
| Finished | Sep 09 10:04:00 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514787373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_data_toggle_clear.1514787373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.787480769 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 632804331 ps |
| CPU time | 3.36 seconds |
| Started | Sep 09 10:03:58 AM UTC 24 |
| Finished | Sep 09 10:04:02 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=787480769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.787480769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.532959638 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 14221215222 ps |
| CPU time | 28.16 seconds |
| Started | Sep 09 10:03:58 AM UTC 24 |
| Finished | Sep 09 10:04:27 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=532959638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_device_address.532959638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.2770495295 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 6991293319 ps |
| CPU time | 44.36 seconds |
| Started | Sep 09 10:03:59 AM UTC 24 |
| Finished | Sep 09 10:04:45 AM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770495295 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.2770495295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.199128764 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 610634371 ps |
| CPU time | 3.05 seconds |
| Started | Sep 09 10:04:03 AM UTC 24 |
| Finished | Sep 09 10:04:07 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=199128764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_disable_endpoint.199128764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.3991609010 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 162118469 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:04:06 AM UTC 24 |
| Finished | Sep 09 10:04:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3991609010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.3991609010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_enable.1252572725 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 53486243 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:04:06 AM UTC 24 |
| Finished | Sep 09 10:04:08 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252572725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.1252572725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.2186080091 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 954515701 ps |
| CPU time | 4.02 seconds |
| Started | Sep 09 10:04:08 AM UTC 24 |
| Finished | Sep 09 10:04:13 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2186080091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.2186080091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.3225063109 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 750605494 ps |
| CPU time | 2.95 seconds |
| Started | Sep 09 10:04:08 AM UTC 24 |
| Finished | Sep 09 10:04:12 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3225063109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.3225063109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.3264989434 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 359496276 ps |
| CPU time | 3.14 seconds |
| Started | Sep 09 10:04:09 AM UTC 24 |
| Finished | Sep 09 10:04:13 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3264989434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_fifo_rst.3264989434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.2576714559 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 176923759 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:04:09 AM UTC 24 |
| Finished | Sep 09 10:04:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576714559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.2576714559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.2819315941 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 143824217 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:04:09 AM UTC 24 |
| Finished | Sep 09 10:04:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819315941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.2819315941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.1776706108 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 271255321 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:04:11 AM UTC 24 |
| Finished | Sep 09 10:04:13 AM UTC 24 |
| Peak memory | 214772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776706108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.1776706108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.884678869 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 2910430820 ps |
| CPU time | 29.35 seconds |
| Started | Sep 09 10:04:09 AM UTC 24 |
| Finished | Sep 09 10:04:40 AM UTC 24 |
| Peak memory | 234140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=884678869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.884678869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.2610852326 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 173346382 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:04:11 AM UTC 24 |
| Finished | Sep 09 10:04:13 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610852326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.2610852326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.3472084437 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 7375994093 ps |
| CPU time | 16.83 seconds |
| Started | Sep 09 10:04:11 AM UTC 24 |
| Finished | Sep 09 10:04:29 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472084437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.3472084437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.785625067 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 4611901413 ps |
| CPU time | 8.94 seconds |
| Started | Sep 09 10:04:11 AM UTC 24 |
| Finished | Sep 09 10:04:21 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=785625067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_suspend.785625067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.1166819709 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 4110328188 ps |
| CPU time | 45.9 seconds |
| Started | Sep 09 10:04:12 AM UTC 24 |
| Finished | Sep 09 10:05:00 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166819709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.1166819709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.3640819399 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 3960553231 ps |
| CPU time | 38.81 seconds |
| Started | Sep 09 10:04:12 AM UTC 24 |
| Finished | Sep 09 10:04:53 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3640819399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.3640819399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.3924640008 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 245224630 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:04:12 AM UTC 24 |
| Finished | Sep 09 10:04:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924640008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.3924640008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.910119478 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 198128846 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:04:14 AM UTC 24 |
| Finished | Sep 09 10:04:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=910119478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.910119478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.2272134315 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 3430453242 ps |
| CPU time | 25.83 seconds |
| Started | Sep 09 10:04:14 AM UTC 24 |
| Finished | Sep 09 10:04:41 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2272134315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.2272134315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.2252323481 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 2711556857 ps |
| CPU time | 22.43 seconds |
| Started | Sep 09 10:04:14 AM UTC 24 |
| Finished | Sep 09 10:04:37 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252323481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.2252323481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.660033579 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 2356964248 ps |
| CPU time | 25.07 seconds |
| Started | Sep 09 10:04:15 AM UTC 24 |
| Finished | Sep 09 10:04:41 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=660033579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.660033579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.3405017491 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 204125482 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:04:15 AM UTC 24 |
| Finished | Sep 09 10:04:18 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3405017491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.3405017491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.965085973 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 169827108 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:04:15 AM UTC 24 |
| Finished | Sep 09 10:04:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=965085973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.965085973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.2389015445 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 162459930 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:04:17 AM UTC 24 |
| Finished | Sep 09 10:04:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2389015445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.2389015445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.2383318361 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 172210451 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:04:17 AM UTC 24 |
| Finished | Sep 09 10:04:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2383318361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_out_stall.2383318361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.2262584984 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 177006856 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:04:18 AM UTC 24 |
| Finished | Sep 09 10:04:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262584984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_out_trans_nak.2262584984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.108610563 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 149943833 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:04:19 AM UTC 24 |
| Finished | Sep 09 10:04:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108610563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pending_in_trans.108610563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.153413834 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 174019889 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:04:19 AM UTC 24 |
| Finished | Sep 09 10:04:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=153413834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.153413834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.2621912619 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 147183013 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:04:19 AM UTC 24 |
| Finished | Sep 09 10:04:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2621912619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.2621912619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.3182895271 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 47348074 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:04:19 AM UTC 24 |
| Finished | Sep 09 10:04:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182895271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.3182895271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.2699878035 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 16806237400 ps |
| CPU time | 47.3 seconds |
| Started | Sep 09 10:04:20 AM UTC 24 |
| Finished | Sep 09 10:05:09 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2699878035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_pkt_buffer.2699878035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.3143559702 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 152123213 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:04:20 AM UTC 24 |
| Finished | Sep 09 10:04:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143559702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_pkt_received.3143559702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.739592231 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 203626615 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:04:21 AM UTC 24 |
| Finished | Sep 09 10:04:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=739592231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_pkt_sent.739592231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.2256548961 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 259822018 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:04:22 AM UTC 24 |
| Finished | Sep 09 10:04:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256548961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.2256548961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.765290295 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 179016678 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:04:22 AM UTC 24 |
| Finished | Sep 09 10:04:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=765290295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.765290295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.987307210 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 20148634876 ps |
| CPU time | 32.01 seconds |
| Started | Sep 09 10:04:22 AM UTC 24 |
| Finished | Sep 09 10:04:55 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=987307210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_resume_link_active.987307210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.1110289041 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 206284775 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:04:22 AM UTC 24 |
| Finished | Sep 09 10:04:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110289041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_rx_crc_err.1110289041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.2627896993 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 305150605 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:04:22 AM UTC 24 |
| Finished | Sep 09 10:04:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2627896993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_rx_full.2627896993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.2952874078 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 142836178 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:04:23 AM UTC 24 |
| Finished | Sep 09 10:04:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952874078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_setup_stage.2952874078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.2955932220 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 197443115 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:04:23 AM UTC 24 |
| Finished | Sep 09 10:04:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955932220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.2955932220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.13319088 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 268067235 ps |
| CPU time | 1.94 seconds |
| Started | Sep 09 10:04:25 AM UTC 24 |
| Finished | Sep 09 10:04:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=13319088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 10.usbdev_smoke.13319088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.2561846584 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 3586146606 ps |
| CPU time | 27.19 seconds |
| Started | Sep 09 10:04:25 AM UTC 24 |
| Finished | Sep 09 10:04:53 AM UTC 24 |
| Peak memory | 234112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561846584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.2561846584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.3769654678 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 197683207 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:04:25 AM UTC 24 |
| Finished | Sep 09 10:04:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769654678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.3769654678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.869297357 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 171841862 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:04:25 AM UTC 24 |
| Finished | Sep 09 10:04:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=869297357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_stall_trans.869297357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.3096840949 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 1210552778 ps |
| CPU time | 4.58 seconds |
| Started | Sep 09 10:04:26 AM UTC 24 |
| Finished | Sep 09 10:04:32 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3096840949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.3096840949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.1113232253 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 2921221218 ps |
| CPU time | 28.3 seconds |
| Started | Sep 09 10:04:25 AM UTC 24 |
| Finished | Sep 09 10:04:55 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1113232253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.1113232253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.1715670818 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 4861851868 ps |
| CPU time | 38.59 seconds |
| Started | Sep 09 10:04:00 AM UTC 24 |
| Finished | Sep 09 10:04:40 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715670818 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.1715670818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.2983466072 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 684480203 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2983466072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.2983466072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.774829211 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 286388689 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:17 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=774829211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 101.usbdev_fifo_levels.774829211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.1198193024 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 439914778 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:17 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1198193024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.1198193024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.1815404547 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 504690157 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1815404547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_ tx_rx_disruption.1815404547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.3704917669 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 399326634 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704917669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.3704917669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.3954821577 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 645861046 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3954821577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_ tx_rx_disruption.3954821577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.526740845 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 520571919 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=526740845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.526740845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.1943371298 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 512462209 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1943371298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.1943371298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.1734187100 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 728821510 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:14 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734187100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.1734187100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.2899225582 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 261497810 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 214896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899225582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 105.usbdev_fifo_levels.2899225582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.2684009298 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 593211363 ps |
| CPU time | 2.05 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:21 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2684009298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_ tx_rx_disruption.2684009298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.247209490 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 268457156 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:18:04 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 216396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=247209490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.247209490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.1301073124 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 531235764 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1301073124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_ tx_rx_disruption.1301073124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.1448651700 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 183082648 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448651700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 107.usbdev_fifo_levels.1448651700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3464106438 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 475369966 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3464106438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.3464106438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.835087049 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 569846551 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=835087049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_t x_rx_disruption.835087049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.2843062098 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 397313706 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843062098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.2843062098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.1150280568 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 510791140 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1150280568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.1150280568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.117913798 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 38551770 ps |
| CPU time | 0.85 seconds |
| Started | Sep 09 10:04:54 AM UTC 24 |
| Finished | Sep 09 10:04:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=117913798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.117913798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.3350332114 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 5728820867 ps |
| CPU time | 11.1 seconds |
| Started | Sep 09 10:04:27 AM UTC 24 |
| Finished | Sep 09 10:04:39 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3350332114 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.3350332114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.4140815076 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 18420873415 ps |
| CPU time | 28.14 seconds |
| Started | Sep 09 10:04:27 AM UTC 24 |
| Finished | Sep 09 10:04:56 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4140815076 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.4140815076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.3149377108 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 23706610069 ps |
| CPU time | 44.52 seconds |
| Started | Sep 09 10:04:28 AM UTC 24 |
| Finished | Sep 09 10:05:14 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149377108 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.3149377108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.2291410630 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 260211569 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:04:28 AM UTC 24 |
| Finished | Sep 09 10:04:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291410630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.2291410630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.2349568595 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 145979299 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:04:28 AM UTC 24 |
| Finished | Sep 09 10:04:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349568595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.2349568595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.2212168311 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 404540497 ps |
| CPU time | 2.21 seconds |
| Started | Sep 09 10:04:30 AM UTC 24 |
| Finished | Sep 09 10:04:33 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212168311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_data_toggle_clear.2212168311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.3008908593 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 39128098321 ps |
| CPU time | 80.19 seconds |
| Started | Sep 09 10:04:30 AM UTC 24 |
| Finished | Sep 09 10:05:52 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008908593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.3008908593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.604230642 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 1168540145 ps |
| CPU time | 26.13 seconds |
| Started | Sep 09 10:04:30 AM UTC 24 |
| Finished | Sep 09 10:04:57 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=604230642 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.604230642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.4104668096 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 636558851 ps |
| CPU time | 3.66 seconds |
| Started | Sep 09 10:04:32 AM UTC 24 |
| Finished | Sep 09 10:04:37 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104668096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.4104668096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.4094788707 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 133075429 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:04:32 AM UTC 24 |
| Finished | Sep 09 10:04:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4094788707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.4094788707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_enable.4096243211 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 35757035 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:04:32 AM UTC 24 |
| Finished | Sep 09 10:04:34 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096243211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.4096243211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.1584017222 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 1098333783 ps |
| CPU time | 5.14 seconds |
| Started | Sep 09 10:04:34 AM UTC 24 |
| Finished | Sep 09 10:04:40 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584017222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.1584017222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.4283180169 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 371115130 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:04:35 AM UTC 24 |
| Finished | Sep 09 10:04:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283180169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_fifo_levels.4283180169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.2125800169 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 163245636 ps |
| CPU time | 2.55 seconds |
| Started | Sep 09 10:04:35 AM UTC 24 |
| Finished | Sep 09 10:04:39 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125800169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_fifo_rst.2125800169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.4107967044 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 214344099 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:04:35 AM UTC 24 |
| Finished | Sep 09 10:04:38 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4107967044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.4107967044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.2065534349 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 141063455 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:04:37 AM UTC 24 |
| Finished | Sep 09 10:04:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065534349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_stall.2065534349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.748293458 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 247955696 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 10:04:38 AM UTC 24 |
| Finished | Sep 09 10:04:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=748293458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_in_trans.748293458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.1382242541 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 2635954370 ps |
| CPU time | 19.21 seconds |
| Started | Sep 09 10:04:35 AM UTC 24 |
| Finished | Sep 09 10:04:56 AM UTC 24 |
| Peak memory | 229788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382242541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.1382242541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.11398016 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 13277658077 ps |
| CPU time | 100.44 seconds |
| Started | Sep 09 10:04:39 AM UTC 24 |
| Finished | Sep 09 10:06:22 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=11398016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.11398016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.1196975356 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 226870546 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:04:39 AM UTC 24 |
| Finished | Sep 09 10:04:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196975356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.1196975356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.1580158999 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 11355825999 ps |
| CPU time | 15.49 seconds |
| Started | Sep 09 10:04:39 AM UTC 24 |
| Finished | Sep 09 10:04:56 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1580158999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_resume.1580158999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.288064769 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 5086646842 ps |
| CPU time | 10.48 seconds |
| Started | Sep 09 10:04:39 AM UTC 24 |
| Finished | Sep 09 10:04:51 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=288064769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_suspend.288064769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.2815433532 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 4119894881 ps |
| CPU time | 130.13 seconds |
| Started | Sep 09 10:04:41 AM UTC 24 |
| Finished | Sep 09 10:06:54 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815433532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.2815433532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.3236243336 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 3841089686 ps |
| CPU time | 109.35 seconds |
| Started | Sep 09 10:04:41 AM UTC 24 |
| Finished | Sep 09 10:06:33 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236243336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.3236243336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.3498533779 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 304069036 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:04:41 AM UTC 24 |
| Finished | Sep 09 10:04:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3498533779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.3498533779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.3974070824 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 184745586 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:04:41 AM UTC 24 |
| Finished | Sep 09 10:04:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974070824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.3974070824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.1001173831 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 2169121608 ps |
| CPU time | 21.24 seconds |
| Started | Sep 09 10:04:41 AM UTC 24 |
| Finished | Sep 09 10:05:04 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1001173831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.1001173831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.3964183890 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 2645761787 ps |
| CPU time | 86.92 seconds |
| Started | Sep 09 10:04:43 AM UTC 24 |
| Finished | Sep 09 10:06:12 AM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3964183890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.3964183890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.2841577049 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 3107582097 ps |
| CPU time | 23.86 seconds |
| Started | Sep 09 10:04:43 AM UTC 24 |
| Finished | Sep 09 10:05:08 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841577049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.2841577049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.3527999056 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 151381083 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:04:43 AM UTC 24 |
| Finished | Sep 09 10:04:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527999056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.3527999056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.2941809665 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 147215633 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:04:43 AM UTC 24 |
| Finished | Sep 09 10:04:46 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941809665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.2941809665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.2630944522 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 202610717 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:04:43 AM UTC 24 |
| Finished | Sep 09 10:04:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2630944522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_out_iso.2630944522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.3307624571 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 157239950 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:04:43 AM UTC 24 |
| Finished | Sep 09 10:04:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307624571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.3307624571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.2750556542 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 165446252 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:04:44 AM UTC 24 |
| Finished | Sep 09 10:04:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750556542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.2750556542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.2085690099 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 189473370 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:04:44 AM UTC 24 |
| Finished | Sep 09 10:04:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085690099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.2085690099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.280325616 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 211160443 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:04:45 AM UTC 24 |
| Finished | Sep 09 10:04:48 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=280325616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.280325616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.1596302550 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 141303431 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:04:45 AM UTC 24 |
| Finished | Sep 09 10:04:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1596302550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.1596302550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.468597803 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 40505286 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:04:47 AM UTC 24 |
| Finished | Sep 09 10:04:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=468597803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_phy_pins_sense.468597803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.3031839575 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 10265254757 ps |
| CPU time | 30.68 seconds |
| Started | Sep 09 10:04:47 AM UTC 24 |
| Finished | Sep 09 10:05:19 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3031839575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.3031839575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.1709095755 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 189562313 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:04:47 AM UTC 24 |
| Finished | Sep 09 10:04:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709095755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_pkt_received.1709095755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.3910717075 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 213509692 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:04:47 AM UTC 24 |
| Finished | Sep 09 10:04:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3910717075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.3910717075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.2525726763 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 262997399 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:04:47 AM UTC 24 |
| Finished | Sep 09 10:04:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2525726763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.2525726763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.1003179091 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 193320161 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:04:48 AM UTC 24 |
| Finished | Sep 09 10:04:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003179091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.1003179091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.1836465746 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 20185193161 ps |
| CPU time | 30.3 seconds |
| Started | Sep 09 10:04:48 AM UTC 24 |
| Finished | Sep 09 10:05:20 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836465746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_resume_link_active.1836465746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.3373972770 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 162467248 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:04:49 AM UTC 24 |
| Finished | Sep 09 10:04:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373972770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.3373972770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.2337605177 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 257901409 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:04:49 AM UTC 24 |
| Finished | Sep 09 10:04:52 AM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2337605177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.2337605177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.3951544348 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 162214812 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:04:49 AM UTC 24 |
| Finished | Sep 09 10:04:51 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3951544348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.3951544348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.275458330 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 221548054 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:04:50 AM UTC 24 |
| Finished | Sep 09 10:04:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=275458330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_setup_trans_ignored.275458330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.1506236816 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 276710680 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:04:50 AM UTC 24 |
| Finished | Sep 09 10:04:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506236816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.1506236816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.2886159673 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 2434169127 ps |
| CPU time | 22.15 seconds |
| Started | Sep 09 10:04:50 AM UTC 24 |
| Finished | Sep 09 10:05:14 AM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2886159673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.2886159673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.287529877 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 187893551 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:04:50 AM UTC 24 |
| Finished | Sep 09 10:04:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=287529877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.287529877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.1783933085 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 172686931 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:04:52 AM UTC 24 |
| Finished | Sep 09 10:04:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783933085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.1783933085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.615969831 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 815127296 ps |
| CPU time | 3.59 seconds |
| Started | Sep 09 10:04:52 AM UTC 24 |
| Finished | Sep 09 10:04:57 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=615969831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_stream_len_max.615969831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.103247520 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 2805058064 ps |
| CPU time | 23.13 seconds |
| Started | Sep 09 10:04:52 AM UTC 24 |
| Finished | Sep 09 10:05:16 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=103247520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_streaming_out.103247520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.3677946991 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 4930974125 ps |
| CPU time | 34.08 seconds |
| Started | Sep 09 10:04:31 AM UTC 24 |
| Finished | Sep 09 10:05:07 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677946991 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.3677946991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.1266748110 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 540550091 ps |
| CPU time | 3.09 seconds |
| Started | Sep 09 10:04:52 AM UTC 24 |
| Finished | Sep 09 10:04:56 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1266748110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_t x_rx_disruption.1266748110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.1689147638 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 170446092 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689147638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.1689147638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.149556903 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 513415564 ps |
| CPU time | 1.96 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=149556903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_t x_rx_disruption.149556903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.3473740919 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 292358426 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3473740919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.3473740919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3792899439 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 179030064 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3792899439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 111.usbdev_fifo_levels.3792899439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/111.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.2632852743 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 492543586 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:18:06 AM UTC 24 |
| Finished | Sep 09 10:18:16 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2632852743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_ tx_rx_disruption.2632852743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.2821076982 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 594375087 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:18:07 AM UTC 24 |
| Finished | Sep 09 10:18:16 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2821076982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.2821076982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.372172953 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 168548152 ps |
| CPU time | 0.76 seconds |
| Started | Sep 09 10:18:07 AM UTC 24 |
| Finished | Sep 09 10:18:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=372172953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 112.usbdev_fifo_levels.372172953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.2462501231 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 632958627 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:18:08 AM UTC 24 |
| Finished | Sep 09 10:18:31 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2462501231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.2462501231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.3526923488 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 312206160 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:18:08 AM UTC 24 |
| Finished | Sep 09 10:18:24 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3526923488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.3526923488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.3736280371 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 511374407 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:18:08 AM UTC 24 |
| Finished | Sep 09 10:18:31 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3736280371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_ tx_rx_disruption.3736280371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.795305061 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 272243225 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:18:10 AM UTC 24 |
| Finished | Sep 09 10:18:16 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=795305061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.795305061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.3299213819 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 165857337 ps |
| CPU time | 0.84 seconds |
| Started | Sep 09 10:18:10 AM UTC 24 |
| Finished | Sep 09 10:18:15 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299213819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 114.usbdev_fifo_levels.3299213819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.1490577448 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 527038527 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:18:10 AM UTC 24 |
| Finished | Sep 09 10:18:16 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1490577448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_ tx_rx_disruption.1490577448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.922802126 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 391722599 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:18:14 AM UTC 24 |
| Finished | Sep 09 10:18:16 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=922802126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.922802126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.4282398725 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 177964410 ps |
| CPU time | 0.8 seconds |
| Started | Sep 09 10:18:15 AM UTC 24 |
| Finished | Sep 09 10:18:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4282398725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 115.usbdev_fifo_levels.4282398725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/115.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.2363122738 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 501739181 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:18:15 AM UTC 24 |
| Finished | Sep 09 10:18:31 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2363122738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_ tx_rx_disruption.2363122738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.368016555 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 536771547 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:18:15 AM UTC 24 |
| Finished | Sep 09 10:18:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=368016555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.368016555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.1108047794 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 295545928 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:18:15 AM UTC 24 |
| Finished | Sep 09 10:18:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108047794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 116.usbdev_fifo_levels.1108047794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.3021187680 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 536358795 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:18:16 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 216756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3021187680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.3021187680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.676572398 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 738491866 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:18:16 AM UTC 24 |
| Finished | Sep 09 10:18:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=676572398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.676572398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.3137815295 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 255025753 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:18:16 AM UTC 24 |
| Finished | Sep 09 10:18:19 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3137815295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 117.usbdev_fifo_levels.3137815295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.3678222952 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 577701258 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:18:16 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3678222952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.3678222952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.1328162093 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 281219746 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:18:17 AM UTC 24 |
| Finished | Sep 09 10:18:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328162093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.1328162093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.1749331405 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 632615743 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:18:17 AM UTC 24 |
| Finished | Sep 09 10:18:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1749331405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.1749331405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.3453486004 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 634820259 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 10:18:17 AM UTC 24 |
| Finished | Sep 09 10:18:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3453486004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_ tx_rx_disruption.3453486004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.2080307428 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 79523668 ps |
| CPU time | 0.87 seconds |
| Started | Sep 09 10:05:16 AM UTC 24 |
| Finished | Sep 09 10:05:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080307428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.2080307428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.733690004 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 4762692265 ps |
| CPU time | 12.93 seconds |
| Started | Sep 09 10:04:54 AM UTC 24 |
| Finished | Sep 09 10:05:08 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=733690004 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.733690004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.385887968 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 13831523741 ps |
| CPU time | 25.42 seconds |
| Started | Sep 09 10:04:54 AM UTC 24 |
| Finished | Sep 09 10:05:20 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=385887968 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.385887968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.344710247 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 29954430094 ps |
| CPU time | 42.93 seconds |
| Started | Sep 09 10:04:54 AM UTC 24 |
| Finished | Sep 09 10:05:38 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=344710247 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.344710247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.1720154178 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 150663748 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:04:54 AM UTC 24 |
| Finished | Sep 09 10:04:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1720154178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_av_buffer.1720154178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.2479252273 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 140216957 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:04:54 AM UTC 24 |
| Finished | Sep 09 10:04:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2479252273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.2479252273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.3132535401 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 475620546 ps |
| CPU time | 3.1 seconds |
| Started | Sep 09 10:04:55 AM UTC 24 |
| Finished | Sep 09 10:04:59 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132535401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_data_toggle_clear.3132535401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.655387674 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 278444679 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:04:55 AM UTC 24 |
| Finished | Sep 09 10:04:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=655387674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.655387674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.3632090654 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 46983260728 ps |
| CPU time | 99.99 seconds |
| Started | Sep 09 10:04:55 AM UTC 24 |
| Finished | Sep 09 10:06:38 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632090654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.3632090654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.1944202887 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 1531582647 ps |
| CPU time | 10.12 seconds |
| Started | Sep 09 10:04:57 AM UTC 24 |
| Finished | Sep 09 10:05:08 AM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944202887 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.1944202887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.2304275013 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 895822046 ps |
| CPU time | 2.89 seconds |
| Started | Sep 09 10:04:57 AM UTC 24 |
| Finished | Sep 09 10:05:01 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2304275013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_disable_endpoint.2304275013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.2769246963 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 148625237 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:04:57 AM UTC 24 |
| Finished | Sep 09 10:05:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769246963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.2769246963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_enable.4008501754 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 41025707 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:04:57 AM UTC 24 |
| Finished | Sep 09 10:04:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008501754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_enable.4008501754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.2866954830 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 925338771 ps |
| CPU time | 2.94 seconds |
| Started | Sep 09 10:04:57 AM UTC 24 |
| Finished | Sep 09 10:05:01 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2866954830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.2866954830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.4138634710 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 408324423 ps |
| CPU time | 2.47 seconds |
| Started | Sep 09 10:04:57 AM UTC 24 |
| Finished | Sep 09 10:05:01 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138634710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.4138634710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.2301262879 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 479591439 ps |
| CPU time | 4.18 seconds |
| Started | Sep 09 10:04:58 AM UTC 24 |
| Finished | Sep 09 10:05:03 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301262879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_fifo_rst.2301262879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.546171910 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 215851468 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:04:59 AM UTC 24 |
| Finished | Sep 09 10:05:01 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=546171910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.546171910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.174775740 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 160364438 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:04:59 AM UTC 24 |
| Finished | Sep 09 10:05:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174775740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_stall.174775740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.4227259817 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 270997708 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:05:00 AM UTC 24 |
| Finished | Sep 09 10:05:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4227259817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.4227259817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.166953004 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 3976094380 ps |
| CPU time | 109.46 seconds |
| Started | Sep 09 10:04:59 AM UTC 24 |
| Finished | Sep 09 10:06:50 AM UTC 24 |
| Peak memory | 234216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=166953004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.166953004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.3122629628 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 12723149269 ps |
| CPU time | 155.86 seconds |
| Started | Sep 09 10:05:00 AM UTC 24 |
| Finished | Sep 09 10:07:39 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122629628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.3122629628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.3303775153 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 156612611 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:05:00 AM UTC 24 |
| Finished | Sep 09 10:05:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3303775153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_in_err.3303775153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.3586914261 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 31293253215 ps |
| CPU time | 61.97 seconds |
| Started | Sep 09 10:05:02 AM UTC 24 |
| Finished | Sep 09 10:06:05 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586914261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.3586914261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.4150057741 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 9611419625 ps |
| CPU time | 19.18 seconds |
| Started | Sep 09 10:05:02 AM UTC 24 |
| Finished | Sep 09 10:05:22 AM UTC 24 |
| Peak memory | 217204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150057741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_link_suspend.4150057741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.2500040374 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 4108597917 ps |
| CPU time | 35.84 seconds |
| Started | Sep 09 10:05:02 AM UTC 24 |
| Finished | Sep 09 10:05:39 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2500040374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.2500040374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.2334306283 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 3994807249 ps |
| CPU time | 114.76 seconds |
| Started | Sep 09 10:05:02 AM UTC 24 |
| Finished | Sep 09 10:06:59 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2334306283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.2334306283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.2889410286 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 295951628 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:05:02 AM UTC 24 |
| Finished | Sep 09 10:05:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889410286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.2889410286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.395028979 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 225386033 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:05:03 AM UTC 24 |
| Finished | Sep 09 10:05:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=395028979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.395028979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.1574610474 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 2796758358 ps |
| CPU time | 68.88 seconds |
| Started | Sep 09 10:05:03 AM UTC 24 |
| Finished | Sep 09 10:06:14 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574610474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.1574610474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.3898948186 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 3136803123 ps |
| CPU time | 37.43 seconds |
| Started | Sep 09 10:05:03 AM UTC 24 |
| Finished | Sep 09 10:05:42 AM UTC 24 |
| Peak memory | 234140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898948186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.3898948186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.1371402795 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 1979708296 ps |
| CPU time | 16.75 seconds |
| Started | Sep 09 10:05:03 AM UTC 24 |
| Finished | Sep 09 10:05:21 AM UTC 24 |
| Peak memory | 229384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371402795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.1371402795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.3701501842 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 166341581 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:05:04 AM UTC 24 |
| Finished | Sep 09 10:05:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701501842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.3701501842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.1154768264 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 206637882 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:05:05 AM UTC 24 |
| Finished | Sep 09 10:05:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1154768264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.1154768264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.1621745291 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 215142133 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:05:06 AM UTC 24 |
| Finished | Sep 09 10:05:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621745291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_nak_trans.1621745291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.1882129621 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 157945630 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:05:06 AM UTC 24 |
| Finished | Sep 09 10:05:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882129621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.1882129621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.148127468 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 157875265 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:05:07 AM UTC 24 |
| Finished | Sep 09 10:05:10 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=148127468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_out_stall.148127468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.1407009526 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 207294200 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:05:07 AM UTC 24 |
| Finished | Sep 09 10:05:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407009526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.1407009526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.1203274828 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 176117851 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:05:07 AM UTC 24 |
| Finished | Sep 09 10:05:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1203274828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_pending_in_trans.1203274828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.129156528 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 210840073 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:05:09 AM UTC 24 |
| Finished | Sep 09 10:05:11 AM UTC 24 |
| Peak memory | 214632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=129156528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.129156528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.4162459036 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 151060114 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:05:09 AM UTC 24 |
| Finished | Sep 09 10:05:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162459036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.4162459036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.2020886690 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 57521037 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:05:09 AM UTC 24 |
| Finished | Sep 09 10:05:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020886690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.2020886690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.328654450 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 14578844741 ps |
| CPU time | 43.97 seconds |
| Started | Sep 09 10:05:10 AM UTC 24 |
| Finished | Sep 09 10:05:55 AM UTC 24 |
| Peak memory | 227644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=328654450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_pkt_buffer.328654450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.1685148427 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 237149416 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:05:10 AM UTC 24 |
| Finished | Sep 09 10:05:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685148427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.1685148427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.699670684 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 226980520 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:05:10 AM UTC 24 |
| Finished | Sep 09 10:05:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699670684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_pkt_sent.699670684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.4164084432 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 232576115 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:05:10 AM UTC 24 |
| Finished | Sep 09 10:05:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164084432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.4164084432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.415469767 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 157607839 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:05:12 AM UTC 24 |
| Finished | Sep 09 10:05:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415469767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.415469767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.1657322196 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 20174904342 ps |
| CPU time | 34.99 seconds |
| Started | Sep 09 10:05:12 AM UTC 24 |
| Finished | Sep 09 10:05:48 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657322196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.1657322196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.482100490 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 188066314 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:05:12 AM UTC 24 |
| Finished | Sep 09 10:05:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=482100490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_rx_crc_err.482100490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.3374401086 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 256929457 ps |
| CPU time | 1.92 seconds |
| Started | Sep 09 10:05:12 AM UTC 24 |
| Finished | Sep 09 10:05:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3374401086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.3374401086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.3891529528 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 148380842 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:05:12 AM UTC 24 |
| Finished | Sep 09 10:05:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891529528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.3891529528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.41434249 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 153091679 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:05:12 AM UTC 24 |
| Finished | Sep 09 10:05:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=41434249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_setup_trans_ignored.41434249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.2741398007 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 252437530 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:05:13 AM UTC 24 |
| Finished | Sep 09 10:05:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741398007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.2741398007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.70534376 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 1612157135 ps |
| CPU time | 41.41 seconds |
| Started | Sep 09 10:05:13 AM UTC 24 |
| Finished | Sep 09 10:05:56 AM UTC 24 |
| Peak memory | 229552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=70534376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.70534376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.3653601110 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 177277959 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:05:13 AM UTC 24 |
| Finished | Sep 09 10:05:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653601110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.3653601110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.2471459074 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 173052953 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:05:13 AM UTC 24 |
| Finished | Sep 09 10:05:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2471459074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_stall_trans.2471459074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.902682972 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 540472242 ps |
| CPU time | 2.57 seconds |
| Started | Sep 09 10:05:15 AM UTC 24 |
| Finished | Sep 09 10:05:19 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=902682972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_stream_len_max.902682972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.427841789 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 2853943792 ps |
| CPU time | 34.02 seconds |
| Started | Sep 09 10:05:15 AM UTC 24 |
| Finished | Sep 09 10:05:50 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=427841789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_streaming_out.427841789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.2535049433 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 1344116256 ps |
| CPU time | 33.92 seconds |
| Started | Sep 09 10:04:57 AM UTC 24 |
| Finished | Sep 09 10:05:32 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2535049433 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.2535049433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.3987902154 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 646145917 ps |
| CPU time | 1.93 seconds |
| Started | Sep 09 10:05:15 AM UTC 24 |
| Finished | Sep 09 10:05:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3987902154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_t x_rx_disruption.3987902154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.2553613153 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 419003670 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:18:19 AM UTC 24 |
| Finished | Sep 09 10:18:51 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553613153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.2553613153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.3757141656 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 224019616 ps |
| CPU time | 0.93 seconds |
| Started | Sep 09 10:18:20 AM UTC 24 |
| Finished | Sep 09 10:18:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757141656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 120.usbdev_fifo_levels.3757141656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/120.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.3796785470 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 551382272 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:18:20 AM UTC 24 |
| Finished | Sep 09 10:18:30 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3796785470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_ tx_rx_disruption.3796785470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.1489289255 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 185025413 ps |
| CPU time | 0.84 seconds |
| Started | Sep 09 10:18:20 AM UTC 24 |
| Finished | Sep 09 10:18:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489289255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.1489289255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.1316662969 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 271486493 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:18:20 AM UTC 24 |
| Finished | Sep 09 10:18:29 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316662969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 121.usbdev_fifo_levels.1316662969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/121.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.2154973736 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 488415042 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2154973736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_ tx_rx_disruption.2154973736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.3509930882 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 278025593 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509930882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 122.usbdev_fifo_levels.3509930882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/122.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.1364514276 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 572668428 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1364514276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_ tx_rx_disruption.1364514276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.3973967427 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 518325305 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3973967427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.3973967427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.2765660797 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 422562408 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:45 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2765660797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_ tx_rx_disruption.2765660797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.342295817 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 394830075 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:45 AM UTC 24 |
| Peak memory | 217068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=342295817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.342295817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.3521602274 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 219585359 ps |
| CPU time | 0.88 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:45 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3521602274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 124.usbdev_fifo_levels.3521602274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/124.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.532747290 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 695207843 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:45 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=532747290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_t x_rx_disruption.532747290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.1795982834 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 149976809 ps |
| CPU time | 0.96 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1795982834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 125.usbdev_fifo_levels.1795982834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.2757972058 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 526665639 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:18:22 AM UTC 24 |
| Finished | Sep 09 10:18:45 AM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2757972058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_ tx_rx_disruption.2757972058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.1006592912 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 290981940 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1006592912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.1006592912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.569113311 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 195312251 ps |
| CPU time | 0.81 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=569113311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 126.usbdev_fifo_levels.569113311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.1935131286 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 515273956 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1935131286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_ tx_rx_disruption.1935131286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.3608156731 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 295417578 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608156731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 127.usbdev_fifo_levels.3608156731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/127.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.3762948859 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 479447420 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3762948859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_ tx_rx_disruption.3762948859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.311646050 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 634176058 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=311646050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.311646050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.598627595 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 265545274 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598627595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 128.usbdev_fifo_levels.598627595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.3240708052 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 604600516 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3240708052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_ tx_rx_disruption.3240708052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.3741017618 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 539260060 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 216628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3741017618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.3741017618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.285978068 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 67084813 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:05:47 AM UTC 24 |
| Finished | Sep 09 10:05:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=285978068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.285978068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.2728822918 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 9287545105 ps |
| CPU time | 17.11 seconds |
| Started | Sep 09 10:05:16 AM UTC 24 |
| Finished | Sep 09 10:05:35 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728822918 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.2728822918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.1104175610 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 21321788276 ps |
| CPU time | 25.37 seconds |
| Started | Sep 09 10:05:16 AM UTC 24 |
| Finished | Sep 09 10:05:43 AM UTC 24 |
| Peak memory | 217208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1104175610 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.1104175610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.2067740501 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 30965775806 ps |
| CPU time | 49.61 seconds |
| Started | Sep 09 10:05:16 AM UTC 24 |
| Finished | Sep 09 10:06:08 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2067740501 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.2067740501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.1536847943 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 167682193 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:05:18 AM UTC 24 |
| Finished | Sep 09 10:05:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536847943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.1536847943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.2348113308 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 148894116 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 10:05:18 AM UTC 24 |
| Finished | Sep 09 10:05:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348113308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_bitstuff_err.2348113308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.2305680612 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 376965464 ps |
| CPU time | 2.28 seconds |
| Started | Sep 09 10:05:18 AM UTC 24 |
| Finished | Sep 09 10:05:21 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305680612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_data_toggle_clear.2305680612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.3590671169 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 499741160 ps |
| CPU time | 2.59 seconds |
| Started | Sep 09 10:05:19 AM UTC 24 |
| Finished | Sep 09 10:05:23 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590671169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.3590671169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.2972596477 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 43820840310 ps |
| CPU time | 88.44 seconds |
| Started | Sep 09 10:05:19 AM UTC 24 |
| Finished | Sep 09 10:06:50 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2972596477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_address.2972596477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.3010924970 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 2969686932 ps |
| CPU time | 25.5 seconds |
| Started | Sep 09 10:05:19 AM UTC 24 |
| Finished | Sep 09 10:05:46 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3010924970 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.3010924970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.2235141103 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 517767650 ps |
| CPU time | 2.61 seconds |
| Started | Sep 09 10:05:21 AM UTC 24 |
| Finished | Sep 09 10:05:24 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235141103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.2235141103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.111161792 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 165497548 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:05:21 AM UTC 24 |
| Finished | Sep 09 10:05:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=111161792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_disconnected.111161792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_enable.1310646435 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 55230401 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:05:22 AM UTC 24 |
| Finished | Sep 09 10:05:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310646435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_enable.1310646435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.2570985672 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 883876309 ps |
| CPU time | 3.53 seconds |
| Started | Sep 09 10:05:22 AM UTC 24 |
| Finished | Sep 09 10:05:27 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570985672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.2570985672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.186054539 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 257902565 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:05:22 AM UTC 24 |
| Finished | Sep 09 10:05:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=186054539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_fifo_levels.186054539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.4083677952 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 465579881 ps |
| CPU time | 3.56 seconds |
| Started | Sep 09 10:05:22 AM UTC 24 |
| Finished | Sep 09 10:05:27 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083677952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.4083677952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.2451138806 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 283694046 ps |
| CPU time | 2.2 seconds |
| Started | Sep 09 10:05:24 AM UTC 24 |
| Finished | Sep 09 10:05:27 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451138806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.2451138806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.97875207 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 143184584 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:05:24 AM UTC 24 |
| Finished | Sep 09 10:05:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=97875207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_in_stall.97875207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.3306787951 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 181975829 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:05:24 AM UTC 24 |
| Finished | Sep 09 10:05:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306787951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.3306787951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.2168562269 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 5660810128 ps |
| CPU time | 65.58 seconds |
| Started | Sep 09 10:05:22 AM UTC 24 |
| Finished | Sep 09 10:06:30 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2168562269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.2168562269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.1697976223 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 4504233635 ps |
| CPU time | 33.95 seconds |
| Started | Sep 09 10:05:25 AM UTC 24 |
| Finished | Sep 09 10:06:00 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697976223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.1697976223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.2591408741 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 202147286 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:05:26 AM UTC 24 |
| Finished | Sep 09 10:05:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591408741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_in_err.2591408741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.2883262905 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 14495780513 ps |
| CPU time | 30.54 seconds |
| Started | Sep 09 10:05:26 AM UTC 24 |
| Finished | Sep 09 10:05:58 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883262905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.2883262905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.1921531121 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 6247228275 ps |
| CPU time | 14.16 seconds |
| Started | Sep 09 10:05:26 AM UTC 24 |
| Finished | Sep 09 10:05:41 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1921531121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_link_suspend.1921531121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.3265981529 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 3068520761 ps |
| CPU time | 86.51 seconds |
| Started | Sep 09 10:05:28 AM UTC 24 |
| Finished | Sep 09 10:06:56 AM UTC 24 |
| Peak memory | 234220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265981529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.3265981529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.2949446385 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 3272399184 ps |
| CPU time | 29.53 seconds |
| Started | Sep 09 10:05:28 AM UTC 24 |
| Finished | Sep 09 10:05:59 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949446385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.2949446385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.886459415 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 238799381 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:05:28 AM UTC 24 |
| Finished | Sep 09 10:05:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=886459415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.886459415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.1571158264 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 191321856 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:05:28 AM UTC 24 |
| Finished | Sep 09 10:05:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571158264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.1571158264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.504769327 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 2117254036 ps |
| CPU time | 57.94 seconds |
| Started | Sep 09 10:05:28 AM UTC 24 |
| Finished | Sep 09 10:06:28 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=504769327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.504769327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.3369147928 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 1861859632 ps |
| CPU time | 19.69 seconds |
| Started | Sep 09 10:05:28 AM UTC 24 |
| Finished | Sep 09 10:05:49 AM UTC 24 |
| Peak memory | 229460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369147928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.3369147928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.1127824726 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 2005348129 ps |
| CPU time | 22.17 seconds |
| Started | Sep 09 10:05:28 AM UTC 24 |
| Finished | Sep 09 10:05:52 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127824726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.1127824726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.3342751575 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 159494647 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:05:29 AM UTC 24 |
| Finished | Sep 09 10:05:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3342751575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.3342751575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.3552495289 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 147628975 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:05:31 AM UTC 24 |
| Finished | Sep 09 10:05:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3552495289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.3552495289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.1122985621 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 181399326 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:05:33 AM UTC 24 |
| Finished | Sep 09 10:05:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122985621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_out_iso.1122985621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.3279383359 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 182344979 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:05:34 AM UTC 24 |
| Finished | Sep 09 10:05:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3279383359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_out_stall.3279383359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.4021862691 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 178879274 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:05:35 AM UTC 24 |
| Finished | Sep 09 10:05:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021862691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.4021862691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.3741850074 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 152755437 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:05:35 AM UTC 24 |
| Finished | Sep 09 10:05:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741850074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.3741850074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.1654084278 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 178127989 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:05:36 AM UTC 24 |
| Finished | Sep 09 10:05:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654084278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.1654084278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.2073374802 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 149474582 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:05:36 AM UTC 24 |
| Finished | Sep 09 10:05:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2073374802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2073374802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.4208004958 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 81925850 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:05:37 AM UTC 24 |
| Finished | Sep 09 10:05:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208004958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.4208004958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.2268577224 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 7490359311 ps |
| CPU time | 31.43 seconds |
| Started | Sep 09 10:05:39 AM UTC 24 |
| Finished | Sep 09 10:06:12 AM UTC 24 |
| Peak memory | 234204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268577224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.2268577224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.1450832871 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 182999304 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:05:39 AM UTC 24 |
| Finished | Sep 09 10:05:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450832871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_pkt_received.1450832871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.1491885117 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 220896637 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:05:39 AM UTC 24 |
| Finished | Sep 09 10:05:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491885117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_pkt_sent.1491885117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.774826275 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 185494340 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:05:40 AM UTC 24 |
| Finished | Sep 09 10:05:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=774826275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_random_length_in_transaction.774826275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.2867185417 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 174650036 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:05:40 AM UTC 24 |
| Finished | Sep 09 10:05:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867185417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.2867185417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.1435457708 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 20172519703 ps |
| CPU time | 31.16 seconds |
| Started | Sep 09 10:05:40 AM UTC 24 |
| Finished | Sep 09 10:06:13 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435457708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.1435457708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.4180732002 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 179578773 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:05:41 AM UTC 24 |
| Finished | Sep 09 10:05:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4180732002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.4180732002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.637328592 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 364737466 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:05:42 AM UTC 24 |
| Finished | Sep 09 10:05:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=637328592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_rx_full.637328592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.3941387662 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 179519460 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:05:42 AM UTC 24 |
| Finished | Sep 09 10:05:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941387662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.3941387662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.1998828801 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 197172048 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:05:43 AM UTC 24 |
| Finished | Sep 09 10:05:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998828801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.1998828801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.2249207950 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 229987199 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:05:44 AM UTC 24 |
| Finished | Sep 09 10:05:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249207950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.2249207950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.819171162 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 2309172778 ps |
| CPU time | 24.83 seconds |
| Started | Sep 09 10:05:44 AM UTC 24 |
| Finished | Sep 09 10:06:10 AM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=819171162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.819171162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.2089010297 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 161091230 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:05:44 AM UTC 24 |
| Finished | Sep 09 10:05:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2089010297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.2089010297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.3420568729 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 175822615 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:05:44 AM UTC 24 |
| Finished | Sep 09 10:05:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420568729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.3420568729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.3626688206 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 352779058 ps |
| CPU time | 2 seconds |
| Started | Sep 09 10:05:44 AM UTC 24 |
| Finished | Sep 09 10:05:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626688206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.3626688206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.746302416 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 3261615454 ps |
| CPU time | 32.73 seconds |
| Started | Sep 09 10:05:44 AM UTC 24 |
| Finished | Sep 09 10:06:18 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=746302416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_streaming_out.746302416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.3464308517 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 2071842380 ps |
| CPU time | 20.78 seconds |
| Started | Sep 09 10:05:20 AM UTC 24 |
| Finished | Sep 09 10:05:42 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464308517 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.3464308517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.3969850693 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 485515352 ps |
| CPU time | 2.63 seconds |
| Started | Sep 09 10:05:46 AM UTC 24 |
| Finished | Sep 09 10:05:49 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3969850693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.3969850693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.2576663601 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 524095897 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576663601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.2576663601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.3151445923 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 192221462 ps |
| CPU time | 0.82 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 216560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151445923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.3151445923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.643058771 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 597062632 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=643058771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_t x_rx_disruption.643058771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.696464448 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 155857353 ps |
| CPU time | 0.89 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=696464448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 131.usbdev_fifo_levels.696464448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/131.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.1943756141 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 568296113 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:18:23 AM UTC 24 |
| Finished | Sep 09 10:18:56 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1943756141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_ tx_rx_disruption.1943756141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.2437932591 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 307653631 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:18:24 AM UTC 24 |
| Finished | Sep 09 10:18:29 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437932591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.2437932591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.379424708 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 465659509 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:18:25 AM UTC 24 |
| Finished | Sep 09 10:18:51 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=379424708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_t x_rx_disruption.379424708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.3467549806 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 530720585 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:18:25 AM UTC 24 |
| Finished | Sep 09 10:18:51 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467549806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.3467549806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.3457097762 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 272174829 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:18:30 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457097762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 133.usbdev_fifo_levels.3457097762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.1373810403 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 533772589 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:18:30 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1373810403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_ tx_rx_disruption.1373810403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.1292703637 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 213026139 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:18:30 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292703637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.1292703637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.3610504778 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 525928611 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:18:30 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3610504778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.3610504778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.401705046 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 287502694 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:18:31 AM UTC 24 |
| Finished | Sep 09 10:18:34 AM UTC 24 |
| Peak memory | 214596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=401705046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 135.usbdev_fifo_levels.401705046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/135.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.1758832986 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 460320203 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:18:31 AM UTC 24 |
| Finished | Sep 09 10:18:35 AM UTC 24 |
| Peak memory | 214624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1758832986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.1758832986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.2876016822 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 564552388 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:18:31 AM UTC 24 |
| Finished | Sep 09 10:18:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876016822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.2876016822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.3896671525 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 553965852 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:18:31 AM UTC 24 |
| Finished | Sep 09 10:18:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3896671525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.3896671525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.1812213279 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 333116501 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:18:31 AM UTC 24 |
| Finished | Sep 09 10:18:34 AM UTC 24 |
| Peak memory | 215424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812213279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.1812213279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.2623437393 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 261286278 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:18:32 AM UTC 24 |
| Finished | Sep 09 10:18:34 AM UTC 24 |
| Peak memory | 214640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2623437393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 137.usbdev_fifo_levels.2623437393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.1598103841 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 534852319 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:18:32 AM UTC 24 |
| Finished | Sep 09 10:18:35 AM UTC 24 |
| Peak memory | 214668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1598103841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_ tx_rx_disruption.1598103841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.214698927 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 270033737 ps |
| CPU time | 0.92 seconds |
| Started | Sep 09 10:18:35 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=214698927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.214698927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.2939484208 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 275647015 ps |
| CPU time | 1.05 seconds |
| Started | Sep 09 10:18:35 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939484208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 138.usbdev_fifo_levels.2939484208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/138.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.1775365328 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 446247851 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:18:35 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1775365328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.1775365328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.491213483 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 523817933 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:18:35 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=491213483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.491213483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.3819500143 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 260185447 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:18:35 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3819500143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 139.usbdev_fifo_levels.3819500143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/139.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.2249194787 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 562207722 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:18:35 AM UTC 24 |
| Finished | Sep 09 10:18:51 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2249194787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.2249194787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.2187518035 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 70771270 ps |
| CPU time | 0.93 seconds |
| Started | Sep 09 10:06:11 AM UTC 24 |
| Finished | Sep 09 10:06:13 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2187518035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.2187518035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.87866666 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 6084118991 ps |
| CPU time | 10.1 seconds |
| Started | Sep 09 10:05:47 AM UTC 24 |
| Finished | Sep 09 10:05:58 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=87866666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.87866666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.2271507102 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 15105668838 ps |
| CPU time | 32.87 seconds |
| Started | Sep 09 10:05:47 AM UTC 24 |
| Finished | Sep 09 10:06:21 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2271507102 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.2271507102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.448937705 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 31117178078 ps |
| CPU time | 49.87 seconds |
| Started | Sep 09 10:05:48 AM UTC 24 |
| Finished | Sep 09 10:06:40 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=448937705 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.448937705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.2057940383 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 182099801 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:05:48 AM UTC 24 |
| Finished | Sep 09 10:05:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057940383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_av_buffer.2057940383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.3823465486 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 143735319 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:05:49 AM UTC 24 |
| Finished | Sep 09 10:05:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823465486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.3823465486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.2182841418 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 384299015 ps |
| CPU time | 2.68 seconds |
| Started | Sep 09 10:05:49 AM UTC 24 |
| Finished | Sep 09 10:05:52 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182841418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_data_toggle_clear.2182841418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.1068899766 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 1445446133 ps |
| CPU time | 4.41 seconds |
| Started | Sep 09 10:05:49 AM UTC 24 |
| Finished | Sep 09 10:05:54 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1068899766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.1068899766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.2382952546 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 17502476266 ps |
| CPU time | 39.6 seconds |
| Started | Sep 09 10:05:50 AM UTC 24 |
| Finished | Sep 09 10:06:31 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382952546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.2382952546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.1942047344 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 6343840304 ps |
| CPU time | 40.57 seconds |
| Started | Sep 09 10:05:50 AM UTC 24 |
| Finished | Sep 09 10:06:32 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1942047344 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.1942047344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.1506469786 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 775707124 ps |
| CPU time | 2.39 seconds |
| Started | Sep 09 10:05:50 AM UTC 24 |
| Finished | Sep 09 10:05:53 AM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506469786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_disable_endpoint.1506469786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.2270258775 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 143043362 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:05:51 AM UTC 24 |
| Finished | Sep 09 10:05:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270258775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.2270258775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_enable.3067675494 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 55733694 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:05:51 AM UTC 24 |
| Finished | Sep 09 10:05:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067675494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.3067675494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.898284298 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 946241501 ps |
| CPU time | 4.06 seconds |
| Started | Sep 09 10:05:51 AM UTC 24 |
| Finished | Sep 09 10:05:57 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=898284298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.898284298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.1412631952 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 230180500 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:05:54 AM UTC 24 |
| Finished | Sep 09 10:05:56 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412631952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.1412631952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.4273659485 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 274981325 ps |
| CPU time | 2.03 seconds |
| Started | Sep 09 10:05:54 AM UTC 24 |
| Finished | Sep 09 10:05:57 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4273659485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_fifo_levels.4273659485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.1664886983 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 276909971 ps |
| CPU time | 3.07 seconds |
| Started | Sep 09 10:05:54 AM UTC 24 |
| Finished | Sep 09 10:05:58 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664886983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.1664886983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.569901222 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 244700798 ps |
| CPU time | 1.96 seconds |
| Started | Sep 09 10:05:54 AM UTC 24 |
| Finished | Sep 09 10:05:57 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=569901222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.569901222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.1593986703 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 149793523 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:05:55 AM UTC 24 |
| Finished | Sep 09 10:05:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593986703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.1593986703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.2148118455 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 190438861 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:05:55 AM UTC 24 |
| Finished | Sep 09 10:05:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148118455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_trans.2148118455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.2920729990 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 3478566070 ps |
| CPU time | 34.82 seconds |
| Started | Sep 09 10:05:54 AM UTC 24 |
| Finished | Sep 09 10:06:30 AM UTC 24 |
| Peak memory | 227620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920729990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.2920729990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.3712333616 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 8315319992 ps |
| CPU time | 100 seconds |
| Started | Sep 09 10:05:55 AM UTC 24 |
| Finished | Sep 09 10:07:38 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3712333616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.3712333616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.1995602813 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 172397941 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:05:55 AM UTC 24 |
| Finished | Sep 09 10:05:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1995602813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.1995602813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.894521366 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 5867605219 ps |
| CPU time | 9.45 seconds |
| Started | Sep 09 10:05:57 AM UTC 24 |
| Finished | Sep 09 10:06:08 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=894521366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_link_resume.894521366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.1372929806 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 10647844784 ps |
| CPU time | 16.26 seconds |
| Started | Sep 09 10:05:57 AM UTC 24 |
| Finished | Sep 09 10:06:14 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372929806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.1372929806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.180711719 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 2731435554 ps |
| CPU time | 26.83 seconds |
| Started | Sep 09 10:05:57 AM UTC 24 |
| Finished | Sep 09 10:06:25 AM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=180711719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.180711719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.2891456255 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 4171448874 ps |
| CPU time | 39.33 seconds |
| Started | Sep 09 10:05:57 AM UTC 24 |
| Finished | Sep 09 10:06:38 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2891456255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.2891456255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.996951186 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 250518363 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:05:59 AM UTC 24 |
| Finished | Sep 09 10:06:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=996951186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.996951186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.285406859 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 189539685 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:05:59 AM UTC 24 |
| Finished | Sep 09 10:06:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=285406859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.285406859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.4222001984 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 2724546179 ps |
| CPU time | 23.11 seconds |
| Started | Sep 09 10:05:59 AM UTC 24 |
| Finished | Sep 09 10:06:23 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222001984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.4222001984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.3087453478 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 2575319214 ps |
| CPU time | 30.35 seconds |
| Started | Sep 09 10:05:59 AM UTC 24 |
| Finished | Sep 09 10:06:30 AM UTC 24 |
| Peak memory | 234336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3087453478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.3087453478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.497745740 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 1816831583 ps |
| CPU time | 49.19 seconds |
| Started | Sep 09 10:05:59 AM UTC 24 |
| Finished | Sep 09 10:06:49 AM UTC 24 |
| Peak memory | 227424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=497745740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.497745740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.1077730403 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 214094259 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:05:59 AM UTC 24 |
| Finished | Sep 09 10:06:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1077730403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.1077730403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.1816284583 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 196124146 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:05:59 AM UTC 24 |
| Finished | Sep 09 10:06:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1816284583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.1816284583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.2259689260 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 178819834 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:06:00 AM UTC 24 |
| Finished | Sep 09 10:06:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259689260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.2259689260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.644685806 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 214596973 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:06:01 AM UTC 24 |
| Finished | Sep 09 10:06:04 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=644685806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_out_stall.644685806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.3039610124 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 181543277 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:06:01 AM UTC 24 |
| Finished | Sep 09 10:06:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039610124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.3039610124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.2967563224 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 198818359 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:06:01 AM UTC 24 |
| Finished | Sep 09 10:06:04 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967563224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.2967563224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.2067286492 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 235816918 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:06:03 AM UTC 24 |
| Finished | Sep 09 10:06:05 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2067286492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.2067286492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.2368574799 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 139662152 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:06:03 AM UTC 24 |
| Finished | Sep 09 10:06:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368574799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.2368574799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.996847601 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 64136931 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:06:03 AM UTC 24 |
| Finished | Sep 09 10:06:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=996847601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_phy_pins_sense.996847601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.2097189189 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 8016323501 ps |
| CPU time | 26.47 seconds |
| Started | Sep 09 10:06:04 AM UTC 24 |
| Finished | Sep 09 10:06:32 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2097189189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_pkt_buffer.2097189189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.1380273455 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 165416065 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:06:04 AM UTC 24 |
| Finished | Sep 09 10:06:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1380273455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.1380273455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.842968750 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 232132735 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:06:04 AM UTC 24 |
| Finished | Sep 09 10:06:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=842968750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_pkt_sent.842968750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.3654483607 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 193461446 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:06:04 AM UTC 24 |
| Finished | Sep 09 10:06:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3654483607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_random_length_in_transaction.3654483607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.2400959425 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 181019328 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:06:05 AM UTC 24 |
| Finished | Sep 09 10:06:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400959425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.2400959425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.91626751 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 20168207334 ps |
| CPU time | 30.62 seconds |
| Started | Sep 09 10:06:05 AM UTC 24 |
| Finished | Sep 09 10:06:37 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=91626751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_resume_link_active.91626751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.25685232 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 223289322 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:06:05 AM UTC 24 |
| Finished | Sep 09 10:06:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=25685232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_rx_crc_err.25685232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.690791577 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 254463162 ps |
| CPU time | 1.95 seconds |
| Started | Sep 09 10:06:07 AM UTC 24 |
| Finished | Sep 09 10:06:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690791577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_rx_full.690791577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.1396417114 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 170248583 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:06:07 AM UTC 24 |
| Finished | Sep 09 10:06:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396417114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.1396417114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.1035733541 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 148364824 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:06:08 AM UTC 24 |
| Finished | Sep 09 10:06:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035733541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 14.usbdev_setup_trans_ignored.1035733541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.3444788230 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 253798387 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:06:08 AM UTC 24 |
| Finished | Sep 09 10:06:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444788230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.3444788230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.1464860022 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 3194888094 ps |
| CPU time | 36.22 seconds |
| Started | Sep 09 10:06:08 AM UTC 24 |
| Finished | Sep 09 10:06:46 AM UTC 24 |
| Peak memory | 229808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464860022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.1464860022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.3924212198 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 173848089 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:06:08 AM UTC 24 |
| Finished | Sep 09 10:06:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924212198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.3924212198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.2306972327 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 173915609 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:06:08 AM UTC 24 |
| Finished | Sep 09 10:06:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2306972327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.2306972327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.2555343826 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 1190564834 ps |
| CPU time | 3.76 seconds |
| Started | Sep 09 10:06:10 AM UTC 24 |
| Finished | Sep 09 10:06:14 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555343826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.2555343826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.3754823339 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 3949950745 ps |
| CPU time | 39.94 seconds |
| Started | Sep 09 10:06:10 AM UTC 24 |
| Finished | Sep 09 10:06:51 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3754823339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.3754823339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.1824299844 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 1382506761 ps |
| CPU time | 9.01 seconds |
| Started | Sep 09 10:05:50 AM UTC 24 |
| Finished | Sep 09 10:06:00 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824299844 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.1824299844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.3067019302 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 492435589 ps |
| CPU time | 1.97 seconds |
| Started | Sep 09 10:06:10 AM UTC 24 |
| Finished | Sep 09 10:06:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3067019302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.3067019302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.36163020 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 349734096 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:18:35 AM UTC 24 |
| Finished | Sep 09 10:18:50 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=36163020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.36163020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.2085057652 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 467370589 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:18:36 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2085057652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.2085057652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.3303813339 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 598634741 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:18:36 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3303813339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_ tx_rx_disruption.3303813339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.434260949 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 502313265 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:18:37 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=434260949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.434260949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.1088799900 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 519171222 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:18:37 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1088799900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.1088799900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.2587780004 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 226097100 ps |
| CPU time | 0.89 seconds |
| Started | Sep 09 10:18:41 AM UTC 24 |
| Finished | Sep 09 10:18:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587780004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.2587780004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.1944370890 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 324279814 ps |
| CPU time | 1.05 seconds |
| Started | Sep 09 10:18:41 AM UTC 24 |
| Finished | Sep 09 10:18:45 AM UTC 24 |
| Peak memory | 215148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944370890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 143.usbdev_fifo_levels.1944370890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/143.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.757019942 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 684936151 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:18:41 AM UTC 24 |
| Finished | Sep 09 10:18:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=757019942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_t x_rx_disruption.757019942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.2884541638 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 278222758 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:18:41 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 214860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884541638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.2884541638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.401020149 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 567158718 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:18:41 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=401020149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_t x_rx_disruption.401020149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.265811070 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 507582537 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:18:42 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=265811070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.265811070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/145.usbdev_fifo_levels.4124206041 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 263887541 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:18:42 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124206041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 145.usbdev_fifo_levels.4124206041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/145.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.2493586658 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 556065508 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:18:42 AM UTC 24 |
| Finished | Sep 09 10:18:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2493586658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.2493586658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.2102627282 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 455943170 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:18:42 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102627282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.2102627282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.1085637458 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 149541842 ps |
| CPU time | 0.95 seconds |
| Started | Sep 09 10:18:42 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1085637458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 146.usbdev_fifo_levels.1085637458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.1219564059 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 524047247 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:18:42 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1219564059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.1219564059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.1551572135 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 272720833 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:18:42 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551572135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.1551572135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.1246502030 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 218204128 ps |
| CPU time | 0.87 seconds |
| Started | Sep 09 10:18:46 AM UTC 24 |
| Finished | Sep 09 10:18:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1246502030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 147.usbdev_fifo_levels.1246502030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.2755652709 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 531791150 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:18:46 AM UTC 24 |
| Finished | Sep 09 10:18:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2755652709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.2755652709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.279813966 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 146987251 ps |
| CPU time | 0.77 seconds |
| Started | Sep 09 10:18:46 AM UTC 24 |
| Finished | Sep 09 10:18:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=279813966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 148.usbdev_fifo_levels.279813966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/148.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.2054108767 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 456174517 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:18:46 AM UTC 24 |
| Finished | Sep 09 10:18:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2054108767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.2054108767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.1933954865 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 244377387 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:18:46 AM UTC 24 |
| Finished | Sep 09 10:18:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933954865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.1933954865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.236944949 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 264885481 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 10:18:46 AM UTC 24 |
| Finished | Sep 09 10:18:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=236944949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 149.usbdev_fifo_levels.236944949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.3472175507 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 478390210 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:18:46 AM UTC 24 |
| Finished | Sep 09 10:18:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3472175507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.3472175507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.581658742 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 59260850 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:06:35 AM UTC 24 |
| Finished | Sep 09 10:06:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=581658742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.581658742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.44296233 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 6418863822 ps |
| CPU time | 15.87 seconds |
| Started | Sep 09 10:06:11 AM UTC 24 |
| Finished | Sep 09 10:06:28 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=44296233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.44296233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.2722913854 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 19239366465 ps |
| CPU time | 33.08 seconds |
| Started | Sep 09 10:06:11 AM UTC 24 |
| Finished | Sep 09 10:06:46 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722913854 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.2722913854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.2440817577 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 31371917122 ps |
| CPU time | 47.45 seconds |
| Started | Sep 09 10:06:13 AM UTC 24 |
| Finished | Sep 09 10:07:02 AM UTC 24 |
| Peak memory | 216868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2440817577 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.2440817577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.1083440648 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 159980004 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:06:13 AM UTC 24 |
| Finished | Sep 09 10:06:15 AM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1083440648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.1083440648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.1270796226 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 148605468 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:06:13 AM UTC 24 |
| Finished | Sep 09 10:06:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270796226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.1270796226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.464717301 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 153455830 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:06:13 AM UTC 24 |
| Finished | Sep 09 10:06:15 AM UTC 24 |
| Peak memory | 216520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=464717301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_data_toggle_clear.464717301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.3224893856 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 906776037 ps |
| CPU time | 3.74 seconds |
| Started | Sep 09 10:06:14 AM UTC 24 |
| Finished | Sep 09 10:06:19 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3224893856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.3224893856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.1086526509 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 52221641195 ps |
| CPU time | 92.66 seconds |
| Started | Sep 09 10:06:14 AM UTC 24 |
| Finished | Sep 09 10:07:49 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086526509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.1086526509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.3296167492 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 2919106342 ps |
| CPU time | 24.27 seconds |
| Started | Sep 09 10:06:14 AM UTC 24 |
| Finished | Sep 09 10:06:40 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3296167492 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.3296167492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.3976107929 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 1056394498 ps |
| CPU time | 3.82 seconds |
| Started | Sep 09 10:06:16 AM UTC 24 |
| Finished | Sep 09 10:06:21 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976107929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.3976107929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.2507940261 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 181733501 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:06:16 AM UTC 24 |
| Finished | Sep 09 10:06:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507940261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.2507940261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_enable.70202245 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 69771820 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:06:16 AM UTC 24 |
| Finished | Sep 09 10:06:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=70202245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_enable.70202245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.2784179604 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 794423922 ps |
| CPU time | 3.26 seconds |
| Started | Sep 09 10:06:16 AM UTC 24 |
| Finished | Sep 09 10:06:20 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2784179604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.2784179604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.1741836269 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 642666893 ps |
| CPU time | 3.09 seconds |
| Started | Sep 09 10:06:16 AM UTC 24 |
| Finished | Sep 09 10:06:20 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741836269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.1741836269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.2702544357 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 269466511 ps |
| CPU time | 1.8 seconds |
| Started | Sep 09 10:06:16 AM UTC 24 |
| Finished | Sep 09 10:06:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2702544357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_fifo_levels.2702544357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.696138660 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 402061917 ps |
| CPU time | 3.31 seconds |
| Started | Sep 09 10:06:20 AM UTC 24 |
| Finished | Sep 09 10:06:24 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=696138660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_fifo_rst.696138660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.1678978355 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 147282324 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:06:20 AM UTC 24 |
| Finished | Sep 09 10:06:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1678978355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.1678978355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.593629792 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 148745876 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:06:20 AM UTC 24 |
| Finished | Sep 09 10:06:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=593629792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_in_stall.593629792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.360986386 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 255390088 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:06:20 AM UTC 24 |
| Finished | Sep 09 10:06:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=360986386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_in_trans.360986386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.711177452 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 4018095357 ps |
| CPU time | 41.24 seconds |
| Started | Sep 09 10:06:20 AM UTC 24 |
| Finished | Sep 09 10:07:02 AM UTC 24 |
| Peak memory | 229664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=711177452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.711177452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.2722273726 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 9056024388 ps |
| CPU time | 59.53 seconds |
| Started | Sep 09 10:06:21 AM UTC 24 |
| Finished | Sep 09 10:07:22 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722273726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.2722273726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.159840452 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 197740214 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:06:21 AM UTC 24 |
| Finished | Sep 09 10:06:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159840452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_link_in_err.159840452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.3821723107 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 28565608764 ps |
| CPU time | 51.35 seconds |
| Started | Sep 09 10:06:22 AM UTC 24 |
| Finished | Sep 09 10:07:15 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821723107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_resume.3821723107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.84508578 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 6118076143 ps |
| CPU time | 12.91 seconds |
| Started | Sep 09 10:06:22 AM UTC 24 |
| Finished | Sep 09 10:06:36 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84508578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_link_suspend.84508578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.351171619 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 2901935928 ps |
| CPU time | 29.56 seconds |
| Started | Sep 09 10:06:22 AM UTC 24 |
| Finished | Sep 09 10:06:53 AM UTC 24 |
| Peak memory | 234268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=351171619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.351171619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.1649241599 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 1685419513 ps |
| CPU time | 16.12 seconds |
| Started | Sep 09 10:06:24 AM UTC 24 |
| Finished | Sep 09 10:06:41 AM UTC 24 |
| Peak memory | 227504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649241599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.1649241599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.2122462217 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 241230519 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:06:24 AM UTC 24 |
| Finished | Sep 09 10:06:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122462217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.2122462217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.2547611791 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 187513972 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:06:24 AM UTC 24 |
| Finished | Sep 09 10:06:27 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547611791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.2547611791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.2923169861 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 2800564349 ps |
| CPU time | 74.03 seconds |
| Started | Sep 09 10:06:24 AM UTC 24 |
| Finished | Sep 09 10:07:40 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923169861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.2923169861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.99856811 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 2337475659 ps |
| CPU time | 23.33 seconds |
| Started | Sep 09 10:06:24 AM UTC 24 |
| Finished | Sep 09 10:06:49 AM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=99856811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TE ST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.99856811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.2495996011 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 154311846 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:06:24 AM UTC 24 |
| Finished | Sep 09 10:06:27 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495996011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.2495996011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.3329721401 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 158997655 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:06:26 AM UTC 24 |
| Finished | Sep 09 10:06:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329721401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.3329721401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.215007215 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 256405673 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:06:27 AM UTC 24 |
| Finished | Sep 09 10:06:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=215007215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_nak_trans.215007215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.2008311418 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 155032305 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:06:28 AM UTC 24 |
| Finished | Sep 09 10:06:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008311418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.2008311418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.3283120425 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 205040439 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:06:28 AM UTC 24 |
| Finished | Sep 09 10:06:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283120425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.3283120425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.851610875 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 185005717 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:06:28 AM UTC 24 |
| Finished | Sep 09 10:06:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=851610875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_out_trans_nak.851610875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.2082702946 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 156419527 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:06:29 AM UTC 24 |
| Finished | Sep 09 10:06:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2082702946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.2082702946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.1674491496 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 289382913 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:06:29 AM UTC 24 |
| Finished | Sep 09 10:06:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674491496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.1674491496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.3315223669 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 146502197 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:06:29 AM UTC 24 |
| Finished | Sep 09 10:06:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315223669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.3315223669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.2711881546 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 44570746 ps |
| CPU time | 0.86 seconds |
| Started | Sep 09 10:06:31 AM UTC 24 |
| Finished | Sep 09 10:06:33 AM UTC 24 |
| Peak memory | 214788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2711881546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.2711881546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.3453189136 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 9811574425 ps |
| CPU time | 25.81 seconds |
| Started | Sep 09 10:06:31 AM UTC 24 |
| Finished | Sep 09 10:06:58 AM UTC 24 |
| Peak memory | 227296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453189136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.3453189136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.3977873319 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 187197532 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:06:31 AM UTC 24 |
| Finished | Sep 09 10:06:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977873319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_pkt_received.3977873319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.3543204663 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 249915621 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:06:31 AM UTC 24 |
| Finished | Sep 09 10:06:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543204663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_pkt_sent.3543204663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.1725913688 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 184584189 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:06:31 AM UTC 24 |
| Finished | Sep 09 10:06:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1725913688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.1725913688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.2952735643 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 223304687 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:06:31 AM UTC 24 |
| Finished | Sep 09 10:06:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952735643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.2952735643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.1054511523 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 20173085006 ps |
| CPU time | 23.33 seconds |
| Started | Sep 09 10:06:31 AM UTC 24 |
| Finished | Sep 09 10:06:56 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054511523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.1054511523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.288336081 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 167756196 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:06:33 AM UTC 24 |
| Finished | Sep 09 10:06:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=288336081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_rx_crc_err.288336081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.2401777120 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 330740149 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:06:34 AM UTC 24 |
| Finished | Sep 09 10:06:36 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2401777120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.2401777120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.2971369518 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 148522584 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:06:34 AM UTC 24 |
| Finished | Sep 09 10:06:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971369518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.2971369518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.4011041441 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 159746314 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:06:34 AM UTC 24 |
| Finished | Sep 09 10:06:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011041441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.4011041441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.2402774151 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 188512715 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:06:34 AM UTC 24 |
| Finished | Sep 09 10:06:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402774151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.2402774151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.2404174626 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 2069631293 ps |
| CPU time | 20.03 seconds |
| Started | Sep 09 10:06:34 AM UTC 24 |
| Finished | Sep 09 10:06:55 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404174626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.2404174626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.3839946231 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 148287249 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:06:34 AM UTC 24 |
| Finished | Sep 09 10:06:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3839946231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.3839946231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.2001141585 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 178175807 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:06:34 AM UTC 24 |
| Finished | Sep 09 10:06:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2001141585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_stall_trans.2001141585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.1744434006 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 996833881 ps |
| CPU time | 3.37 seconds |
| Started | Sep 09 10:06:35 AM UTC 24 |
| Finished | Sep 09 10:06:40 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744434006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.1744434006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.3041814931 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 2622037744 ps |
| CPU time | 20.37 seconds |
| Started | Sep 09 10:06:35 AM UTC 24 |
| Finished | Sep 09 10:06:57 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3041814931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_streaming_out.3041814931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.2716080864 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 746443461 ps |
| CPU time | 6.48 seconds |
| Started | Sep 09 10:06:14 AM UTC 24 |
| Finished | Sep 09 10:06:22 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716080864 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.2716080864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.3660278647 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 526496501 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:06:35 AM UTC 24 |
| Finished | Sep 09 10:06:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3660278647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.3660278647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.3789968946 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 745367089 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:18:46 AM UTC 24 |
| Finished | Sep 09 10:18:50 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3789968946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.3789968946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.1102573395 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 451342216 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:18:49 AM UTC 24 |
| Finished | Sep 09 10:18:52 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1102573395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.1102573395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.3456982735 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 656733564 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:18:51 AM UTC 24 |
| Finished | Sep 09 10:18:54 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3456982735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.3456982735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.4152404157 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 591562645 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:18:51 AM UTC 24 |
| Finished | Sep 09 10:18:56 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4152404157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_ tx_rx_disruption.4152404157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.1163428321 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 166037478 ps |
| CPU time | 0.86 seconds |
| Started | Sep 09 10:18:51 AM UTC 24 |
| Finished | Sep 09 10:18:56 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1163428321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.1163428321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.3577631461 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 152322323 ps |
| CPU time | 0.91 seconds |
| Started | Sep 09 10:18:51 AM UTC 24 |
| Finished | Sep 09 10:18:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577631461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 152.usbdev_fifo_levels.3577631461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.2836835758 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 570456952 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:18:51 AM UTC 24 |
| Finished | Sep 09 10:18:56 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2836835758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_ tx_rx_disruption.2836835758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.1672360241 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 290851211 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:18:51 AM UTC 24 |
| Finished | Sep 09 10:18:56 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1672360241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.1672360241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.3189969351 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 258993737 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:18:52 AM UTC 24 |
| Finished | Sep 09 10:18:54 AM UTC 24 |
| Peak memory | 215388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189969351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 153.usbdev_fifo_levels.3189969351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.162581722 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 501222931 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:18:52 AM UTC 24 |
| Finished | Sep 09 10:18:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=162581722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_t x_rx_disruption.162581722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.3380540016 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 458500657 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:18:52 AM UTC 24 |
| Finished | Sep 09 10:18:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380540016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.3380540016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.1545083659 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 545585642 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:18:52 AM UTC 24 |
| Finished | Sep 09 10:18:55 AM UTC 24 |
| Peak memory | 215288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1545083659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_ tx_rx_disruption.1545083659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.570175968 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 355883093 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:18:52 AM UTC 24 |
| Finished | Sep 09 10:18:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=570175968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.570175968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.4026126561 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 554704642 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:18:53 AM UTC 24 |
| Finished | Sep 09 10:18:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4026126561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_ tx_rx_disruption.4026126561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.2101671081 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 535656067 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:18:53 AM UTC 24 |
| Finished | Sep 09 10:18:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2101671081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_ tx_rx_disruption.2101671081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.1609133968 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 214045221 ps |
| CPU time | 0.87 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:04 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609133968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.1609133968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.4111997990 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 566878490 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:05 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4111997990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_ tx_rx_disruption.4111997990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.3005734879 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 376637888 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:04 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005734879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.3005734879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.2321283684 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 317642230 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321283684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 158.usbdev_fifo_levels.2321283684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/158.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.2980177102 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 485398863 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2980177102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.2980177102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.636716712 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 674301010 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=636716712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.636716712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/159.usbdev_fifo_levels.599111722 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 209448144 ps |
| CPU time | 0.83 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=599111722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 159.usbdev_fifo_levels.599111722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/159.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.1423189723 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 624365984 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1423189723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_ tx_rx_disruption.1423189723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.2937488597 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 35925061 ps |
| CPU time | 0.93 seconds |
| Started | Sep 09 10:06:55 AM UTC 24 |
| Finished | Sep 09 10:06:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937488597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.2937488597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.2344495141 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 5480096793 ps |
| CPU time | 8.82 seconds |
| Started | Sep 09 10:06:37 AM UTC 24 |
| Finished | Sep 09 10:06:47 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344495141 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.2344495141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.1792764866 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 14683731812 ps |
| CPU time | 23.86 seconds |
| Started | Sep 09 10:06:37 AM UTC 24 |
| Finished | Sep 09 10:07:02 AM UTC 24 |
| Peak memory | 227424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792764866 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.1792764866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.3518402128 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 30163885082 ps |
| CPU time | 47.18 seconds |
| Started | Sep 09 10:06:37 AM UTC 24 |
| Finished | Sep 09 10:07:26 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3518402128 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.3518402128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.326165470 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 186598292 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:06:37 AM UTC 24 |
| Finished | Sep 09 10:06:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=326165470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_av_buffer.326165470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.2999836992 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 157740307 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:06:37 AM UTC 24 |
| Finished | Sep 09 10:06:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999836992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_bitstuff_err.2999836992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.1917320631 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 157916013 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:06:37 AM UTC 24 |
| Finished | Sep 09 10:06:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917320631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.1917320631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.501026716 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 453428756 ps |
| CPU time | 2.58 seconds |
| Started | Sep 09 10:06:37 AM UTC 24 |
| Finished | Sep 09 10:06:41 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=501026716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.501026716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.2197836434 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 37030191909 ps |
| CPU time | 81.86 seconds |
| Started | Sep 09 10:06:39 AM UTC 24 |
| Finished | Sep 09 10:08:03 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2197836434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.2197836434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.3433376501 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 1106048348 ps |
| CPU time | 8.71 seconds |
| Started | Sep 09 10:06:39 AM UTC 24 |
| Finished | Sep 09 10:06:49 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3433376501 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.3433376501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.4104849618 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 1452690705 ps |
| CPU time | 5.3 seconds |
| Started | Sep 09 10:06:40 AM UTC 24 |
| Finished | Sep 09 10:06:46 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104849618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.4104849618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.2080342946 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 173188862 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:06:40 AM UTC 24 |
| Finished | Sep 09 10:06:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080342946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_disconnected.2080342946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_enable.1297330748 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 32784922 ps |
| CPU time | 0.9 seconds |
| Started | Sep 09 10:06:40 AM UTC 24 |
| Finished | Sep 09 10:06:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297330748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.1297330748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.1138767633 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 917131746 ps |
| CPU time | 4.11 seconds |
| Started | Sep 09 10:06:40 AM UTC 24 |
| Finished | Sep 09 10:06:45 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138767633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.1138767633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.456954013 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 444910198 ps |
| CPU time | 2.05 seconds |
| Started | Sep 09 10:06:41 AM UTC 24 |
| Finished | Sep 09 10:06:44 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=456954013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.456954013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.264885738 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 282143878 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:06:41 AM UTC 24 |
| Finished | Sep 09 10:06:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=264885738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_fifo_levels.264885738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.1148876268 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 386334036 ps |
| CPU time | 3.4 seconds |
| Started | Sep 09 10:06:41 AM UTC 24 |
| Finished | Sep 09 10:06:46 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148876268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.1148876268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.2683411029 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 190928618 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:06:41 AM UTC 24 |
| Finished | Sep 09 10:06:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2683411029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.2683411029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.4084252970 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 142160288 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:06:41 AM UTC 24 |
| Finished | Sep 09 10:06:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084252970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_stall.4084252970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.423425118 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 221803505 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:06:42 AM UTC 24 |
| Finished | Sep 09 10:06:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=423425118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_in_trans.423425118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.3361522651 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 2348955093 ps |
| CPU time | 21.04 seconds |
| Started | Sep 09 10:06:41 AM UTC 24 |
| Finished | Sep 09 10:07:04 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361522651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.3361522651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.1060703637 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 8295628898 ps |
| CPU time | 65.66 seconds |
| Started | Sep 09 10:06:43 AM UTC 24 |
| Finished | Sep 09 10:07:50 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1060703637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.1060703637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.1491225878 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 176552216 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:06:43 AM UTC 24 |
| Finished | Sep 09 10:06:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491225878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_in_err.1491225878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.1379919862 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 31031387229 ps |
| CPU time | 54.14 seconds |
| Started | Sep 09 10:06:43 AM UTC 24 |
| Finished | Sep 09 10:07:39 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379919862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_resume.1379919862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.1296884118 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 10276337209 ps |
| CPU time | 18.51 seconds |
| Started | Sep 09 10:06:44 AM UTC 24 |
| Finished | Sep 09 10:07:04 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296884118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_link_suspend.1296884118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.288737553 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 3853473039 ps |
| CPU time | 38.15 seconds |
| Started | Sep 09 10:06:45 AM UTC 24 |
| Finished | Sep 09 10:07:25 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=288737553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.288737553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.4186080762 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 2772535798 ps |
| CPU time | 71.77 seconds |
| Started | Sep 09 10:06:45 AM UTC 24 |
| Finished | Sep 09 10:07:59 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186080762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.4186080762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.3646118590 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 234197181 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:06:45 AM UTC 24 |
| Finished | Sep 09 10:06:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3646118590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.3646118590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.2044433079 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 195275414 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:06:45 AM UTC 24 |
| Finished | Sep 09 10:06:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2044433079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.2044433079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.175507881 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 3352087891 ps |
| CPU time | 90.55 seconds |
| Started | Sep 09 10:06:47 AM UTC 24 |
| Finished | Sep 09 10:08:19 AM UTC 24 |
| Peak memory | 229308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=175507881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.175507881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.1046488391 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 3090085041 ps |
| CPU time | 32.85 seconds |
| Started | Sep 09 10:06:47 AM UTC 24 |
| Finished | Sep 09 10:07:21 AM UTC 24 |
| Peak memory | 227292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046488391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.1046488391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.73066526 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 157696175 ps |
| CPU time | 0.9 seconds |
| Started | Sep 09 10:06:47 AM UTC 24 |
| Finished | Sep 09 10:06:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=73066526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.73066526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.2125871530 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 149703165 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:06:47 AM UTC 24 |
| Finished | Sep 09 10:06:50 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125871530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.2125871530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.2777729365 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 245385896 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 10:06:47 AM UTC 24 |
| Finished | Sep 09 10:06:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777729365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_nak_trans.2777729365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.607974326 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 183592027 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:06:47 AM UTC 24 |
| Finished | Sep 09 10:06:50 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=607974326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_out_iso.607974326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.1232569855 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 143950877 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:06:48 AM UTC 24 |
| Finished | Sep 09 10:06:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232569855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.1232569855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.1280702699 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 213318356 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:06:48 AM UTC 24 |
| Finished | Sep 09 10:06:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280702699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_out_trans_nak.1280702699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.617107136 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 157855431 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:06:50 AM UTC 24 |
| Finished | Sep 09 10:06:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=617107136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pending_in_trans.617107136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.804483664 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 239128841 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:06:50 AM UTC 24 |
| Finished | Sep 09 10:06:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=804483664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.804483664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.2766909843 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 158955203 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:06:50 AM UTC 24 |
| Finished | Sep 09 10:06:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766909843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.2766909843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.3012798937 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 49532259 ps |
| CPU time | 0.85 seconds |
| Started | Sep 09 10:06:50 AM UTC 24 |
| Finished | Sep 09 10:06:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012798937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.3012798937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.2036728815 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 14282564737 ps |
| CPU time | 38.58 seconds |
| Started | Sep 09 10:06:52 AM UTC 24 |
| Finished | Sep 09 10:07:32 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2036728815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.2036728815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.3373855780 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 233150350 ps |
| CPU time | 1.84 seconds |
| Started | Sep 09 10:06:52 AM UTC 24 |
| Finished | Sep 09 10:06:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373855780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_pkt_received.3373855780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.2299819487 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 171519732 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:06:52 AM UTC 24 |
| Finished | Sep 09 10:06:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2299819487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.2299819487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.3955009514 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 170318729 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:06:52 AM UTC 24 |
| Finished | Sep 09 10:06:55 AM UTC 24 |
| Peak memory | 214936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955009514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_random_length_in_transaction.3955009514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.3803020762 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 183265153 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:06:52 AM UTC 24 |
| Finished | Sep 09 10:06:55 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3803020762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.3803020762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.29278658 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 20160653246 ps |
| CPU time | 26.7 seconds |
| Started | Sep 09 10:06:52 AM UTC 24 |
| Finished | Sep 09 10:07:20 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=29278658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_resume_link_active.29278658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.1183097629 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 146047021 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:06:52 AM UTC 24 |
| Finished | Sep 09 10:06:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1183097629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.1183097629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.3145530831 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 312897520 ps |
| CPU time | 2.11 seconds |
| Started | Sep 09 10:06:52 AM UTC 24 |
| Finished | Sep 09 10:06:55 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3145530831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.3145530831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.3131835004 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 161998089 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:06:52 AM UTC 24 |
| Finished | Sep 09 10:06:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131835004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_setup_stage.3131835004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.4133868325 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 152784011 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:06:52 AM UTC 24 |
| Finished | Sep 09 10:06:55 AM UTC 24 |
| Peak memory | 216488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133868325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 16.usbdev_setup_trans_ignored.4133868325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.429368834 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 216120132 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:06:53 AM UTC 24 |
| Finished | Sep 09 10:06:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=429368834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.429368834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.137625053 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 2151242357 ps |
| CPU time | 23.29 seconds |
| Started | Sep 09 10:06:54 AM UTC 24 |
| Finished | Sep 09 10:07:18 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=137625053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.137625053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.3993333547 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 193402546 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:06:54 AM UTC 24 |
| Finished | Sep 09 10:06:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993333547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.3993333547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.3628954111 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 172161450 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:06:54 AM UTC 24 |
| Finished | Sep 09 10:06:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3628954111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_stall_trans.3628954111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.3387890425 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 1132292084 ps |
| CPU time | 3.35 seconds |
| Started | Sep 09 10:06:55 AM UTC 24 |
| Finished | Sep 09 10:07:00 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3387890425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.3387890425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.4168164848 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 2634755748 ps |
| CPU time | 19.23 seconds |
| Started | Sep 09 10:06:55 AM UTC 24 |
| Finished | Sep 09 10:07:16 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4168164848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.4168164848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.1022193326 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 866581922 ps |
| CPU time | 6.12 seconds |
| Started | Sep 09 10:06:40 AM UTC 24 |
| Finished | Sep 09 10:06:47 AM UTC 24 |
| Peak memory | 216992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022193326 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.1022193326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.889377778 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 573794686 ps |
| CPU time | 1.8 seconds |
| Started | Sep 09 10:06:55 AM UTC 24 |
| Finished | Sep 09 10:06:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=889377778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_tx _rx_disruption.889377778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.1587264921 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 508763856 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1587264921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.1587264921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.149387232 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 639587613 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=149387232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_t x_rx_disruption.149387232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.755653794 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 523527780 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=755653794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.755653794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.91014980 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 485414582 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=91014980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_tx _rx_disruption.91014980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.1172045575 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 216559817 ps |
| CPU time | 0.89 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:14 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172045575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.1172045575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.3403828321 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 673978399 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3403828321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.3403828321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.2518585380 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 493623400 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518585380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.2518585380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.172283356 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 479551253 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 214736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=172283356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_t x_rx_disruption.172283356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.656662664 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 501578754 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 214760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=656662664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_t x_rx_disruption.656662664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.3736646352 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 577038821 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736646352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.3736646352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.90636591 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 477639287 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=90636591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_tx _rx_disruption.90636591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.1707357909 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 461102922 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1707357909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.1707357909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.2713617019 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 488708248 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:18:55 AM UTC 24 |
| Finished | Sep 09 10:19:09 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2713617019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.2713617019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.1358921253 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 668501416 ps |
| CPU time | 1.84 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1358921253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.1358921253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.1149191156 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 187470496 ps |
| CPU time | 0.88 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:18:57 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149191156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.1149191156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.1661161114 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 516004995 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1661161114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.1661161114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.3656326232 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 672774777 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:19:36 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656326232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.3656326232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.3614562393 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 597143158 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:19:36 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3614562393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.3614562393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.1712962545 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 74705236 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:07:17 AM UTC 24 |
| Finished | Sep 09 10:07:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1712962545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.1712962545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.702781573 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 12161643754 ps |
| CPU time | 18.57 seconds |
| Started | Sep 09 10:06:57 AM UTC 24 |
| Finished | Sep 09 10:07:17 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=702781573 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.702781573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.1747792243 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 16037989870 ps |
| CPU time | 26.66 seconds |
| Started | Sep 09 10:06:57 AM UTC 24 |
| Finished | Sep 09 10:07:25 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747792243 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.1747792243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.1435875116 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 23849927583 ps |
| CPU time | 38.35 seconds |
| Started | Sep 09 10:06:57 AM UTC 24 |
| Finished | Sep 09 10:07:37 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435875116 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.1435875116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.3248590723 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 150480292 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:06:57 AM UTC 24 |
| Finished | Sep 09 10:07:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248590723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.3248590723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.1522123451 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 148385250 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:06:57 AM UTC 24 |
| Finished | Sep 09 10:06:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1522123451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_bitstuff_err.1522123451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.2444140322 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 445300130 ps |
| CPU time | 2.3 seconds |
| Started | Sep 09 10:06:57 AM UTC 24 |
| Finished | Sep 09 10:07:01 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2444140322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.2444140322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.1479576855 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 27234738484 ps |
| CPU time | 47.18 seconds |
| Started | Sep 09 10:06:57 AM UTC 24 |
| Finished | Sep 09 10:07:46 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479576855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.1479576855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.374026596 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 2429932278 ps |
| CPU time | 19.36 seconds |
| Started | Sep 09 10:06:57 AM UTC 24 |
| Finished | Sep 09 10:07:18 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=374026596 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.374026596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.2529020565 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 642062304 ps |
| CPU time | 3.05 seconds |
| Started | Sep 09 10:06:59 AM UTC 24 |
| Finished | Sep 09 10:07:03 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529020565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.2529020565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.3377545620 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 141148585 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:06:59 AM UTC 24 |
| Finished | Sep 09 10:07:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377545620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_disconnected.3377545620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_enable.2045117507 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 35756578 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:06:59 AM UTC 24 |
| Finished | Sep 09 10:07:01 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2045117507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.2045117507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.3766857182 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 839682354 ps |
| CPU time | 3.16 seconds |
| Started | Sep 09 10:06:59 AM UTC 24 |
| Finished | Sep 09 10:07:03 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3766857182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.3766857182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.629579083 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 454622475 ps |
| CPU time | 1.8 seconds |
| Started | Sep 09 10:06:59 AM UTC 24 |
| Finished | Sep 09 10:07:02 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=629579083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.629579083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.4127602260 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 161955974 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:07:01 AM UTC 24 |
| Finished | Sep 09 10:07:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4127602260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_fifo_levels.4127602260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.2165378070 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 457627685 ps |
| CPU time | 4.05 seconds |
| Started | Sep 09 10:07:01 AM UTC 24 |
| Finished | Sep 09 10:07:06 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165378070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.2165378070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.768514977 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 216108804 ps |
| CPU time | 1.95 seconds |
| Started | Sep 09 10:07:01 AM UTC 24 |
| Finished | Sep 09 10:07:04 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=768514977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.768514977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.3438921596 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 154600516 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:07:01 AM UTC 24 |
| Finished | Sep 09 10:07:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3438921596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.3438921596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.491158896 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 249311646 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:07:03 AM UTC 24 |
| Finished | Sep 09 10:07:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=491158896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_in_trans.491158896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.183013847 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 3966647222 ps |
| CPU time | 113.13 seconds |
| Started | Sep 09 10:07:01 AM UTC 24 |
| Finished | Sep 09 10:08:56 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=183013847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.183013847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.4286804958 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 8261413072 ps |
| CPU time | 92.32 seconds |
| Started | Sep 09 10:07:03 AM UTC 24 |
| Finished | Sep 09 10:08:37 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4286804958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.4286804958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.1666432594 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 254768647 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:07:03 AM UTC 24 |
| Finished | Sep 09 10:07:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666432594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.1666432594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.2911657083 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 28242206424 ps |
| CPU time | 59.03 seconds |
| Started | Sep 09 10:07:03 AM UTC 24 |
| Finished | Sep 09 10:08:03 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911657083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_resume.2911657083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.4035724339 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 6210873541 ps |
| CPU time | 13.6 seconds |
| Started | Sep 09 10:07:03 AM UTC 24 |
| Finished | Sep 09 10:07:18 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4035724339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_link_suspend.4035724339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.3288117959 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 5564985540 ps |
| CPU time | 147.5 seconds |
| Started | Sep 09 10:07:03 AM UTC 24 |
| Finished | Sep 09 10:09:33 AM UTC 24 |
| Peak memory | 234112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3288117959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.3288117959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.639414675 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 4222159084 ps |
| CPU time | 39.7 seconds |
| Started | Sep 09 10:07:04 AM UTC 24 |
| Finished | Sep 09 10:07:46 AM UTC 24 |
| Peak memory | 227068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=639414675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.639414675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.439442078 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 236993998 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:07:04 AM UTC 24 |
| Finished | Sep 09 10:07:07 AM UTC 24 |
| Peak memory | 214696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=439442078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.439442078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.1812098487 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 193014660 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:07:04 AM UTC 24 |
| Finished | Sep 09 10:07:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812098487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.1812098487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.1451455909 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 3065003412 ps |
| CPU time | 37.23 seconds |
| Started | Sep 09 10:07:04 AM UTC 24 |
| Finished | Sep 09 10:07:43 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1451455909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.1451455909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.913385192 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 3047993221 ps |
| CPU time | 23.99 seconds |
| Started | Sep 09 10:07:04 AM UTC 24 |
| Finished | Sep 09 10:07:30 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=913385192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.913385192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.2515845714 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 157496315 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:07:05 AM UTC 24 |
| Finished | Sep 09 10:07:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515845714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.2515845714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.1020178983 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 142013034 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:07:05 AM UTC 24 |
| Finished | Sep 09 10:07:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020178983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.1020178983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.1781517295 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 192066526 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:07:05 AM UTC 24 |
| Finished | Sep 09 10:07:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1781517295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.1781517295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.3182904056 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 177901159 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:07:06 AM UTC 24 |
| Finished | Sep 09 10:07:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182904056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_out_iso.3182904056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.703238595 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 162351045 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:07:06 AM UTC 24 |
| Finished | Sep 09 10:07:09 AM UTC 24 |
| Peak memory | 214852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=703238595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_out_stall.703238595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.1854573586 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 177240057 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:07:06 AM UTC 24 |
| Finished | Sep 09 10:07:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854573586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.1854573586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.2898045546 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 178657117 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:07:06 AM UTC 24 |
| Finished | Sep 09 10:07:09 AM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898045546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.2898045546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.3088740763 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 245505276 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 10:07:07 AM UTC 24 |
| Finished | Sep 09 10:07:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088740763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.3088740763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.1911784861 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 147567573 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:07:08 AM UTC 24 |
| Finished | Sep 09 10:07:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1911784861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.1911784861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.611258331 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 35477402 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:07:08 AM UTC 24 |
| Finished | Sep 09 10:07:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=611258331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_phy_pins_sense.611258331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.2391638858 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 13315770316 ps |
| CPU time | 44.71 seconds |
| Started | Sep 09 10:07:09 AM UTC 24 |
| Finished | Sep 09 10:07:55 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391638858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.2391638858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.2332590148 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 151805440 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:07:09 AM UTC 24 |
| Finished | Sep 09 10:07:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332590148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.2332590148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.4142112536 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 190748349 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:07:09 AM UTC 24 |
| Finished | Sep 09 10:07:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142112536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_pkt_sent.4142112536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.2700785575 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 266946115 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:07:10 AM UTC 24 |
| Finished | Sep 09 10:07:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700785575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_random_length_in_transaction.2700785575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.4015940900 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 184263173 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:07:10 AM UTC 24 |
| Finished | Sep 09 10:07:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015940900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.4015940900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.3041247929 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 20177213158 ps |
| CPU time | 32.73 seconds |
| Started | Sep 09 10:07:10 AM UTC 24 |
| Finished | Sep 09 10:07:44 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3041247929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.3041247929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.3257010916 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 199663048 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:07:10 AM UTC 24 |
| Finished | Sep 09 10:07:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3257010916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.3257010916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.2379670207 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 271411090 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 10:07:11 AM UTC 24 |
| Finished | Sep 09 10:07:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379670207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.2379670207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.3006957407 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 146313069 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:07:11 AM UTC 24 |
| Finished | Sep 09 10:07:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3006957407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.3006957407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.1268082833 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 149974453 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:07:13 AM UTC 24 |
| Finished | Sep 09 10:07:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268082833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.1268082833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.616062918 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 232918611 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:07:13 AM UTC 24 |
| Finished | Sep 09 10:07:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=616062918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.616062918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.2182186809 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 2281440145 ps |
| CPU time | 64.47 seconds |
| Started | Sep 09 10:07:13 AM UTC 24 |
| Finished | Sep 09 10:08:19 AM UTC 24 |
| Peak memory | 227496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182186809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.2182186809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.4025766635 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 187175720 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:07:14 AM UTC 24 |
| Finished | Sep 09 10:07:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4025766635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.4025766635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.3082135518 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 175047813 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:07:14 AM UTC 24 |
| Finished | Sep 09 10:07:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082135518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.3082135518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.3408035551 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 311749779 ps |
| CPU time | 2.13 seconds |
| Started | Sep 09 10:07:15 AM UTC 24 |
| Finished | Sep 09 10:07:18 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3408035551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.3408035551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.3271461394 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 3139448050 ps |
| CPU time | 87.3 seconds |
| Started | Sep 09 10:07:14 AM UTC 24 |
| Finished | Sep 09 10:08:44 AM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3271461394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_streaming_out.3271461394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.3205367283 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 963931218 ps |
| CPU time | 21.71 seconds |
| Started | Sep 09 10:06:57 AM UTC 24 |
| Finished | Sep 09 10:07:21 AM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205367283 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.3205367283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.3113907265 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 618085755 ps |
| CPU time | 2.52 seconds |
| Started | Sep 09 10:07:15 AM UTC 24 |
| Finished | Sep 09 10:07:19 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3113907265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_t x_rx_disruption.3113907265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.1121389474 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 739433457 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:18:58 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121389474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.1121389474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.2927872534 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 513766984 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:19:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2927872534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_ tx_rx_disruption.2927872534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.2934957529 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 566111418 ps |
| CPU time | 1.8 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2934957529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_ tx_rx_disruption.2934957529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.76069768 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 235943702 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:19:52 AM UTC 24 |
| Peak memory | 215084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=76069768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.76069768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.836205802 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 628279487 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:18:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=836205802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_t x_rx_disruption.836205802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.3658415914 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 450671041 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:18:56 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3658415914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_ tx_rx_disruption.3658415914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.3235827184 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 306531664 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:18:57 AM UTC 24 |
| Finished | Sep 09 10:19:00 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3235827184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.3235827184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.1352970366 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 688347833 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:18:57 AM UTC 24 |
| Finished | Sep 09 10:19:00 AM UTC 24 |
| Peak memory | 214208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1352970366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.1352970366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.1612634050 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 240461007 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:18:57 AM UTC 24 |
| Finished | Sep 09 10:18:59 AM UTC 24 |
| Peak memory | 214316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1612634050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.1612634050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.3157669862 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 604440796 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:18:57 AM UTC 24 |
| Finished | Sep 09 10:19:00 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3157669862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.3157669862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.3523671780 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 209674566 ps |
| CPU time | 0.84 seconds |
| Started | Sep 09 10:18:57 AM UTC 24 |
| Finished | Sep 09 10:18:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523671780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.3523671780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.2296917733 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 592171829 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:18:58 AM UTC 24 |
| Finished | Sep 09 10:19:00 AM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2296917733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.2296917733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.182254755 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 357529727 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:18:58 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=182254755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.182254755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.1531109812 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 450133955 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:18:58 AM UTC 24 |
| Finished | Sep 09 10:19:00 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1531109812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_ tx_rx_disruption.1531109812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.3817033031 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 534841024 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:18:58 AM UTC 24 |
| Finished | Sep 09 10:19:00 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3817033031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_ tx_rx_disruption.3817033031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.3714087538 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 555020877 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:18:58 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3714087538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.3714087538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.3976967445 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 447569728 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:18:58 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3976967445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.3976967445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.1743419591 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 28940312 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:07:40 AM UTC 24 |
| Finished | Sep 09 10:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1743419591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.1743419591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.1015584000 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 6663447957 ps |
| CPU time | 15.21 seconds |
| Started | Sep 09 10:07:17 AM UTC 24 |
| Finished | Sep 09 10:07:33 AM UTC 24 |
| Peak memory | 227368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1015584000 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.1015584000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.2652357257 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 14956649261 ps |
| CPU time | 25.53 seconds |
| Started | Sep 09 10:07:17 AM UTC 24 |
| Finished | Sep 09 10:07:44 AM UTC 24 |
| Peak memory | 227428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652357257 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.2652357257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.3563800520 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 23666921794 ps |
| CPU time | 38.9 seconds |
| Started | Sep 09 10:07:17 AM UTC 24 |
| Finished | Sep 09 10:07:57 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3563800520 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.3563800520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.2350580237 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 153242523 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:07:17 AM UTC 24 |
| Finished | Sep 09 10:07:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350580237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.2350580237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.2523996312 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 174102315 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:07:18 AM UTC 24 |
| Finished | Sep 09 10:07:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2523996312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.2523996312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.1304699803 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 419359327 ps |
| CPU time | 2.58 seconds |
| Started | Sep 09 10:07:18 AM UTC 24 |
| Finished | Sep 09 10:07:22 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304699803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.1304699803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.926428508 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 1230477761 ps |
| CPU time | 5.28 seconds |
| Started | Sep 09 10:07:20 AM UTC 24 |
| Finished | Sep 09 10:07:26 AM UTC 24 |
| Peak memory | 217332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=926428508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.926428508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.1106478977 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 29659806726 ps |
| CPU time | 50.41 seconds |
| Started | Sep 09 10:07:20 AM UTC 24 |
| Finished | Sep 09 10:08:12 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106478977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.1106478977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.1915289321 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 6352707467 ps |
| CPU time | 45.81 seconds |
| Started | Sep 09 10:07:20 AM UTC 24 |
| Finished | Sep 09 10:08:07 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1915289321 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.1915289321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.2263620627 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 710425163 ps |
| CPU time | 3.06 seconds |
| Started | Sep 09 10:07:20 AM UTC 24 |
| Finished | Sep 09 10:07:24 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2263620627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.2263620627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.1993607825 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 144749767 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:07:20 AM UTC 24 |
| Finished | Sep 09 10:07:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1993607825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.1993607825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_enable.3456821053 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 41918479 ps |
| CPU time | 1.01 seconds |
| Started | Sep 09 10:07:20 AM UTC 24 |
| Finished | Sep 09 10:07:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3456821053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.3456821053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.1141157421 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 1089883944 ps |
| CPU time | 5.34 seconds |
| Started | Sep 09 10:07:21 AM UTC 24 |
| Finished | Sep 09 10:07:28 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1141157421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.1141157421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.3481860281 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 226955425 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:07:21 AM UTC 24 |
| Finished | Sep 09 10:07:24 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481860281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.3481860281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.976907930 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 162822110 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:07:21 AM UTC 24 |
| Finished | Sep 09 10:07:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=976907930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_fifo_levels.976907930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.3096375823 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 436711328 ps |
| CPU time | 3.45 seconds |
| Started | Sep 09 10:07:23 AM UTC 24 |
| Finished | Sep 09 10:07:27 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3096375823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_fifo_rst.3096375823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.2483333109 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 184813466 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:07:23 AM UTC 24 |
| Finished | Sep 09 10:07:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2483333109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.2483333109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.561122930 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 163761593 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:07:24 AM UTC 24 |
| Finished | Sep 09 10:07:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561122930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_in_stall.561122930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.1615675943 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 203641012 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:07:24 AM UTC 24 |
| Finished | Sep 09 10:07:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615675943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_trans.1615675943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.3024426585 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 3913445821 ps |
| CPU time | 39 seconds |
| Started | Sep 09 10:07:23 AM UTC 24 |
| Finished | Sep 09 10:08:03 AM UTC 24 |
| Peak memory | 229684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024426585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.3024426585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.2632416450 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 13791624439 ps |
| CPU time | 98.76 seconds |
| Started | Sep 09 10:07:25 AM UTC 24 |
| Finished | Sep 09 10:09:06 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632416450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.2632416450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.353112805 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 188162661 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:07:26 AM UTC 24 |
| Finished | Sep 09 10:07:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=353112805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_link_in_err.353112805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.1507381763 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 10057643531 ps |
| CPU time | 21.08 seconds |
| Started | Sep 09 10:07:26 AM UTC 24 |
| Finished | Sep 09 10:07:48 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507381763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.1507381763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.1423601428 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 10960377462 ps |
| CPU time | 20.19 seconds |
| Started | Sep 09 10:07:26 AM UTC 24 |
| Finished | Sep 09 10:07:47 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1423601428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.1423601428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.2932208348 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 4131268279 ps |
| CPU time | 34.88 seconds |
| Started | Sep 09 10:07:27 AM UTC 24 |
| Finished | Sep 09 10:08:03 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932208348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.2932208348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.3393655010 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 3203140100 ps |
| CPU time | 24.19 seconds |
| Started | Sep 09 10:07:27 AM UTC 24 |
| Finished | Sep 09 10:07:53 AM UTC 24 |
| Peak memory | 234212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393655010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.3393655010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.916836674 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 239940949 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:07:27 AM UTC 24 |
| Finished | Sep 09 10:07:29 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=916836674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.916836674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.4183410966 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 184349436 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:07:27 AM UTC 24 |
| Finished | Sep 09 10:07:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183410966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.4183410966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.3480204947 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 3071973775 ps |
| CPU time | 32.41 seconds |
| Started | Sep 09 10:07:27 AM UTC 24 |
| Finished | Sep 09 10:08:01 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480204947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.3480204947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.1076579902 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 4259205527 ps |
| CPU time | 112.39 seconds |
| Started | Sep 09 10:07:29 AM UTC 24 |
| Finished | Sep 09 10:09:23 AM UTC 24 |
| Peak memory | 227748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076579902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.1076579902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.3690028845 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 154820997 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:07:29 AM UTC 24 |
| Finished | Sep 09 10:07:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690028845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.3690028845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.424845497 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 157965255 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:07:29 AM UTC 24 |
| Finished | Sep 09 10:07:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=424845497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.424845497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.2407868292 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 219983823 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:07:29 AM UTC 24 |
| Finished | Sep 09 10:07:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407868292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_nak_trans.2407868292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.266310721 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 204463066 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:07:29 AM UTC 24 |
| Finished | Sep 09 10:07:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=266310721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_out_iso.266310721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.1949349476 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 158608596 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:07:30 AM UTC 24 |
| Finished | Sep 09 10:07:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1949349476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.1949349476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.3199178566 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 220902567 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:07:31 AM UTC 24 |
| Finished | Sep 09 10:07:34 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3199178566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_out_trans_nak.3199178566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.911595425 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 175987624 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:07:31 AM UTC 24 |
| Finished | Sep 09 10:07:34 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911595425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pending_in_trans.911595425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.2229834547 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 219966505 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:07:33 AM UTC 24 |
| Finished | Sep 09 10:07:36 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2229834547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.2229834547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.222205212 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 145807072 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:07:33 AM UTC 24 |
| Finished | Sep 09 10:07:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=222205212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.222205212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.3241125175 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 49953637 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:07:33 AM UTC 24 |
| Finished | Sep 09 10:07:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241125175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.3241125175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.3969317632 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 20538009018 ps |
| CPU time | 55.71 seconds |
| Started | Sep 09 10:07:33 AM UTC 24 |
| Finished | Sep 09 10:08:30 AM UTC 24 |
| Peak memory | 227276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3969317632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.3969317632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.1220749355 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 175396215 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:07:33 AM UTC 24 |
| Finished | Sep 09 10:07:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1220749355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_pkt_received.1220749355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.2191424860 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 252382107 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:07:33 AM UTC 24 |
| Finished | Sep 09 10:07:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191424860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.2191424860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.3708289954 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 154916234 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:07:34 AM UTC 24 |
| Finished | Sep 09 10:07:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708289954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.3708289954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.668668266 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 162274983 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:07:35 AM UTC 24 |
| Finished | Sep 09 10:07:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=668668266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.668668266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.1334152685 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 20165319118 ps |
| CPU time | 29.72 seconds |
| Started | Sep 09 10:07:35 AM UTC 24 |
| Finished | Sep 09 10:08:06 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334152685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_resume_link_active.1334152685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.2188638914 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 151729863 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:07:36 AM UTC 24 |
| Finished | Sep 09 10:07:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188638914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_rx_crc_err.2188638914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.4129957217 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 367578893 ps |
| CPU time | 2.21 seconds |
| Started | Sep 09 10:07:37 AM UTC 24 |
| Finished | Sep 09 10:07:40 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4129957217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.4129957217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.951026263 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 186111340 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:07:37 AM UTC 24 |
| Finished | Sep 09 10:07:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=951026263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_setup_stage.951026263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.36863480 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 165174772 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:07:37 AM UTC 24 |
| Finished | Sep 09 10:07:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=36863480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_setup_trans_ignored.36863480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.4052575909 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 219806577 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:07:37 AM UTC 24 |
| Finished | Sep 09 10:07:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052575909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.4052575909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.1947046147 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 2267944697 ps |
| CPU time | 58.8 seconds |
| Started | Sep 09 10:07:39 AM UTC 24 |
| Finished | Sep 09 10:08:39 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947046147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.1947046147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.2582493748 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 208823726 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:07:39 AM UTC 24 |
| Finished | Sep 09 10:07:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582493748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.2582493748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.2560991237 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 216982097 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:07:39 AM UTC 24 |
| Finished | Sep 09 10:07:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2560991237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.2560991237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.732783588 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 259292422 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:07:39 AM UTC 24 |
| Finished | Sep 09 10:07:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=732783588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_stream_len_max.732783588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.1632661732 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 4422654223 ps |
| CPU time | 109.65 seconds |
| Started | Sep 09 10:07:39 AM UTC 24 |
| Finished | Sep 09 10:09:31 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632661732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.1632661732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.2238727705 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 290934782 ps |
| CPU time | 5.93 seconds |
| Started | Sep 09 10:07:20 AM UTC 24 |
| Finished | Sep 09 10:07:27 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238727705 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.2238727705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.749933839 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 664704892 ps |
| CPU time | 3.25 seconds |
| Started | Sep 09 10:07:40 AM UTC 24 |
| Finished | Sep 09 10:07:45 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=749933839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_tx _rx_disruption.749933839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.2182871115 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 412688009 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:18:58 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182871115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.2182871115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.908095404 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 605474505 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:18:58 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=908095404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_t x_rx_disruption.908095404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.142595106 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 231929699 ps |
| CPU time | 0.89 seconds |
| Started | Sep 09 10:18:58 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=142595106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.142595106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.588750945 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 623247523 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:18:59 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=588750945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_t x_rx_disruption.588750945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.3871265801 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 621059644 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:18:59 AM UTC 24 |
| Finished | Sep 09 10:19:24 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3871265801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_ tx_rx_disruption.3871265801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.3868876379 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 384060991 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:19:00 AM UTC 24 |
| Finished | Sep 09 10:19:09 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3868876379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.3868876379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.971359131 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 645336305 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:19:00 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=971359131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_t x_rx_disruption.971359131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.3597269713 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 635261266 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:19:00 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597269713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.3597269713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.4224276189 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 542262604 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:19:00 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4224276189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.4224276189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.1545780282 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 355528510 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:19:01 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545780282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.1545780282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.2757987501 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 496378597 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:19:01 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2757987501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.2757987501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.1292316009 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 255489146 ps |
| CPU time | 0.85 seconds |
| Started | Sep 09 10:19:01 AM UTC 24 |
| Finished | Sep 09 10:19:14 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292316009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.1292316009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.2346784553 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 483541258 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:19:01 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2346784553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_ tx_rx_disruption.2346784553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.264374293 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 640080063 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:19:02 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=264374293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.264374293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.917361799 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 701029347 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:19:05 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=917361799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_t x_rx_disruption.917361799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.2406691258 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 347975325 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:19:05 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2406691258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.2406691258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.3006907963 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 523785978 ps |
| CPU time | 1.8 seconds |
| Started | Sep 09 10:19:05 AM UTC 24 |
| Finished | Sep 09 10:19:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3006907963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.3006907963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.1801715639 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 430845762 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:19:06 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1801715639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.1801715639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.3068928570 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 65517730 ps |
| CPU time | 0.87 seconds |
| Started | Sep 09 10:08:04 AM UTC 24 |
| Finished | Sep 09 10:08:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068928570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.3068928570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.2102701718 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 5554846480 ps |
| CPU time | 12.59 seconds |
| Started | Sep 09 10:07:40 AM UTC 24 |
| Finished | Sep 09 10:07:54 AM UTC 24 |
| Peak memory | 227432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102701718 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.2102701718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.2439027265 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 14133140475 ps |
| CPU time | 22.95 seconds |
| Started | Sep 09 10:07:41 AM UTC 24 |
| Finished | Sep 09 10:08:05 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2439027265 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.2439027265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.2838688742 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 24418285582 ps |
| CPU time | 35.3 seconds |
| Started | Sep 09 10:07:42 AM UTC 24 |
| Finished | Sep 09 10:08:18 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838688742 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.2838688742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.2615092849 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 171984484 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:07:42 AM UTC 24 |
| Finished | Sep 09 10:07:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2615092849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.2615092849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.1532153210 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 151318556 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:07:42 AM UTC 24 |
| Finished | Sep 09 10:07:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532153210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.1532153210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.2512951382 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 390297191 ps |
| CPU time | 2.18 seconds |
| Started | Sep 09 10:07:42 AM UTC 24 |
| Finished | Sep 09 10:07:45 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512951382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_data_toggle_clear.2512951382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.1464471621 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 783810515 ps |
| CPU time | 4.05 seconds |
| Started | Sep 09 10:07:43 AM UTC 24 |
| Finished | Sep 09 10:07:48 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464471621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.1464471621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.3670643880 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 13534841683 ps |
| CPU time | 26.92 seconds |
| Started | Sep 09 10:07:43 AM UTC 24 |
| Finished | Sep 09 10:08:11 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670643880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.3670643880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.620082329 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 2560909115 ps |
| CPU time | 20.28 seconds |
| Started | Sep 09 10:07:43 AM UTC 24 |
| Finished | Sep 09 10:08:05 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=620082329 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.620082329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.1929824046 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 547438941 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:07:45 AM UTC 24 |
| Finished | Sep 09 10:07:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1929824046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_disable_endpoint.1929824046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.1930716633 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 208170165 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:07:46 AM UTC 24 |
| Finished | Sep 09 10:07:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930716633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.1930716633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_enable.1171438308 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 89141812 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:07:46 AM UTC 24 |
| Finished | Sep 09 10:07:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171438308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.1171438308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.4198599784 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 914901233 ps |
| CPU time | 3.07 seconds |
| Started | Sep 09 10:07:46 AM UTC 24 |
| Finished | Sep 09 10:07:50 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4198599784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.4198599784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.556929036 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 155915509 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:07:46 AM UTC 24 |
| Finished | Sep 09 10:07:49 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=556929036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.556929036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.453707161 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 294887500 ps |
| CPU time | 2.33 seconds |
| Started | Sep 09 10:07:48 AM UTC 24 |
| Finished | Sep 09 10:07:52 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=453707161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_fifo_rst.453707161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.3493494373 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 272674471 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:07:48 AM UTC 24 |
| Finished | Sep 09 10:07:51 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493494373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.3493494373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.1759122273 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 160725055 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:07:48 AM UTC 24 |
| Finished | Sep 09 10:07:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759122273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_stall.1759122273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.174898078 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 216492203 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:07:48 AM UTC 24 |
| Finished | Sep 09 10:07:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174898078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_in_trans.174898078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.1912323355 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 5297584161 ps |
| CPU time | 136.13 seconds |
| Started | Sep 09 10:07:48 AM UTC 24 |
| Finished | Sep 09 10:10:07 AM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912323355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.1912323355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.1706983032 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 6514050977 ps |
| CPU time | 88.9 seconds |
| Started | Sep 09 10:07:51 AM UTC 24 |
| Finished | Sep 09 10:09:22 AM UTC 24 |
| Peak memory | 217444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1706983032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.1706983032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.1733358661 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 233217051 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:07:51 AM UTC 24 |
| Finished | Sep 09 10:07:53 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733358661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_in_err.1733358661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.2950558835 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 15339672195 ps |
| CPU time | 25.58 seconds |
| Started | Sep 09 10:07:51 AM UTC 24 |
| Finished | Sep 09 10:08:18 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950558835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_resume.2950558835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.2547576635 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 4816775757 ps |
| CPU time | 9.33 seconds |
| Started | Sep 09 10:07:51 AM UTC 24 |
| Finished | Sep 09 10:08:01 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547576635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_link_suspend.2547576635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.470387327 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 4672972675 ps |
| CPU time | 43.71 seconds |
| Started | Sep 09 10:07:51 AM UTC 24 |
| Finished | Sep 09 10:08:36 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=470387327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.470387327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.2190673759 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 3541349933 ps |
| CPU time | 99.93 seconds |
| Started | Sep 09 10:07:51 AM UTC 24 |
| Finished | Sep 09 10:09:33 AM UTC 24 |
| Peak memory | 227368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2190673759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.2190673759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.3774898167 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 238955176 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:07:51 AM UTC 24 |
| Finished | Sep 09 10:07:54 AM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774898167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.3774898167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.648552457 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 194002422 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:07:51 AM UTC 24 |
| Finished | Sep 09 10:07:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=648552457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.648552457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.1147585672 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 2255730464 ps |
| CPU time | 57.33 seconds |
| Started | Sep 09 10:07:53 AM UTC 24 |
| Finished | Sep 09 10:08:52 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1147585672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.1147585672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.1114186998 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 2381060281 ps |
| CPU time | 28.94 seconds |
| Started | Sep 09 10:07:53 AM UTC 24 |
| Finished | Sep 09 10:08:23 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114186998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.1114186998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.3977059717 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 154119987 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:07:53 AM UTC 24 |
| Finished | Sep 09 10:07:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977059717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.3977059717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.1329496695 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 145120876 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:07:53 AM UTC 24 |
| Finished | Sep 09 10:07:55 AM UTC 24 |
| Peak memory | 214840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329496695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.1329496695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.2402801452 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 190265406 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:07:53 AM UTC 24 |
| Finished | Sep 09 10:07:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402801452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.2402801452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.2546057545 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 169334919 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:07:54 AM UTC 24 |
| Finished | Sep 09 10:07:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2546057545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.2546057545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.271244385 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 198778007 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:07:54 AM UTC 24 |
| Finished | Sep 09 10:07:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=271244385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_out_stall.271244385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.4207468253 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 179158941 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:07:54 AM UTC 24 |
| Finished | Sep 09 10:07:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207468253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_out_trans_nak.4207468253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.4089380858 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 152664989 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:07:54 AM UTC 24 |
| Finished | Sep 09 10:07:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089380858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.4089380858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.698799409 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 222607801 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:07:56 AM UTC 24 |
| Finished | Sep 09 10:07:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=698799409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.698799409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.2912932288 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 152639134 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:07:56 AM UTC 24 |
| Finished | Sep 09 10:07:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912932288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.2912932288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.3898953120 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 33987447 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:07:56 AM UTC 24 |
| Finished | Sep 09 10:07:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898953120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.3898953120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.1008573776 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 20075348324 ps |
| CPU time | 52.94 seconds |
| Started | Sep 09 10:07:56 AM UTC 24 |
| Finished | Sep 09 10:08:51 AM UTC 24 |
| Peak memory | 231608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008573776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.1008573776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.3863019522 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 162659461 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:07:56 AM UTC 24 |
| Finished | Sep 09 10:07:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863019522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.3863019522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.1615208249 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 181336654 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:07:57 AM UTC 24 |
| Finished | Sep 09 10:08:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615208249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.1615208249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.295422567 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 230355535 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:07:58 AM UTC 24 |
| Finished | Sep 09 10:08:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=295422567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_random_length_in_transaction.295422567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.961516260 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 153505977 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:07:58 AM UTC 24 |
| Finished | Sep 09 10:08:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=961516260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.961516260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.2133666266 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 20189590445 ps |
| CPU time | 27.03 seconds |
| Started | Sep 09 10:07:58 AM UTC 24 |
| Finished | Sep 09 10:08:26 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133666266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 19.usbdev_resume_link_active.2133666266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.3003642022 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 167813841 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:07:59 AM UTC 24 |
| Finished | Sep 09 10:08:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003642022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.3003642022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.2370724211 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 338560402 ps |
| CPU time | 1.94 seconds |
| Started | Sep 09 10:07:59 AM UTC 24 |
| Finished | Sep 09 10:08:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370724211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.2370724211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.824767704 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 176814157 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:08:00 AM UTC 24 |
| Finished | Sep 09 10:08:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=824767704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_setup_stage.824767704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.2713771672 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 151811443 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:08:00 AM UTC 24 |
| Finished | Sep 09 10:08:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713771672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.2713771672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.1400155502 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 223776321 ps |
| CPU time | 1.84 seconds |
| Started | Sep 09 10:08:00 AM UTC 24 |
| Finished | Sep 09 10:08:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1400155502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.1400155502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.2721610155 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 2710948007 ps |
| CPU time | 28.43 seconds |
| Started | Sep 09 10:08:00 AM UTC 24 |
| Finished | Sep 09 10:08:30 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721610155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.2721610155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.238299418 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 208841622 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:08:01 AM UTC 24 |
| Finished | Sep 09 10:08:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=238299418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.238299418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.4186484459 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 177212962 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:08:02 AM UTC 24 |
| Finished | Sep 09 10:08:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186484459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.4186484459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.489640188 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 382493619 ps |
| CPU time | 2.29 seconds |
| Started | Sep 09 10:08:02 AM UTC 24 |
| Finished | Sep 09 10:08:05 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=489640188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_stream_len_max.489640188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.579619919 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 2640147111 ps |
| CPU time | 70.39 seconds |
| Started | Sep 09 10:08:02 AM UTC 24 |
| Finished | Sep 09 10:09:14 AM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=579619919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_streaming_out.579619919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.891733714 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 2576591006 ps |
| CPU time | 17.52 seconds |
| Started | Sep 09 10:07:45 AM UTC 24 |
| Finished | Sep 09 10:08:03 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=891733714 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.891733714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.1989184498 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 604479100 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:08:02 AM UTC 24 |
| Finished | Sep 09 10:08:05 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1989184498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.1989184498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.167772040 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 314232086 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:19:06 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=167772040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.167772040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.2848920674 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 472747576 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:19:07 AM UTC 24 |
| Finished | Sep 09 10:19:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2848920674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.2848920674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.2645730759 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 276114626 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645730759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.2645730759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.1553050662 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 605005031 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1553050662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_ tx_rx_disruption.1553050662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.2970206998 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 606919438 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2970206998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_ tx_rx_disruption.2970206998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.3755110819 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 524501479 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3755110819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_ tx_rx_disruption.3755110819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.3309576960 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 265572157 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3309576960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.3309576960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.1392432658 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 552262318 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1392432658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_ tx_rx_disruption.1392432658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.3106251606 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 210088422 ps |
| CPU time | 0.88 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106251606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.3106251606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.115723201 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 552316884 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=115723201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_t x_rx_disruption.115723201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.94471437 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 240794712 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=94471437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.94471437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.1190786748 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 628368418 ps |
| CPU time | 1.87 seconds |
| Started | Sep 09 10:19:11 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1190786748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.1190786748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.157465538 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 400215623 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:19:12 AM UTC 24 |
| Finished | Sep 09 10:19:14 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=157465538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_t x_rx_disruption.157465538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.3858083705 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 163138555 ps |
| CPU time | 0.84 seconds |
| Started | Sep 09 10:19:12 AM UTC 24 |
| Finished | Sep 09 10:19:14 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858083705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.3858083705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.4235935657 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 670048916 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:12 AM UTC 24 |
| Finished | Sep 09 10:19:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4235935657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.4235935657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.145381725 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 330327477 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:19:12 AM UTC 24 |
| Finished | Sep 09 10:19:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=145381725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.145381725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.1453397467 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 655650679 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:19:14 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1453397467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.1453397467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.3805793576 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 58360600 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 09:57:51 AM UTC 24 |
| Finished | Sep 09 09:57:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3805793576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.3805793576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.2448615942 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 4962737171 ps |
| CPU time | 10.39 seconds |
| Started | Sep 09 09:56:47 AM UTC 24 |
| Finished | Sep 09 09:56:59 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448615942 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.2448615942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.2210848748 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 20557642214 ps |
| CPU time | 30.4 seconds |
| Started | Sep 09 09:56:48 AM UTC 24 |
| Finished | Sep 09 09:57:20 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2210848748 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.2210848748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.2977925473 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 29152143153 ps |
| CPU time | 60.42 seconds |
| Started | Sep 09 09:56:48 AM UTC 24 |
| Finished | Sep 09 09:57:50 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977925473 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.2977925473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.1262405476 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 176358110 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 09:56:49 AM UTC 24 |
| Finished | Sep 09 09:56:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262405476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.1262405476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.41866120 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 163574972 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 09:56:52 AM UTC 24 |
| Finished | Sep 09 09:56:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=41866120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_av_empty.41866120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.1530524972 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 140085281 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 09:56:52 AM UTC 24 |
| Finished | Sep 09 09:56:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530524972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.1530524972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.1734519952 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 148274999 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 09:56:52 AM UTC 24 |
| Finished | Sep 09 09:56:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734519952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.1734519952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.106343233 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 478213438 ps |
| CPU time | 3.11 seconds |
| Started | Sep 09 09:56:53 AM UTC 24 |
| Finished | Sep 09 09:56:57 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=106343233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_data_toggle_clear.106343233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.859460711 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 25640243486 ps |
| CPU time | 47.94 seconds |
| Started | Sep 09 09:56:55 AM UTC 24 |
| Finished | Sep 09 09:57:45 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=859460711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_device_address.859460711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.3588250176 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 303968671 ps |
| CPU time | 6.4 seconds |
| Started | Sep 09 09:56:56 AM UTC 24 |
| Finished | Sep 09 09:57:03 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588250176 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.3588250176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.1663489989 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 754652705 ps |
| CPU time | 3.21 seconds |
| Started | Sep 09 09:56:58 AM UTC 24 |
| Finished | Sep 09 09:57:02 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663489989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_disable_endpoint.1663489989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.1643309454 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 208991934 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 09:56:58 AM UTC 24 |
| Finished | Sep 09 09:57:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1643309454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.1643309454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_enable.1675388237 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 31518200 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 09:56:58 AM UTC 24 |
| Finished | Sep 09 09:57:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1675388237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_enable.1675388237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.1274550975 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 962378066 ps |
| CPU time | 3.85 seconds |
| Started | Sep 09 09:57:00 AM UTC 24 |
| Finished | Sep 09 09:57:05 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274550975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.1274550975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.698606261 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 374008956 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 09:57:01 AM UTC 24 |
| Finished | Sep 09 09:57:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=698606261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.698606261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.531139023 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 268786021 ps |
| CPU time | 1.86 seconds |
| Started | Sep 09 09:57:01 AM UTC 24 |
| Finished | Sep 09 09:57:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=531139023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_fifo_levels.531139023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.2434979326 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 358501298 ps |
| CPU time | 2.77 seconds |
| Started | Sep 09 09:57:03 AM UTC 24 |
| Finished | Sep 09 09:57:07 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434979326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.2434979326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.4204215608 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 117200065018 ps |
| CPU time | 335.03 seconds |
| Started | Sep 09 09:57:03 AM UTC 24 |
| Finished | Sep 09 10:02:43 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204215608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.4204215608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.2045522471 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 99286903652 ps |
| CPU time | 196.27 seconds |
| Started | Sep 09 09:57:03 AM UTC 24 |
| Finished | Sep 09 10:00:22 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2045522471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_hiclk_max.2045522471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.1406396445 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 85159835636 ps |
| CPU time | 158.82 seconds |
| Started | Sep 09 09:57:03 AM UTC 24 |
| Finished | Sep 09 09:59:45 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406396445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.1406396445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.718230884 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 114055989939 ps |
| CPU time | 214.56 seconds |
| Started | Sep 09 09:57:03 AM UTC 24 |
| Finished | Sep 09 10:00:41 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=718230884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_loclk_max.718230884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.711051753 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 100132347594 ps |
| CPU time | 152.92 seconds |
| Started | Sep 09 09:57:05 AM UTC 24 |
| Finished | Sep 09 09:59:41 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711051753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_phase.711051753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.3462727213 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 197170917 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 09:57:05 AM UTC 24 |
| Finished | Sep 09 09:57:08 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462727213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.3462727213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.1658929834 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 163717305 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 09:57:05 AM UTC 24 |
| Finished | Sep 09 09:57:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1658929834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.1658929834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.4091778654 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 247000995 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 09:57:08 AM UTC 24 |
| Finished | Sep 09 09:57:11 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4091778654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.4091778654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.2953096360 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 3083001684 ps |
| CPU time | 34.09 seconds |
| Started | Sep 09 09:57:05 AM UTC 24 |
| Finished | Sep 09 09:57:41 AM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953096360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.2953096360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.1299710503 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 5962678374 ps |
| CPU time | 66.74 seconds |
| Started | Sep 09 09:57:08 AM UTC 24 |
| Finished | Sep 09 09:58:16 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1299710503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.1299710503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.2645313659 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 218027997 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 09:57:08 AM UTC 24 |
| Finished | Sep 09 09:57:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645313659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_in_err.2645313659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.1052512905 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 30608447506 ps |
| CPU time | 66.2 seconds |
| Started | Sep 09 09:57:10 AM UTC 24 |
| Finished | Sep 09 09:58:18 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052512905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.1052512905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.3143792468 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 5717102153 ps |
| CPU time | 18.66 seconds |
| Started | Sep 09 09:57:10 AM UTC 24 |
| Finished | Sep 09 09:57:30 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143792468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.3143792468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.1829740101 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 3181101996 ps |
| CPU time | 25.68 seconds |
| Started | Sep 09 09:57:12 AM UTC 24 |
| Finished | Sep 09 09:57:39 AM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1829740101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.1829740101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.1078043147 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 2788597983 ps |
| CPU time | 72.31 seconds |
| Started | Sep 09 09:57:12 AM UTC 24 |
| Finished | Sep 09 09:58:26 AM UTC 24 |
| Peak memory | 234164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078043147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.1078043147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.3817792028 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 242978584 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 09:57:14 AM UTC 24 |
| Finished | Sep 09 09:57:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3817792028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.3817792028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.736173354 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 181217566 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 09:57:16 AM UTC 24 |
| Finished | Sep 09 09:57:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=736173354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.736173354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.621038849 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 2510962315 ps |
| CPU time | 71.28 seconds |
| Started | Sep 09 09:57:18 AM UTC 24 |
| Finished | Sep 09 09:58:31 AM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=621038849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.621038849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.665774602 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 2865015229 ps |
| CPU time | 74.92 seconds |
| Started | Sep 09 09:57:18 AM UTC 24 |
| Finished | Sep 09 09:58:35 AM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=665774602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.665774602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.1353198361 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 3008736001 ps |
| CPU time | 42.95 seconds |
| Started | Sep 09 09:57:18 AM UTC 24 |
| Finished | Sep 09 09:58:03 AM UTC 24 |
| Peak memory | 234256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353198361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.1353198361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.3650498074 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 165181173 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 09:57:20 AM UTC 24 |
| Finished | Sep 09 09:57:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3650498074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.3650498074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.3742592974 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 206966116 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 09:57:20 AM UTC 24 |
| Finished | Sep 09 09:57:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3742592974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.3742592974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.1962511202 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 224883154 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 09:57:21 AM UTC 24 |
| Finished | Sep 09 09:57:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962511202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.1962511202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.2700645163 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 201597870 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 09:57:22 AM UTC 24 |
| Finished | Sep 09 09:57:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700645163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.2700645163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.2522805542 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 147982281 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 09:57:24 AM UTC 24 |
| Finished | Sep 09 09:57:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522805542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_out_stall.2522805542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.2825318372 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 177485240 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 09:57:24 AM UTC 24 |
| Finished | Sep 09 09:57:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2825318372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_out_trans_nak.2825318372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.1860091017 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 193244175 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 09:57:25 AM UTC 24 |
| Finished | Sep 09 09:57:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860091017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.1860091017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.323955010 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 237956444 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 09:57:25 AM UTC 24 |
| Finished | Sep 09 09:57:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=323955010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.323955010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.2407256703 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 239709569 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 09:57:27 AM UTC 24 |
| Finished | Sep 09 09:57:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407256703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.2407256703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.4069398848 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 159385430 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 09:57:27 AM UTC 24 |
| Finished | Sep 09 09:57:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4069398848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.4069398848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.3669838309 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 39556715 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 09:57:28 AM UTC 24 |
| Finished | Sep 09 09:57:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3669838309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.3669838309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.752431295 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 9773819226 ps |
| CPU time | 35.01 seconds |
| Started | Sep 09 09:57:29 AM UTC 24 |
| Finished | Sep 09 09:58:06 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=752431295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_pkt_buffer.752431295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.3483410928 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 172682210 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 09:57:30 AM UTC 24 |
| Finished | Sep 09 09:57:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483410928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.3483410928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.1083969658 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 223161886 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 09:57:30 AM UTC 24 |
| Finished | Sep 09 09:57:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1083969658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.1083969658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.3591826253 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 3628323313 ps |
| CPU time | 90.09 seconds |
| Started | Sep 09 09:57:34 AM UTC 24 |
| Finished | Sep 09 09:59:06 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591826253 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.3591826253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.3925151179 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 6599268180 ps |
| CPU time | 192.23 seconds |
| Started | Sep 09 09:57:34 AM UTC 24 |
| Finished | Sep 09 10:00:49 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3925151179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.3925151179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.1087322500 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 15022402001 ps |
| CPU time | 404.22 seconds |
| Started | Sep 09 09:57:35 AM UTC 24 |
| Finished | Sep 09 10:04:25 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1087322500 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.1087322500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.1320067427 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 173918836 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 09:57:31 AM UTC 24 |
| Finished | Sep 09 09:57:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320067427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.1320067427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.2555916218 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 150874038 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 09:57:32 AM UTC 24 |
| Finished | Sep 09 09:57:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555916218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.2555916218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.3701752012 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 20217191295 ps |
| CPU time | 54.56 seconds |
| Started | Sep 09 09:57:35 AM UTC 24 |
| Finished | Sep 09 09:58:31 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701752012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.3701752012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.2283647373 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 149112413 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 09:57:36 AM UTC 24 |
| Finished | Sep 09 09:57:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283647373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_crc_err.2283647373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.1466835920 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 393009315 ps |
| CPU time | 2.51 seconds |
| Started | Sep 09 09:57:38 AM UTC 24 |
| Finished | Sep 09 09:57:41 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1466835920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_rx_full.1466835920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.2090346520 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 157969010 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 09:57:40 AM UTC 24 |
| Finished | Sep 09 09:57:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2090346520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.2090346520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.3143971826 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 490655928 ps |
| CPU time | 2.3 seconds |
| Started | Sep 09 09:57:49 AM UTC 24 |
| Finished | Sep 09 09:57:52 AM UTC 24 |
| Peak memory | 251540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143971826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.3143971826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.615222378 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 412841435 ps |
| CPU time | 2.13 seconds |
| Started | Sep 09 09:57:40 AM UTC 24 |
| Finished | Sep 09 09:57:43 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=615222378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_setup_priority.615222378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.253885925 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 324190097 ps |
| CPU time | 2.02 seconds |
| Started | Sep 09 09:57:41 AM UTC 24 |
| Finished | Sep 09 09:57:44 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=253885925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.253885925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.656775113 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 155501677 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 09:57:42 AM UTC 24 |
| Finished | Sep 09 09:57:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=656775113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_setup_stage.656775113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.2843128363 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 146180332 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 09:57:42 AM UTC 24 |
| Finished | Sep 09 09:57:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843128363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.2843128363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.197700164 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 204433741 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 09:57:42 AM UTC 24 |
| Finished | Sep 09 09:57:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197700164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.197700164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.4176101917 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 3602662831 ps |
| CPU time | 37.4 seconds |
| Started | Sep 09 09:57:43 AM UTC 24 |
| Finished | Sep 09 09:58:22 AM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4176101917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.4176101917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.747143411 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 164864923 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 09:57:45 AM UTC 24 |
| Finished | Sep 09 09:57:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=747143411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.747143411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.1590794078 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 150265782 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 09:57:45 AM UTC 24 |
| Finished | Sep 09 09:57:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590794078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.1590794078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.23019697 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 805709990 ps |
| CPU time | 3.34 seconds |
| Started | Sep 09 09:57:46 AM UTC 24 |
| Finished | Sep 09 09:57:50 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=23019697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_stream_len_max.23019697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.558783430 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 3308022860 ps |
| CPU time | 129.01 seconds |
| Started | Sep 09 09:57:46 AM UTC 24 |
| Finished | Sep 09 09:59:58 AM UTC 24 |
| Peak memory | 227684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=558783430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_streaming_out.558783430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.3015526267 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 5530498751 ps |
| CPU time | 42.96 seconds |
| Started | Sep 09 09:56:56 AM UTC 24 |
| Finished | Sep 09 09:57:40 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015526267 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.3015526267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.3615176319 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 558377835 ps |
| CPU time | 2.82 seconds |
| Started | Sep 09 09:57:47 AM UTC 24 |
| Finished | Sep 09 09:57:51 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3615176319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.3615176319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.3407757884 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 66728724 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:08:25 AM UTC 24 |
| Finished | Sep 09 10:08:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407757884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.3407757884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.3865187648 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 10529756090 ps |
| CPU time | 15.11 seconds |
| Started | Sep 09 10:08:04 AM UTC 24 |
| Finished | Sep 09 10:08:20 AM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865187648 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.3865187648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.3518081360 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 20433392748 ps |
| CPU time | 29.75 seconds |
| Started | Sep 09 10:08:04 AM UTC 24 |
| Finished | Sep 09 10:08:35 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3518081360 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.3518081360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.1813399763 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 25618217113 ps |
| CPU time | 37.91 seconds |
| Started | Sep 09 10:08:04 AM UTC 24 |
| Finished | Sep 09 10:08:43 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1813399763 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.1813399763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.130615424 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 182334846 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:08:04 AM UTC 24 |
| Finished | Sep 09 10:08:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=130615424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_av_buffer.130615424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.4109261153 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 147829757 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:08:05 AM UTC 24 |
| Finished | Sep 09 10:08:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109261153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_bitstuff_err.4109261153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.3656387765 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 364816011 ps |
| CPU time | 1.92 seconds |
| Started | Sep 09 10:08:06 AM UTC 24 |
| Finished | Sep 09 10:08:08 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656387765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.3656387765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.4117948009 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 862944850 ps |
| CPU time | 2.91 seconds |
| Started | Sep 09 10:08:06 AM UTC 24 |
| Finished | Sep 09 10:08:09 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117948009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.4117948009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.4294407184 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 32394302178 ps |
| CPU time | 70.92 seconds |
| Started | Sep 09 10:08:06 AM UTC 24 |
| Finished | Sep 09 10:09:18 AM UTC 24 |
| Peak memory | 217512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294407184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.4294407184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.161794785 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 1683966262 ps |
| CPU time | 38.9 seconds |
| Started | Sep 09 10:08:06 AM UTC 24 |
| Finished | Sep 09 10:08:46 AM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=161794785 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.161794785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.727924912 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 1139359767 ps |
| CPU time | 2.61 seconds |
| Started | Sep 09 10:08:06 AM UTC 24 |
| Finished | Sep 09 10:08:09 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=727924912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disable_endpoint.727924912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.3793091152 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 149228586 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:08:06 AM UTC 24 |
| Finished | Sep 09 10:08:08 AM UTC 24 |
| Peak memory | 214820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793091152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_disconnected.3793091152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_enable.3004682604 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 40076567 ps |
| CPU time | 0.78 seconds |
| Started | Sep 09 10:08:06 AM UTC 24 |
| Finished | Sep 09 10:08:08 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004682604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.3004682604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.121722316 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 905826167 ps |
| CPU time | 4.41 seconds |
| Started | Sep 09 10:08:07 AM UTC 24 |
| Finished | Sep 09 10:08:13 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=121722316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.121722316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.3867905275 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 455383506 ps |
| CPU time | 2.65 seconds |
| Started | Sep 09 10:08:07 AM UTC 24 |
| Finished | Sep 09 10:08:11 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867905275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.3867905275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.1842638582 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 320529839 ps |
| CPU time | 1.88 seconds |
| Started | Sep 09 10:08:07 AM UTC 24 |
| Finished | Sep 09 10:08:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1842638582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_fifo_levels.1842638582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.1032167020 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 322563824 ps |
| CPU time | 2.25 seconds |
| Started | Sep 09 10:08:07 AM UTC 24 |
| Finished | Sep 09 10:08:11 AM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032167020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.1032167020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.3533731257 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 177813510 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:08:09 AM UTC 24 |
| Finished | Sep 09 10:08:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533731257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.3533731257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.559420983 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 150602255 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:08:09 AM UTC 24 |
| Finished | Sep 09 10:08:11 AM UTC 24 |
| Peak memory | 214600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=559420983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_in_stall.559420983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.763921211 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 209080989 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:08:09 AM UTC 24 |
| Finished | Sep 09 10:08:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=763921211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_in_trans.763921211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.1116660544 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 5119432202 ps |
| CPU time | 48.5 seconds |
| Started | Sep 09 10:08:07 AM UTC 24 |
| Finished | Sep 09 10:08:58 AM UTC 24 |
| Peak memory | 234200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116660544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.1116660544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.2461477554 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 11518130619 ps |
| CPU time | 84.64 seconds |
| Started | Sep 09 10:08:09 AM UTC 24 |
| Finished | Sep 09 10:09:36 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2461477554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.2461477554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.2462729551 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 203595872 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:08:10 AM UTC 24 |
| Finished | Sep 09 10:08:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2462729551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.2462729551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.2723319312 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 15131438482 ps |
| CPU time | 27.88 seconds |
| Started | Sep 09 10:08:10 AM UTC 24 |
| Finished | Sep 09 10:08:40 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723319312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.2723319312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.1633767624 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 3883671938 ps |
| CPU time | 8.52 seconds |
| Started | Sep 09 10:08:10 AM UTC 24 |
| Finished | Sep 09 10:08:20 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633767624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.1633767624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.3563572100 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 3749154983 ps |
| CPU time | 104 seconds |
| Started | Sep 09 10:08:12 AM UTC 24 |
| Finished | Sep 09 10:09:58 AM UTC 24 |
| Peak memory | 227564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3563572100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.3563572100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.1611640451 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 2115539750 ps |
| CPU time | 21.64 seconds |
| Started | Sep 09 10:08:12 AM UTC 24 |
| Finished | Sep 09 10:08:35 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611640451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.1611640451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.4093869525 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 235844283 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:08:12 AM UTC 24 |
| Finished | Sep 09 10:08:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093869525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.4093869525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.1452156342 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 190156984 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:08:12 AM UTC 24 |
| Finished | Sep 09 10:08:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452156342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.1452156342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.2641965072 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 2216991503 ps |
| CPU time | 22.1 seconds |
| Started | Sep 09 10:08:12 AM UTC 24 |
| Finished | Sep 09 10:08:36 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641965072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.2641965072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.3407626850 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 2148721987 ps |
| CPU time | 56.5 seconds |
| Started | Sep 09 10:08:14 AM UTC 24 |
| Finished | Sep 09 10:09:12 AM UTC 24 |
| Peak memory | 227400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407626850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.3407626850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.3126083770 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 167645856 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:08:14 AM UTC 24 |
| Finished | Sep 09 10:08:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3126083770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.3126083770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.1449054084 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 154787066 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:08:14 AM UTC 24 |
| Finished | Sep 09 10:08:17 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449054084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.1449054084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.1827753509 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 174048206 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:08:14 AM UTC 24 |
| Finished | Sep 09 10:08:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827753509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_out_iso.1827753509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.4278467927 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 167537163 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:08:16 AM UTC 24 |
| Finished | Sep 09 10:08:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278467927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_out_stall.4278467927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.3437384495 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 189274622 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:08:16 AM UTC 24 |
| Finished | Sep 09 10:08:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3437384495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_out_trans_nak.3437384495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.1311109500 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 151151163 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:08:18 AM UTC 24 |
| Finished | Sep 09 10:08:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1311109500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.1311109500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.3515986029 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 198669195 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:08:18 AM UTC 24 |
| Finished | Sep 09 10:08:21 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515986029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.3515986029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.3449470728 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 174546220 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:08:18 AM UTC 24 |
| Finished | Sep 09 10:08:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449470728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.3449470728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.3228454199 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 39592070 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:08:18 AM UTC 24 |
| Finished | Sep 09 10:08:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228454199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.3228454199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.1343330862 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 18360854555 ps |
| CPU time | 52.23 seconds |
| Started | Sep 09 10:08:19 AM UTC 24 |
| Finished | Sep 09 10:09:14 AM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343330862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.1343330862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.4172539773 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 188778761 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:08:19 AM UTC 24 |
| Finished | Sep 09 10:08:22 AM UTC 24 |
| Peak memory | 214812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172539773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_pkt_received.4172539773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.4027429654 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 314026922 ps |
| CPU time | 1.84 seconds |
| Started | Sep 09 10:08:21 AM UTC 24 |
| Finished | Sep 09 10:08:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027429654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.4027429654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.2721128903 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 193176650 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:08:21 AM UTC 24 |
| Finished | Sep 09 10:08:24 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721128903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.2721128903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.155157734 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 193735846 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:08:21 AM UTC 24 |
| Finished | Sep 09 10:08:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=155157734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.155157734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.3793734108 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 201972055 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:08:21 AM UTC 24 |
| Finished | Sep 09 10:08:24 AM UTC 24 |
| Peak memory | 216196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793734108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_rx_crc_err.3793734108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.864137365 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 365896876 ps |
| CPU time | 2.32 seconds |
| Started | Sep 09 10:08:21 AM UTC 24 |
| Finished | Sep 09 10:08:25 AM UTC 24 |
| Peak memory | 216568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=864137365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_rx_full.864137365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.1412617890 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 154527317 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:08:22 AM UTC 24 |
| Finished | Sep 09 10:08:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412617890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.1412617890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.574943804 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 160730721 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:08:22 AM UTC 24 |
| Finished | Sep 09 10:08:25 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=574943804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 20.usbdev_setup_trans_ignored.574943804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.3905015510 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 254564048 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:08:22 AM UTC 24 |
| Finished | Sep 09 10:08:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3905015510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.3905015510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.2118804232 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 2737583250 ps |
| CPU time | 79.32 seconds |
| Started | Sep 09 10:08:22 AM UTC 24 |
| Finished | Sep 09 10:09:44 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118804232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.2118804232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.1745400787 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 198359429 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:08:22 AM UTC 24 |
| Finished | Sep 09 10:08:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1745400787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.1745400787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.879522538 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 224575890 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:08:23 AM UTC 24 |
| Finished | Sep 09 10:08:27 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879522538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_stall_trans.879522538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.92575695 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 390276980 ps |
| CPU time | 2.26 seconds |
| Started | Sep 09 10:08:24 AM UTC 24 |
| Finished | Sep 09 10:08:27 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92575695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_stream_len_max.92575695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.722661088 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 2067867025 ps |
| CPU time | 53.92 seconds |
| Started | Sep 09 10:08:24 AM UTC 24 |
| Finished | Sep 09 10:09:19 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722661088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_streaming_out.722661088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.3607996420 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 785846857 ps |
| CPU time | 14.8 seconds |
| Started | Sep 09 10:08:06 AM UTC 24 |
| Finished | Sep 09 10:08:22 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607996420 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.3607996420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.4268805451 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 605583690 ps |
| CPU time | 3.04 seconds |
| Started | Sep 09 10:08:25 AM UTC 24 |
| Finished | Sep 09 10:08:29 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4268805451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.4268805451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.4293151627 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 571680863 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4293151627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.4293151627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.3819675713 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 590731088 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:54 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3819675713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_ tx_rx_disruption.3819675713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.1847705744 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 597504664 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1847705744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.1847705744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.2441330357 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 547778855 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2441330357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.2441330357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.3418351619 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 656921899 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3418351619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.3418351619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.1248077094 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 515417875 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1248077094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.1248077094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.2342277607 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 487392462 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2342277607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.2342277607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.3659098397 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 581842602 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3659098397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.3659098397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.1242292865 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 508282765 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1242292865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.1242292865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.3587050937 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 612993041 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3587050937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.3587050937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.452595100 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 48140642 ps |
| CPU time | 0.96 seconds |
| Started | Sep 09 10:08:49 AM UTC 24 |
| Finished | Sep 09 10:08:51 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=452595100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.452595100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.3637389084 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 6180766000 ps |
| CPU time | 13.37 seconds |
| Started | Sep 09 10:08:25 AM UTC 24 |
| Finished | Sep 09 10:08:40 AM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637389084 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.3637389084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.1775488294 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 19699157432 ps |
| CPU time | 35.06 seconds |
| Started | Sep 09 10:08:27 AM UTC 24 |
| Finished | Sep 09 10:09:03 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775488294 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.1775488294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.3558731145 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 25333096021 ps |
| CPU time | 44.21 seconds |
| Started | Sep 09 10:08:27 AM UTC 24 |
| Finished | Sep 09 10:09:12 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558731145 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.3558731145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.2444139067 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 158583616 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:08:27 AM UTC 24 |
| Finished | Sep 09 10:08:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2444139067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.2444139067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.1987615716 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 188954986 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:08:27 AM UTC 24 |
| Finished | Sep 09 10:08:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987615716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.1987615716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.2441141065 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 620084165 ps |
| CPU time | 3 seconds |
| Started | Sep 09 10:08:27 AM UTC 24 |
| Finished | Sep 09 10:08:31 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441141065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 21.usbdev_data_toggle_clear.2441141065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.903511103 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 1137421730 ps |
| CPU time | 5.3 seconds |
| Started | Sep 09 10:08:28 AM UTC 24 |
| Finished | Sep 09 10:08:35 AM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903511103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.903511103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.1251752933 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 29257346505 ps |
| CPU time | 61.61 seconds |
| Started | Sep 09 10:08:28 AM UTC 24 |
| Finished | Sep 09 10:09:32 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251752933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.1251752933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.2502122906 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 963311117 ps |
| CPU time | 21.51 seconds |
| Started | Sep 09 10:08:28 AM UTC 24 |
| Finished | Sep 09 10:08:51 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502122906 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.2502122906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.1813286893 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 846352075 ps |
| CPU time | 3.73 seconds |
| Started | Sep 09 10:08:28 AM UTC 24 |
| Finished | Sep 09 10:08:33 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1813286893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.1813286893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.1602799836 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 136644111 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:08:29 AM UTC 24 |
| Finished | Sep 09 10:08:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1602799836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.1602799836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_enable.857391190 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 52462334 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:08:31 AM UTC 24 |
| Finished | Sep 09 10:08:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=857391190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_enable.857391190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.2945443912 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 1033022184 ps |
| CPU time | 4.68 seconds |
| Started | Sep 09 10:08:31 AM UTC 24 |
| Finished | Sep 09 10:08:37 AM UTC 24 |
| Peak memory | 216564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2945443912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.2945443912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.2697164576 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 323671272 ps |
| CPU time | 1.94 seconds |
| Started | Sep 09 10:08:31 AM UTC 24 |
| Finished | Sep 09 10:08:34 AM UTC 24 |
| Peak memory | 214356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2697164576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.2697164576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.1814290920 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 253326482 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:08:32 AM UTC 24 |
| Finished | Sep 09 10:08:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814290920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_fifo_levels.1814290920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.3817182029 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 336925996 ps |
| CPU time | 2.95 seconds |
| Started | Sep 09 10:08:33 AM UTC 24 |
| Finished | Sep 09 10:08:36 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3817182029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_fifo_rst.3817182029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.1250908706 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 234042027 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 10:08:34 AM UTC 24 |
| Finished | Sep 09 10:08:37 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1250908706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.1250908706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.304001776 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 143403411 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:08:34 AM UTC 24 |
| Finished | Sep 09 10:08:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=304001776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_in_stall.304001776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.960522465 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 219358140 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:08:35 AM UTC 24 |
| Finished | Sep 09 10:08:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=960522465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_in_trans.960522465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.467650746 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 4081765940 ps |
| CPU time | 31.93 seconds |
| Started | Sep 09 10:08:33 AM UTC 24 |
| Finished | Sep 09 10:09:06 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=467650746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.467650746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.1489351091 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 11116968147 ps |
| CPU time | 131.32 seconds |
| Started | Sep 09 10:08:37 AM UTC 24 |
| Finished | Sep 09 10:10:51 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489351091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.1489351091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.3231190206 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 237818626 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:08:37 AM UTC 24 |
| Finished | Sep 09 10:08:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3231190206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_in_err.3231190206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.3626210893 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 4706887882 ps |
| CPU time | 7.83 seconds |
| Started | Sep 09 10:08:37 AM UTC 24 |
| Finished | Sep 09 10:08:46 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626210893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_resume.3626210893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.464359972 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 10767976889 ps |
| CPU time | 24.35 seconds |
| Started | Sep 09 10:08:37 AM UTC 24 |
| Finished | Sep 09 10:09:03 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=464359972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_suspend.464359972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.1367807728 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 3463223181 ps |
| CPU time | 26.35 seconds |
| Started | Sep 09 10:08:37 AM UTC 24 |
| Finished | Sep 09 10:09:05 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367807728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.1367807728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.388072782 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 3247680574 ps |
| CPU time | 26.26 seconds |
| Started | Sep 09 10:08:38 AM UTC 24 |
| Finished | Sep 09 10:09:07 AM UTC 24 |
| Peak memory | 227200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=388072782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.388072782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.1322733522 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 250681608 ps |
| CPU time | 1.88 seconds |
| Started | Sep 09 10:08:39 AM UTC 24 |
| Finished | Sep 09 10:08:42 AM UTC 24 |
| Peak memory | 214672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1322733522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.1322733522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.2620628686 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 200601738 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:08:39 AM UTC 24 |
| Finished | Sep 09 10:08:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620628686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.2620628686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.999603510 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 2642723058 ps |
| CPU time | 68.67 seconds |
| Started | Sep 09 10:08:39 AM UTC 24 |
| Finished | Sep 09 10:09:49 AM UTC 24 |
| Peak memory | 234068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=999603510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.999603510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.2062067019 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 1867925962 ps |
| CPU time | 46.53 seconds |
| Started | Sep 09 10:08:39 AM UTC 24 |
| Finished | Sep 09 10:09:27 AM UTC 24 |
| Peak memory | 234104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2062067019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.2062067019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.2375057028 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 172571266 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:08:39 AM UTC 24 |
| Finished | Sep 09 10:08:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375057028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.2375057028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.4101377623 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 155085907 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:08:39 AM UTC 24 |
| Finished | Sep 09 10:08:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101377623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.4101377623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.821046312 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 225264102 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:08:40 AM UTC 24 |
| Finished | Sep 09 10:08:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=821046312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_nak_trans.821046312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.1207816783 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 186494697 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:08:40 AM UTC 24 |
| Finished | Sep 09 10:08:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1207816783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.1207816783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.3011676509 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 167365917 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:08:40 AM UTC 24 |
| Finished | Sep 09 10:08:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011676509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_out_stall.3011676509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.1292212534 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 180072827 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:08:40 AM UTC 24 |
| Finished | Sep 09 10:08:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292212534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.1292212534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.2213749737 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 203959411 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:08:40 AM UTC 24 |
| Finished | Sep 09 10:08:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213749737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.2213749737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.292189466 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 230684434 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:08:41 AM UTC 24 |
| Finished | Sep 09 10:08:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=292189466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.292189466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.3011633854 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 185528952 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:08:43 AM UTC 24 |
| Finished | Sep 09 10:08:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011633854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.3011633854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.850576340 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 43362390 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 10:08:43 AM UTC 24 |
| Finished | Sep 09 10:08:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=850576340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_phy_pins_sense.850576340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.349552733 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 9263327982 ps |
| CPU time | 32.12 seconds |
| Started | Sep 09 10:08:43 AM UTC 24 |
| Finished | Sep 09 10:09:17 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=349552733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_pkt_buffer.349552733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.2982981777 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 176426580 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:08:43 AM UTC 24 |
| Finished | Sep 09 10:08:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982981777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.2982981777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.210876299 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 218502988 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:08:45 AM UTC 24 |
| Finished | Sep 09 10:08:47 AM UTC 24 |
| Peak memory | 214468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=210876299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_pkt_sent.210876299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.2879693785 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 191644877 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:08:45 AM UTC 24 |
| Finished | Sep 09 10:08:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2879693785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_random_length_in_transaction.2879693785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.176291066 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 177359579 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:08:45 AM UTC 24 |
| Finished | Sep 09 10:08:47 AM UTC 24 |
| Peak memory | 216344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=176291066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.176291066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.3017165970 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 139286471 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:08:45 AM UTC 24 |
| Finished | Sep 09 10:08:47 AM UTC 24 |
| Peak memory | 216380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017165970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.3017165970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.3696055669 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 267332563 ps |
| CPU time | 1.9 seconds |
| Started | Sep 09 10:08:45 AM UTC 24 |
| Finished | Sep 09 10:08:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3696055669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_full.3696055669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.824151923 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 156446524 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:08:45 AM UTC 24 |
| Finished | Sep 09 10:08:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=824151923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_setup_stage.824151923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.1869839047 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 161495263 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:08:45 AM UTC 24 |
| Finished | Sep 09 10:08:47 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869839047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.1869839047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.2528231806 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 227796199 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:08:45 AM UTC 24 |
| Finished | Sep 09 10:08:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528231806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.2528231806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.2446561265 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 2425242668 ps |
| CPU time | 25.99 seconds |
| Started | Sep 09 10:08:46 AM UTC 24 |
| Finished | Sep 09 10:09:13 AM UTC 24 |
| Peak memory | 227632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446561265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.2446561265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.883835240 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 159224255 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:08:46 AM UTC 24 |
| Finished | Sep 09 10:08:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=883835240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.883835240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.245727279 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 179712823 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:08:46 AM UTC 24 |
| Finished | Sep 09 10:08:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=245727279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_stall_trans.245727279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.2191911251 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 728680776 ps |
| CPU time | 3.83 seconds |
| Started | Sep 09 10:08:47 AM UTC 24 |
| Finished | Sep 09 10:08:52 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191911251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.2191911251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.2706108975 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 2662663183 ps |
| CPU time | 29.73 seconds |
| Started | Sep 09 10:08:47 AM UTC 24 |
| Finished | Sep 09 10:09:18 AM UTC 24 |
| Peak memory | 229800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706108975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.2706108975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.535310734 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 838660396 ps |
| CPU time | 6.92 seconds |
| Started | Sep 09 10:08:28 AM UTC 24 |
| Finished | Sep 09 10:08:37 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=535310734 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.535310734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.1389395301 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 550506500 ps |
| CPU time | 2.12 seconds |
| Started | Sep 09 10:08:48 AM UTC 24 |
| Finished | Sep 09 10:08:51 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1389395301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_t x_rx_disruption.1389395301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.2796160071 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 512564114 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2796160071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_ tx_rx_disruption.2796160071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.3509529401 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 492409243 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3509529401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_ tx_rx_disruption.3509529401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.3051688164 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 531088395 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3051688164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.3051688164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.3058527453 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 624415375 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3058527453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.3058527453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.3085603859 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 603143031 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3085603859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_ tx_rx_disruption.3085603859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.1803423592 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 501476706 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1803423592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_ tx_rx_disruption.1803423592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.261884547 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 630395900 ps |
| CPU time | 1.89 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=261884547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_t x_rx_disruption.261884547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.4014429274 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 510075611 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4014429274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_ tx_rx_disruption.4014429274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.1656458149 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 485639578 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1656458149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.1656458149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.1235234405 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 562688394 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:19:16 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1235234405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.1235234405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.3368311166 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 42058640 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:09:16 AM UTC 24 |
| Finished | Sep 09 10:09:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3368311166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.3368311166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.2668772112 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 10519725544 ps |
| CPU time | 17.23 seconds |
| Started | Sep 09 10:08:49 AM UTC 24 |
| Finished | Sep 09 10:09:08 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668772112 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.2668772112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.1317105078 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 15488945510 ps |
| CPU time | 24.84 seconds |
| Started | Sep 09 10:08:49 AM UTC 24 |
| Finished | Sep 09 10:09:15 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1317105078 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.1317105078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.2199181725 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 23914328885 ps |
| CPU time | 46.47 seconds |
| Started | Sep 09 10:08:49 AM UTC 24 |
| Finished | Sep 09 10:09:37 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199181725 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.2199181725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.2992421991 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 152476942 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:08:49 AM UTC 24 |
| Finished | Sep 09 10:08:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992421991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.2992421991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.3618797205 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 150837689 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:08:49 AM UTC 24 |
| Finished | Sep 09 10:08:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618797205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_bitstuff_err.3618797205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.1427831051 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 292936797 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:08:50 AM UTC 24 |
| Finished | Sep 09 10:08:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427831051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.1427831051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.2920881110 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 416852600 ps |
| CPU time | 2.39 seconds |
| Started | Sep 09 10:08:50 AM UTC 24 |
| Finished | Sep 09 10:08:53 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920881110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.2920881110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.3517718704 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 4958501360 ps |
| CPU time | 34.65 seconds |
| Started | Sep 09 10:08:53 AM UTC 24 |
| Finished | Sep 09 10:09:29 AM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517718704 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.3517718704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.870091428 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 486624535 ps |
| CPU time | 2.49 seconds |
| Started | Sep 09 10:08:53 AM UTC 24 |
| Finished | Sep 09 10:08:56 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=870091428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_disable_endpoint.870091428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.2306913441 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 193008430 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:08:53 AM UTC 24 |
| Finished | Sep 09 10:08:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2306913441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.2306913441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_enable.2169155497 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 54440413 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:08:53 AM UTC 24 |
| Finished | Sep 09 10:08:55 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2169155497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.2169155497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.4128758289 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 1037678855 ps |
| CPU time | 4.87 seconds |
| Started | Sep 09 10:08:53 AM UTC 24 |
| Finished | Sep 09 10:08:59 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128758289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.4128758289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.783419423 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 194690211 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:08:53 AM UTC 24 |
| Finished | Sep 09 10:08:55 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=783419423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.783419423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.2735283157 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 150858731 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:08:54 AM UTC 24 |
| Finished | Sep 09 10:08:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735283157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_fifo_levels.2735283157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.233291667 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 359623489 ps |
| CPU time | 2.31 seconds |
| Started | Sep 09 10:08:54 AM UTC 24 |
| Finished | Sep 09 10:08:58 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=233291667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_fifo_rst.233291667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.4044878420 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 169711145 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:08:55 AM UTC 24 |
| Finished | Sep 09 10:08:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044878420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.4044878420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.1358218997 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 137878331 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:08:57 AM UTC 24 |
| Finished | Sep 09 10:08:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358218997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.1358218997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.1636734924 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 265277917 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:08:57 AM UTC 24 |
| Finished | Sep 09 10:08:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636734924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_trans.1636734924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.2687250787 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 3408286153 ps |
| CPU time | 38.79 seconds |
| Started | Sep 09 10:08:54 AM UTC 24 |
| Finished | Sep 09 10:09:34 AM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2687250787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.2687250787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.351483215 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 3700308948 ps |
| CPU time | 24.93 seconds |
| Started | Sep 09 10:08:58 AM UTC 24 |
| Finished | Sep 09 10:09:24 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=351483215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.351483215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.2662008786 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 203691963 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:08:58 AM UTC 24 |
| Finished | Sep 09 10:09:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2662008786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_in_err.2662008786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.2713596455 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 27818750824 ps |
| CPU time | 55.7 seconds |
| Started | Sep 09 10:08:58 AM UTC 24 |
| Finished | Sep 09 10:09:56 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713596455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.2713596455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.2328942598 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 5088389368 ps |
| CPU time | 8.9 seconds |
| Started | Sep 09 10:08:58 AM UTC 24 |
| Finished | Sep 09 10:09:08 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2328942598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_link_suspend.2328942598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.2008104606 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 5027701172 ps |
| CPU time | 134.43 seconds |
| Started | Sep 09 10:08:59 AM UTC 24 |
| Finished | Sep 09 10:11:16 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008104606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.2008104606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.1692561594 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 3738633435 ps |
| CPU time | 103.2 seconds |
| Started | Sep 09 10:08:59 AM UTC 24 |
| Finished | Sep 09 10:10:45 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692561594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.1692561594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.4207022430 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 237356187 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:09:00 AM UTC 24 |
| Finished | Sep 09 10:09:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207022430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.4207022430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.2581994445 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 190307477 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:09:00 AM UTC 24 |
| Finished | Sep 09 10:09:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2581994445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.2581994445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.2731607899 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 2265515709 ps |
| CPU time | 18.93 seconds |
| Started | Sep 09 10:09:00 AM UTC 24 |
| Finished | Sep 09 10:09:20 AM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2731607899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.2731607899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.2353440495 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 1719957019 ps |
| CPU time | 45.47 seconds |
| Started | Sep 09 10:09:02 AM UTC 24 |
| Finished | Sep 09 10:09:49 AM UTC 24 |
| Peak memory | 227620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353440495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.2353440495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.2808344978 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 180515319 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:09:03 AM UTC 24 |
| Finished | Sep 09 10:09:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808344978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.2808344978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.1222610672 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 156466316 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:09:03 AM UTC 24 |
| Finished | Sep 09 10:09:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222610672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.1222610672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.2769802542 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 201837729 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:09:05 AM UTC 24 |
| Finished | Sep 09 10:09:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769802542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.2769802542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.380163379 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 157373805 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:09:05 AM UTC 24 |
| Finished | Sep 09 10:09:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=380163379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_out_iso.380163379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.1219082793 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 160518749 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:09:06 AM UTC 24 |
| Finished | Sep 09 10:09:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1219082793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_out_stall.1219082793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.3136524345 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 186799433 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:09:08 AM UTC 24 |
| Finished | Sep 09 10:09:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136524345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.3136524345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.2060348400 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 157492623 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:09:08 AM UTC 24 |
| Finished | Sep 09 10:09:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060348400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.2060348400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.1232799771 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 217161225 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:09:08 AM UTC 24 |
| Finished | Sep 09 10:09:11 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232799771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.1232799771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.866104375 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 143656738 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:09:08 AM UTC 24 |
| Finished | Sep 09 10:09:11 AM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866104375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.866104375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.2862330136 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 72545042 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:09:09 AM UTC 24 |
| Finished | Sep 09 10:09:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2862330136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.2862330136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.2596718721 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 22244842433 ps |
| CPU time | 68.15 seconds |
| Started | Sep 09 10:09:09 AM UTC 24 |
| Finished | Sep 09 10:10:18 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596718721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.2596718721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.134641241 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 189139660 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:09:09 AM UTC 24 |
| Finished | Sep 09 10:09:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=134641241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_pkt_received.134641241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.2738761413 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 213723243 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:09:10 AM UTC 24 |
| Finished | Sep 09 10:09:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2738761413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.2738761413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.2705630070 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 259317068 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:09:10 AM UTC 24 |
| Finished | Sep 09 10:09:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2705630070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.2705630070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.3363233768 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 206273451 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:09:10 AM UTC 24 |
| Finished | Sep 09 10:09:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3363233768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.3363233768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.2327130133 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 179344709 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:09:11 AM UTC 24 |
| Finished | Sep 09 10:09:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327130133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_rx_crc_err.2327130133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.3133980453 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 365785609 ps |
| CPU time | 1.97 seconds |
| Started | Sep 09 10:09:11 AM UTC 24 |
| Finished | Sep 09 10:09:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3133980453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_rx_full.3133980453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.892052153 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 173376435 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:09:12 AM UTC 24 |
| Finished | Sep 09 10:09:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=892052153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_setup_stage.892052153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.478201449 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 177529696 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:09:12 AM UTC 24 |
| Finished | Sep 09 10:09:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=478201449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 22.usbdev_setup_trans_ignored.478201449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.1523645938 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 204242450 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:09:13 AM UTC 24 |
| Finished | Sep 09 10:09:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523645938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.1523645938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.3885274284 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 2970888661 ps |
| CPU time | 81.66 seconds |
| Started | Sep 09 10:09:13 AM UTC 24 |
| Finished | Sep 09 10:10:36 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3885274284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.3885274284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.2990034635 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 148108477 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:09:14 AM UTC 24 |
| Finished | Sep 09 10:09:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2990034635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.2990034635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.887178032 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 181699199 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:09:14 AM UTC 24 |
| Finished | Sep 09 10:09:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=887178032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_stall_trans.887178032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.2677133449 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 1373211015 ps |
| CPU time | 5.32 seconds |
| Started | Sep 09 10:09:14 AM UTC 24 |
| Finished | Sep 09 10:09:20 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677133449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.2677133449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.1458344689 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 1802035583 ps |
| CPU time | 49.78 seconds |
| Started | Sep 09 10:09:14 AM UTC 24 |
| Finished | Sep 09 10:10:05 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458344689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_streaming_out.1458344689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.52683326 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 2494405616 ps |
| CPU time | 24.08 seconds |
| Started | Sep 09 10:08:53 AM UTC 24 |
| Finished | Sep 09 10:09:18 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=52683326 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.52683326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.3772683539 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 551397070 ps |
| CPU time | 2.63 seconds |
| Started | Sep 09 10:09:14 AM UTC 24 |
| Finished | Sep 09 10:09:18 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3772683539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.3772683539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.795335909 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 622363576 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 10:19:18 AM UTC 24 |
| Finished | Sep 09 10:19:21 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=795335909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_t x_rx_disruption.795335909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.2619495973 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 508070133 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:19:21 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2619495973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.2619495973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.3603533992 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 535211231 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:19:21 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3603533992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.3603533992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.2928468719 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 655804707 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:19:21 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2928468719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_ tx_rx_disruption.2928468719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.1569898356 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 474909544 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:19:21 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1569898356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.1569898356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.281219751 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 448893737 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:19:21 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 214904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=281219751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_t x_rx_disruption.281219751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.2223401201 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 555766770 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:19:21 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 214792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2223401201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.2223401201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.4120984856 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 515385999 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:19:21 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 214676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4120984856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_ tx_rx_disruption.4120984856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.3813074744 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 462197510 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3813074744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_ tx_rx_disruption.3813074744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.2261554892 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 511559457 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2261554892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.2261554892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.2809506324 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 51328712 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:09:35 AM UTC 24 |
| Finished | Sep 09 10:09:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809506324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.2809506324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.911605021 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 6650164445 ps |
| CPU time | 12.22 seconds |
| Started | Sep 09 10:09:17 AM UTC 24 |
| Finished | Sep 09 10:09:30 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=911605021 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.911605021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.49977831 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 15635681821 ps |
| CPU time | 27.82 seconds |
| Started | Sep 09 10:09:17 AM UTC 24 |
| Finished | Sep 09 10:09:46 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=49977831 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.49977831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.991354515 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 25202200916 ps |
| CPU time | 36.87 seconds |
| Started | Sep 09 10:09:17 AM UTC 24 |
| Finished | Sep 09 10:09:55 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=991354515 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.991354515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.690221393 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 149685572 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:09:17 AM UTC 24 |
| Finished | Sep 09 10:09:19 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690221393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_av_buffer.690221393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.571204052 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 152391576 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:09:17 AM UTC 24 |
| Finished | Sep 09 10:09:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=571204052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_bitstuff_err.571204052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.701743990 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 532510848 ps |
| CPU time | 2.31 seconds |
| Started | Sep 09 10:09:17 AM UTC 24 |
| Finished | Sep 09 10:09:20 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=701743990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_data_toggle_clear.701743990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.3899647078 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 655449119 ps |
| CPU time | 3.13 seconds |
| Started | Sep 09 10:09:17 AM UTC 24 |
| Finished | Sep 09 10:09:21 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899647078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.3899647078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.1992276326 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 40871821762 ps |
| CPU time | 85.22 seconds |
| Started | Sep 09 10:09:17 AM UTC 24 |
| Finished | Sep 09 10:10:44 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992276326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.1992276326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.3269100288 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 1559585470 ps |
| CPU time | 13.41 seconds |
| Started | Sep 09 10:09:18 AM UTC 24 |
| Finished | Sep 09 10:09:33 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269100288 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.3269100288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.373031751 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 644082092 ps |
| CPU time | 2.58 seconds |
| Started | Sep 09 10:09:19 AM UTC 24 |
| Finished | Sep 09 10:09:22 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=373031751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disable_endpoint.373031751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.1679531808 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 147589117 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:09:19 AM UTC 24 |
| Finished | Sep 09 10:09:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1679531808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_disconnected.1679531808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_enable.2157034639 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 77092421 ps |
| CPU time | 0.93 seconds |
| Started | Sep 09 10:09:21 AM UTC 24 |
| Finished | Sep 09 10:09:23 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157034639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.2157034639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.913783251 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 884195266 ps |
| CPU time | 4.1 seconds |
| Started | Sep 09 10:09:21 AM UTC 24 |
| Finished | Sep 09 10:09:26 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=913783251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.913783251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.3365933976 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 457278859 ps |
| CPU time | 2.29 seconds |
| Started | Sep 09 10:09:21 AM UTC 24 |
| Finished | Sep 09 10:09:24 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365933976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.3365933976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.396673585 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 182726685 ps |
| CPU time | 2.17 seconds |
| Started | Sep 09 10:09:21 AM UTC 24 |
| Finished | Sep 09 10:09:24 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=396673585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_fifo_rst.396673585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.609380472 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 171302311 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:09:21 AM UTC 24 |
| Finished | Sep 09 10:09:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=609380472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.609380472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.1625675205 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 145063096 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:09:21 AM UTC 24 |
| Finished | Sep 09 10:09:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625675205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_stall.1625675205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.3963361421 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 242614271 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:09:21 AM UTC 24 |
| Finished | Sep 09 10:09:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963361421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.3963361421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.3448651091 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 5401993308 ps |
| CPU time | 51.73 seconds |
| Started | Sep 09 10:09:21 AM UTC 24 |
| Finished | Sep 09 10:10:14 AM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448651091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.3448651091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.2246677312 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 4866470740 ps |
| CPU time | 59.84 seconds |
| Started | Sep 09 10:09:22 AM UTC 24 |
| Finished | Sep 09 10:10:24 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246677312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.2246677312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.3811259930 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 247936709 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:09:22 AM UTC 24 |
| Finished | Sep 09 10:09:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811259930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.3811259930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.1347281837 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 11234406147 ps |
| CPU time | 26.49 seconds |
| Started | Sep 09 10:09:22 AM UTC 24 |
| Finished | Sep 09 10:09:50 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347281837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_resume.1347281837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.3520444806 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 11110701268 ps |
| CPU time | 20.52 seconds |
| Started | Sep 09 10:09:22 AM UTC 24 |
| Finished | Sep 09 10:09:44 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520444806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_link_suspend.3520444806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.1754299075 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 4016051692 ps |
| CPU time | 31.93 seconds |
| Started | Sep 09 10:09:24 AM UTC 24 |
| Finished | Sep 09 10:09:57 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1754299075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.1754299075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.1662945713 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 2966673906 ps |
| CPU time | 82.14 seconds |
| Started | Sep 09 10:09:24 AM UTC 24 |
| Finished | Sep 09 10:10:48 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662945713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.1662945713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.393672500 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 281657090 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:09:25 AM UTC 24 |
| Finished | Sep 09 10:09:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=393672500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.393672500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.2579253955 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 180541027 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:09:25 AM UTC 24 |
| Finished | Sep 09 10:09:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2579253955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.2579253955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.4200460809 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 2503179539 ps |
| CPU time | 20.48 seconds |
| Started | Sep 09 10:09:25 AM UTC 24 |
| Finished | Sep 09 10:09:47 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200460809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.4200460809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.3658695554 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 2171337264 ps |
| CPU time | 16.67 seconds |
| Started | Sep 09 10:09:26 AM UTC 24 |
| Finished | Sep 09 10:09:43 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658695554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.3658695554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.1324857085 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 163037519 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:09:26 AM UTC 24 |
| Finished | Sep 09 10:09:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1324857085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.1324857085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.1255358793 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 165646305 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:09:26 AM UTC 24 |
| Finished | Sep 09 10:09:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255358793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.1255358793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.1059242992 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 175414591 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:09:26 AM UTC 24 |
| Finished | Sep 09 10:09:28 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059242992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.1059242992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.1770000534 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 160919960 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:09:26 AM UTC 24 |
| Finished | Sep 09 10:09:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1770000534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.1770000534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.886055234 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 173437245 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:09:27 AM UTC 24 |
| Finished | Sep 09 10:09:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=886055234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_out_trans_nak.886055234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.3273024115 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 153920668 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:09:29 AM UTC 24 |
| Finished | Sep 09 10:09:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3273024115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.3273024115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.2901040572 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 212351265 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:09:29 AM UTC 24 |
| Finished | Sep 09 10:09:31 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2901040572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.2901040572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.4262192303 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 194055859 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:09:29 AM UTC 24 |
| Finished | Sep 09 10:09:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262192303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.4262192303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.1075524974 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 30797327 ps |
| CPU time | 0.92 seconds |
| Started | Sep 09 10:09:29 AM UTC 24 |
| Finished | Sep 09 10:09:31 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075524974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.1075524974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.1622842160 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 23447814983 ps |
| CPU time | 73.11 seconds |
| Started | Sep 09 10:09:29 AM UTC 24 |
| Finished | Sep 09 10:10:44 AM UTC 24 |
| Peak memory | 231720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622842160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_pkt_buffer.1622842160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.4133029376 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 226664082 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:09:31 AM UTC 24 |
| Finished | Sep 09 10:09:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133029376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_pkt_received.4133029376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.473274676 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 179795041 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:09:31 AM UTC 24 |
| Finished | Sep 09 10:09:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=473274676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_pkt_sent.473274676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.1511530164 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 217176908 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:09:31 AM UTC 24 |
| Finished | Sep 09 10:09:33 AM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511530164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_random_length_in_transaction.1511530164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.3567854251 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 163153934 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:09:31 AM UTC 24 |
| Finished | Sep 09 10:09:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567854251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.3567854251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.465056965 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 164056347 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:09:31 AM UTC 24 |
| Finished | Sep 09 10:09:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=465056965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_rx_crc_err.465056965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.676370101 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 241224086 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:09:31 AM UTC 24 |
| Finished | Sep 09 10:09:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=676370101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_rx_full.676370101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.592784376 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 184209168 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:09:33 AM UTC 24 |
| Finished | Sep 09 10:09:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=592784376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_setup_stage.592784376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.4230380738 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 147385613 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:09:33 AM UTC 24 |
| Finished | Sep 09 10:09:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4230380738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.4230380738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.2845274532 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 201647631 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:09:33 AM UTC 24 |
| Finished | Sep 09 10:09:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845274532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.2845274532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.2005716212 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 3157596731 ps |
| CPU time | 81.06 seconds |
| Started | Sep 09 10:09:33 AM UTC 24 |
| Finished | Sep 09 10:10:56 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2005716212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.2005716212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.3515420418 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 172749986 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:09:33 AM UTC 24 |
| Finished | Sep 09 10:09:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515420418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.3515420418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.1484614802 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 153833300 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:09:33 AM UTC 24 |
| Finished | Sep 09 10:09:35 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1484614802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.1484614802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.347737140 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 196232393 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:09:35 AM UTC 24 |
| Finished | Sep 09 10:09:37 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347737140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_stream_len_max.347737140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.1795190459 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 4170163642 ps |
| CPU time | 131.39 seconds |
| Started | Sep 09 10:09:35 AM UTC 24 |
| Finished | Sep 09 10:11:49 AM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1795190459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_streaming_out.1795190459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.975957573 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 1054466059 ps |
| CPU time | 23.75 seconds |
| Started | Sep 09 10:09:19 AM UTC 24 |
| Finished | Sep 09 10:09:43 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=975957573 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.975957573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.3601147210 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 494620260 ps |
| CPU time | 2.03 seconds |
| Started | Sep 09 10:09:35 AM UTC 24 |
| Finished | Sep 09 10:09:38 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3601147210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_t x_rx_disruption.3601147210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.1999919745 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 649711908 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:36 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1999919745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_ tx_rx_disruption.1999919745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.3805693238 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 610484265 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3805693238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.3805693238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.507657844 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 627158411 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:36 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=507657844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_t x_rx_disruption.507657844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.3216710226 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 492356785 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:36 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3216710226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.3216710226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.528327931 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 488530039 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:45 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=528327931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_t x_rx_disruption.528327931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.2773943646 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 459244750 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:36 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2773943646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.2773943646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.951885550 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 533704686 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:45 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=951885550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_t x_rx_disruption.951885550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.1850644027 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 459977565 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1850644027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.1850644027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.4098006795 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 594445918 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4098006795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.4098006795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.1477630921 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 635602871 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1477630921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_ tx_rx_disruption.1477630921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.585635651 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 35901428 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:09:56 AM UTC 24 |
| Finished | Sep 09 10:09:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=585635651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.585635651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.2550530956 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 12240694057 ps |
| CPU time | 20.03 seconds |
| Started | Sep 09 10:09:35 AM UTC 24 |
| Finished | Sep 09 10:09:56 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550530956 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.2550530956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.3745048858 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 13902603732 ps |
| CPU time | 23.55 seconds |
| Started | Sep 09 10:09:35 AM UTC 24 |
| Finished | Sep 09 10:10:00 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3745048858 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.3745048858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.1508180067 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 29859787708 ps |
| CPU time | 42.81 seconds |
| Started | Sep 09 10:09:35 AM UTC 24 |
| Finished | Sep 09 10:10:19 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508180067 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.1508180067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.3119102576 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 215366721 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:09:35 AM UTC 24 |
| Finished | Sep 09 10:09:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119102576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.3119102576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.3478795346 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 157864166 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:09:37 AM UTC 24 |
| Finished | Sep 09 10:09:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3478795346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.3478795346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.1908387209 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 186345695 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:09:37 AM UTC 24 |
| Finished | Sep 09 10:09:39 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908387209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 24.usbdev_data_toggle_clear.1908387209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.741638802 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 631323960 ps |
| CPU time | 3.2 seconds |
| Started | Sep 09 10:09:37 AM UTC 24 |
| Finished | Sep 09 10:09:41 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=741638802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.741638802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.801902125 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 29393854577 ps |
| CPU time | 65.14 seconds |
| Started | Sep 09 10:09:37 AM UTC 24 |
| Finished | Sep 09 10:10:44 AM UTC 24 |
| Peak memory | 217460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=801902125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_device_address.801902125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.183846834 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 4249064227 ps |
| CPU time | 33.74 seconds |
| Started | Sep 09 10:09:37 AM UTC 24 |
| Finished | Sep 09 10:10:12 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=183846834 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.183846834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.2152021112 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 1104849825 ps |
| CPU time | 2.49 seconds |
| Started | Sep 09 10:09:37 AM UTC 24 |
| Finished | Sep 09 10:09:41 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152021112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_disable_endpoint.2152021112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.4206917717 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 143150299 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:09:39 AM UTC 24 |
| Finished | Sep 09 10:09:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206917717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.4206917717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_enable.1788023429 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 37220319 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:09:39 AM UTC 24 |
| Finished | Sep 09 10:09:41 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788023429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.1788023429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.4068577134 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 786443558 ps |
| CPU time | 3.48 seconds |
| Started | Sep 09 10:09:39 AM UTC 24 |
| Finished | Sep 09 10:09:43 AM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4068577134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.4068577134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.2648747538 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 183073427 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:09:39 AM UTC 24 |
| Finished | Sep 09 10:09:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648747538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_fifo_levels.2648747538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.1086921757 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 244850797 ps |
| CPU time | 2.89 seconds |
| Started | Sep 09 10:09:39 AM UTC 24 |
| Finished | Sep 09 10:09:43 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086921757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.1086921757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.3195152551 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 230077593 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:09:40 AM UTC 24 |
| Finished | Sep 09 10:09:43 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3195152551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.3195152551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.499730250 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 185646145 ps |
| CPU time | 1.01 seconds |
| Started | Sep 09 10:09:41 AM UTC 24 |
| Finished | Sep 09 10:09:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=499730250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_in_stall.499730250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.417291478 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 204759112 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:09:41 AM UTC 24 |
| Finished | Sep 09 10:09:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=417291478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_in_trans.417291478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.3501632453 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 3320419553 ps |
| CPU time | 36.92 seconds |
| Started | Sep 09 10:09:40 AM UTC 24 |
| Finished | Sep 09 10:10:18 AM UTC 24 |
| Peak memory | 227640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3501632453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.3501632453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.982592763 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 5570284719 ps |
| CPU time | 46.04 seconds |
| Started | Sep 09 10:09:43 AM UTC 24 |
| Finished | Sep 09 10:10:30 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=982592763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.982592763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.4043831741 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 212762634 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:09:43 AM UTC 24 |
| Finished | Sep 09 10:09:45 AM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043831741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_in_err.4043831741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.13579953 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 12525956870 ps |
| CPU time | 19.75 seconds |
| Started | Sep 09 10:09:43 AM UTC 24 |
| Finished | Sep 09 10:10:04 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=13579953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_link_resume.13579953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.609321709 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 11273358908 ps |
| CPU time | 17.35 seconds |
| Started | Sep 09 10:09:43 AM UTC 24 |
| Finished | Sep 09 10:10:01 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=609321709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_suspend.609321709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.1928115049 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 4892361211 ps |
| CPU time | 140.23 seconds |
| Started | Sep 09 10:09:44 AM UTC 24 |
| Finished | Sep 09 10:12:07 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928115049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.1928115049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.4070457758 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 2637804855 ps |
| CPU time | 25.3 seconds |
| Started | Sep 09 10:09:44 AM UTC 24 |
| Finished | Sep 09 10:10:11 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4070457758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.4070457758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.4279049011 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 266904948 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 10:09:44 AM UTC 24 |
| Finished | Sep 09 10:09:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279049011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.4279049011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.837505168 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 204081749 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:09:44 AM UTC 24 |
| Finished | Sep 09 10:09:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=837505168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.837505168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.831062970 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 3242001917 ps |
| CPU time | 33.33 seconds |
| Started | Sep 09 10:09:45 AM UTC 24 |
| Finished | Sep 09 10:10:19 AM UTC 24 |
| Peak memory | 229692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=831062970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.831062970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.3802951395 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 2559995350 ps |
| CPU time | 23.57 seconds |
| Started | Sep 09 10:09:45 AM UTC 24 |
| Finished | Sep 09 10:10:09 AM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802951395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.3802951395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.4254628794 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 155328624 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:09:45 AM UTC 24 |
| Finished | Sep 09 10:09:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254628794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.4254628794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.2237742326 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 174418315 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:09:46 AM UTC 24 |
| Finished | Sep 09 10:09:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2237742326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.2237742326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.2543129065 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 176686578 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:09:46 AM UTC 24 |
| Finished | Sep 09 10:09:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2543129065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.2543129065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.1744772405 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 190598453 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:09:46 AM UTC 24 |
| Finished | Sep 09 10:09:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744772405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_out_iso.1744772405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.2635808832 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 169516493 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:09:47 AM UTC 24 |
| Finished | Sep 09 10:09:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635808832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.2635808832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.4115438157 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 171697879 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:09:48 AM UTC 24 |
| Finished | Sep 09 10:09:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4115438157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.4115438157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.599938179 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 150569769 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:09:49 AM UTC 24 |
| Finished | Sep 09 10:09:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=599938179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pending_in_trans.599938179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.3330570976 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 240675530 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:09:49 AM UTC 24 |
| Finished | Sep 09 10:09:51 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3330570976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.3330570976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.956705505 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 197560042 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:09:49 AM UTC 24 |
| Finished | Sep 09 10:09:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=956705505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.956705505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.3620240749 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 37291176 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:09:50 AM UTC 24 |
| Finished | Sep 09 10:09:52 AM UTC 24 |
| Peak memory | 214900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620240749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.3620240749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.2297074031 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 13828594636 ps |
| CPU time | 40.89 seconds |
| Started | Sep 09 10:09:50 AM UTC 24 |
| Finished | Sep 09 10:10:33 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297074031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.2297074031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.565683047 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 180713868 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:09:50 AM UTC 24 |
| Finished | Sep 09 10:09:53 AM UTC 24 |
| Peak memory | 214792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=565683047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_pkt_received.565683047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.1285564456 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 241120272 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:09:50 AM UTC 24 |
| Finished | Sep 09 10:09:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285564456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.1285564456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.2262672769 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 225238003 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:09:50 AM UTC 24 |
| Finished | Sep 09 10:09:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262672769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.2262672769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.1906826921 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 171308870 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:09:52 AM UTC 24 |
| Finished | Sep 09 10:09:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906826921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.1906826921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.4111165897 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 147341608 ps |
| CPU time | 0.92 seconds |
| Started | Sep 09 10:09:52 AM UTC 24 |
| Finished | Sep 09 10:09:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111165897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.4111165897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.2080349627 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 400703352 ps |
| CPU time | 2.46 seconds |
| Started | Sep 09 10:09:52 AM UTC 24 |
| Finished | Sep 09 10:09:56 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080349627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_rx_full.2080349627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.2046472593 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 149861551 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:09:52 AM UTC 24 |
| Finished | Sep 09 10:09:55 AM UTC 24 |
| Peak memory | 214828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2046472593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_setup_stage.2046472593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.2204819581 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 149336996 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:09:52 AM UTC 24 |
| Finished | Sep 09 10:09:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204819581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.2204819581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.3326933714 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 206028289 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:09:53 AM UTC 24 |
| Finished | Sep 09 10:09:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326933714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.3326933714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.2371277284 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 3636995328 ps |
| CPU time | 98.5 seconds |
| Started | Sep 09 10:09:53 AM UTC 24 |
| Finished | Sep 09 10:11:34 AM UTC 24 |
| Peak memory | 227632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2371277284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.2371277284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.308145358 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 179589906 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:09:53 AM UTC 24 |
| Finished | Sep 09 10:09:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=308145358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.308145358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.1410454982 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 169459399 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:09:53 AM UTC 24 |
| Finished | Sep 09 10:09:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410454982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.1410454982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.1744646623 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 1162677996 ps |
| CPU time | 2.76 seconds |
| Started | Sep 09 10:09:56 AM UTC 24 |
| Finished | Sep 09 10:10:00 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744646623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.1744646623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.305266856 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 2741923113 ps |
| CPU time | 25.09 seconds |
| Started | Sep 09 10:09:54 AM UTC 24 |
| Finished | Sep 09 10:10:21 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=305266856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_streaming_out.305266856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.784701323 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 1664704541 ps |
| CPU time | 18.86 seconds |
| Started | Sep 09 10:09:37 AM UTC 24 |
| Finished | Sep 09 10:09:57 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=784701323 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.784701323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.708009974 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 529434803 ps |
| CPU time | 2.86 seconds |
| Started | Sep 09 10:09:56 AM UTC 24 |
| Finished | Sep 09 10:10:00 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=708009974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_tx _rx_disruption.708009974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.432103181 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 528694714 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=432103181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_t x_rx_disruption.432103181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.3622761621 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 535759464 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3622761621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_ tx_rx_disruption.3622761621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.202379883 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 572867247 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=202379883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_t x_rx_disruption.202379883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.3906850505 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 496851039 ps |
| CPU time | 1.86 seconds |
| Started | Sep 09 10:19:22 AM UTC 24 |
| Finished | Sep 09 10:19:54 AM UTC 24 |
| Peak memory | 216476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3906850505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_ tx_rx_disruption.3906850505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.2439561662 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 536181883 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:19:23 AM UTC 24 |
| Finished | Sep 09 10:19:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2439561662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.2439561662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.1908750136 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 442214706 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:19:23 AM UTC 24 |
| Finished | Sep 09 10:19:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1908750136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_ tx_rx_disruption.1908750136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.1259157737 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 571475335 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:19:23 AM UTC 24 |
| Finished | Sep 09 10:19:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1259157737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.1259157737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.1996482485 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 495114611 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:19:23 AM UTC 24 |
| Finished | Sep 09 10:19:49 AM UTC 24 |
| Peak memory | 214852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1996482485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.1996482485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.76400352 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 490821526 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:19:23 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=76400352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_tx _rx_disruption.76400352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.1855746909 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 35781346 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:10:19 AM UTC 24 |
| Finished | Sep 09 10:10:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855746909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.1855746909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.4004144872 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 5560308436 ps |
| CPU time | 10.92 seconds |
| Started | Sep 09 10:09:56 AM UTC 24 |
| Finished | Sep 09 10:10:08 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004144872 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.4004144872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.4091232609 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 13684052002 ps |
| CPU time | 22.27 seconds |
| Started | Sep 09 10:09:57 AM UTC 24 |
| Finished | Sep 09 10:10:21 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4091232609 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.4091232609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.1843300169 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 23815941043 ps |
| CPU time | 34.72 seconds |
| Started | Sep 09 10:09:57 AM UTC 24 |
| Finished | Sep 09 10:10:34 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843300169 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.1843300169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.3516022880 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 142724331 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:09:57 AM UTC 24 |
| Finished | Sep 09 10:10:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516022880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.3516022880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.3489076326 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 165753244 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:09:57 AM UTC 24 |
| Finished | Sep 09 10:10:00 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489076326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.3489076326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.2779642504 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 380723395 ps |
| CPU time | 1.93 seconds |
| Started | Sep 09 10:09:57 AM UTC 24 |
| Finished | Sep 09 10:10:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779642504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 25.usbdev_data_toggle_clear.2779642504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.460692049 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 304113110 ps |
| CPU time | 1.87 seconds |
| Started | Sep 09 10:09:57 AM UTC 24 |
| Finished | Sep 09 10:10:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=460692049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.460692049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.909682737 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 16361168514 ps |
| CPU time | 32.64 seconds |
| Started | Sep 09 10:09:59 AM UTC 24 |
| Finished | Sep 09 10:10:33 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909682737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_device_address.909682737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.2396236263 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 4300235686 ps |
| CPU time | 29.86 seconds |
| Started | Sep 09 10:09:59 AM UTC 24 |
| Finished | Sep 09 10:10:30 AM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396236263 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.2396236263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.245014537 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 921933777 ps |
| CPU time | 3.85 seconds |
| Started | Sep 09 10:09:59 AM UTC 24 |
| Finished | Sep 09 10:10:04 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=245014537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_disable_endpoint.245014537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.3522709124 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 199543127 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:10:01 AM UTC 24 |
| Finished | Sep 09 10:10:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3522709124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_disconnected.3522709124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_enable.4284896005 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 36950636 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:10:01 AM UTC 24 |
| Finished | Sep 09 10:10:03 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284896005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_enable.4284896005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.2177073750 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 917897204 ps |
| CPU time | 4.1 seconds |
| Started | Sep 09 10:10:01 AM UTC 24 |
| Finished | Sep 09 10:10:06 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2177073750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.2177073750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.394138041 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 554140763 ps |
| CPU time | 3.05 seconds |
| Started | Sep 09 10:10:01 AM UTC 24 |
| Finished | Sep 09 10:10:05 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=394138041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.394138041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.2454100275 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 149722241 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:10:01 AM UTC 24 |
| Finished | Sep 09 10:10:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2454100275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_fifo_levels.2454100275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.1474426298 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 162637343 ps |
| CPU time | 2.1 seconds |
| Started | Sep 09 10:10:01 AM UTC 24 |
| Finished | Sep 09 10:10:04 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474426298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_fifo_rst.1474426298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.910224843 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 200073315 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:10:02 AM UTC 24 |
| Finished | Sep 09 10:10:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=910224843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.910224843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.3275977870 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 151945886 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:10:02 AM UTC 24 |
| Finished | Sep 09 10:10:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275977870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.3275977870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.2378537271 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 229076066 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:10:03 AM UTC 24 |
| Finished | Sep 09 10:10:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378537271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.2378537271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.532113297 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 2962647281 ps |
| CPU time | 28.68 seconds |
| Started | Sep 09 10:10:02 AM UTC 24 |
| Finished | Sep 09 10:10:32 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=532113297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.532113297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.65956029 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 4240957024 ps |
| CPU time | 47.11 seconds |
| Started | Sep 09 10:10:05 AM UTC 24 |
| Finished | Sep 09 10:10:54 AM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=65956029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.65956029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.1619267952 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 242200133 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:10:05 AM UTC 24 |
| Finished | Sep 09 10:10:07 AM UTC 24 |
| Peak memory | 214736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619267952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.1619267952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.3532776741 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 28603592797 ps |
| CPU time | 59.45 seconds |
| Started | Sep 09 10:10:05 AM UTC 24 |
| Finished | Sep 09 10:11:06 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532776741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.3532776741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.3760740653 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 3378318598 ps |
| CPU time | 5.8 seconds |
| Started | Sep 09 10:10:05 AM UTC 24 |
| Finished | Sep 09 10:10:12 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760740653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.3760740653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.3357185809 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 2407204835 ps |
| CPU time | 22.06 seconds |
| Started | Sep 09 10:10:05 AM UTC 24 |
| Finished | Sep 09 10:10:28 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357185809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.3357185809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.1670469753 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 3366596882 ps |
| CPU time | 29.32 seconds |
| Started | Sep 09 10:10:05 AM UTC 24 |
| Finished | Sep 09 10:10:36 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670469753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.1670469753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.3388803423 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 259586160 ps |
| CPU time | 1.86 seconds |
| Started | Sep 09 10:10:06 AM UTC 24 |
| Finished | Sep 09 10:10:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3388803423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.3388803423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.2532227960 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 198921128 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:10:06 AM UTC 24 |
| Finished | Sep 09 10:10:09 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2532227960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.2532227960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.1006183196 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 2433641860 ps |
| CPU time | 64.4 seconds |
| Started | Sep 09 10:10:06 AM UTC 24 |
| Finished | Sep 09 10:11:13 AM UTC 24 |
| Peak memory | 227620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1006183196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.1006183196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.1724705988 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 168375811 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:10:08 AM UTC 24 |
| Finished | Sep 09 10:10:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724705988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.1724705988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.2606472896 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 182612860 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:10:08 AM UTC 24 |
| Finished | Sep 09 10:10:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2606472896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.2606472896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.2707516199 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 220597269 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:10:08 AM UTC 24 |
| Finished | Sep 09 10:10:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2707516199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.2707516199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.965495670 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 157783250 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:10:09 AM UTC 24 |
| Finished | Sep 09 10:10:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=965495670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_out_iso.965495670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.2278220283 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 210694898 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:10:10 AM UTC 24 |
| Finished | Sep 09 10:10:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278220283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_out_stall.2278220283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.1332647039 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 234505729 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:10:11 AM UTC 24 |
| Finished | Sep 09 10:10:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332647039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.1332647039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.924685596 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 153529271 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:10:11 AM UTC 24 |
| Finished | Sep 09 10:10:14 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924685596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pending_in_trans.924685596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.3420132188 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 247239299 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:10:11 AM UTC 24 |
| Finished | Sep 09 10:10:14 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420132188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.3420132188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.2164435512 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 162476637 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:10:12 AM UTC 24 |
| Finished | Sep 09 10:10:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164435512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.2164435512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.3593197483 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 63963631 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:10:12 AM UTC 24 |
| Finished | Sep 09 10:10:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593197483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.3593197483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.2235026640 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 12451154553 ps |
| CPU time | 38.19 seconds |
| Started | Sep 09 10:10:12 AM UTC 24 |
| Finished | Sep 09 10:10:52 AM UTC 24 |
| Peak memory | 227584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235026640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_pkt_buffer.2235026640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.2758452955 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 241918183 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:10:13 AM UTC 24 |
| Finished | Sep 09 10:10:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758452955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.2758452955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.3249066454 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 204672213 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:10:14 AM UTC 24 |
| Finished | Sep 09 10:10:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249066454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.3249066454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.1273673220 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 249161801 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:10:14 AM UTC 24 |
| Finished | Sep 09 10:10:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1273673220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.1273673220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.4021186437 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 202341140 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:10:14 AM UTC 24 |
| Finished | Sep 09 10:10:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021186437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.4021186437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.3875243505 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 158441943 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:10:14 AM UTC 24 |
| Finished | Sep 09 10:10:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3875243505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.3875243505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.1009018410 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 314068531 ps |
| CPU time | 2.03 seconds |
| Started | Sep 09 10:10:14 AM UTC 24 |
| Finished | Sep 09 10:10:18 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009018410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.1009018410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.4218387105 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 183743578 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:10:14 AM UTC 24 |
| Finished | Sep 09 10:10:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4218387105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.4218387105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.3260896679 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 232345990 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:10:16 AM UTC 24 |
| Finished | Sep 09 10:10:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3260896679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 25.usbdev_setup_trans_ignored.3260896679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.1807241161 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 221312558 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:10:16 AM UTC 24 |
| Finished | Sep 09 10:10:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807241161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.1807241161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.876994087 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 3137965161 ps |
| CPU time | 82.91 seconds |
| Started | Sep 09 10:10:16 AM UTC 24 |
| Finished | Sep 09 10:11:40 AM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=876994087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.876994087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.1711820635 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 182978824 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:10:16 AM UTC 24 |
| Finished | Sep 09 10:10:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711820635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.1711820635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.2897024170 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 179684076 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:10:16 AM UTC 24 |
| Finished | Sep 09 10:10:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2897024170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.2897024170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.3356640926 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 1303079858 ps |
| CPU time | 3.67 seconds |
| Started | Sep 09 10:10:17 AM UTC 24 |
| Finished | Sep 09 10:10:22 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356640926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.3356640926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.886014389 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 1717431027 ps |
| CPU time | 44.33 seconds |
| Started | Sep 09 10:10:17 AM UTC 24 |
| Finished | Sep 09 10:11:03 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=886014389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_streaming_out.886014389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.2572316461 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 1569273071 ps |
| CPU time | 12.73 seconds |
| Started | Sep 09 10:09:59 AM UTC 24 |
| Finished | Sep 09 10:10:13 AM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572316461 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.2572316461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.1810744008 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 424343664 ps |
| CPU time | 1.99 seconds |
| Started | Sep 09 10:10:17 AM UTC 24 |
| Finished | Sep 09 10:10:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1810744008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.1810744008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.3929055868 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 518012929 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:19:23 AM UTC 24 |
| Finished | Sep 09 10:19:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3929055868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_ tx_rx_disruption.3929055868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.2252837703 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 424646086 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:19:23 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2252837703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.2252837703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.2741369094 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 474856913 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:19:23 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2741369094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_ tx_rx_disruption.2741369094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.701785161 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 597989109 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=701785161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_t x_rx_disruption.701785161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.1933297978 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 510733669 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1933297978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_ tx_rx_disruption.1933297978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.2704961321 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 649394538 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2704961321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.2704961321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.830686270 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 670873027 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 214816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=830686270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_t x_rx_disruption.830686270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.2190247624 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 473110111 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 214816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2190247624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_ tx_rx_disruption.2190247624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.3491684474 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 594597611 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3491684474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_ tx_rx_disruption.3491684474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.398606928 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 577899523 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=398606928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_t x_rx_disruption.398606928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.2349241987 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 107789010 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:10:39 AM UTC 24 |
| Finished | Sep 09 10:10:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349241987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.2349241987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.2360634411 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 9216236599 ps |
| CPU time | 19.57 seconds |
| Started | Sep 09 10:10:19 AM UTC 24 |
| Finished | Sep 09 10:10:40 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360634411 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.2360634411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.1253942580 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 16038427973 ps |
| CPU time | 21.68 seconds |
| Started | Sep 09 10:10:19 AM UTC 24 |
| Finished | Sep 09 10:10:42 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253942580 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.1253942580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.923452894 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 30876750412 ps |
| CPU time | 57.87 seconds |
| Started | Sep 09 10:10:19 AM UTC 24 |
| Finished | Sep 09 10:11:18 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=923452894 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.923452894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.3562138607 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 234381410 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:10:19 AM UTC 24 |
| Finished | Sep 09 10:10:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562138607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.3562138607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.2458688450 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 144751516 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:10:19 AM UTC 24 |
| Finished | Sep 09 10:10:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2458688450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.2458688450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.2541487817 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 460053681 ps |
| CPU time | 2.43 seconds |
| Started | Sep 09 10:10:19 AM UTC 24 |
| Finished | Sep 09 10:10:23 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541487817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 26.usbdev_data_toggle_clear.2541487817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.3385015267 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 1137716258 ps |
| CPU time | 4.1 seconds |
| Started | Sep 09 10:10:21 AM UTC 24 |
| Finished | Sep 09 10:10:26 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385015267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.3385015267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.2298952031 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 25966912493 ps |
| CPU time | 53.82 seconds |
| Started | Sep 09 10:10:21 AM UTC 24 |
| Finished | Sep 09 10:11:17 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2298952031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.2298952031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.3312079207 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 668254039 ps |
| CPU time | 5.96 seconds |
| Started | Sep 09 10:10:21 AM UTC 24 |
| Finished | Sep 09 10:10:28 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312079207 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.3312079207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.2398957110 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 763605354 ps |
| CPU time | 2.97 seconds |
| Started | Sep 09 10:10:21 AM UTC 24 |
| Finished | Sep 09 10:10:25 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398957110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.2398957110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.172767957 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 149259600 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:10:21 AM UTC 24 |
| Finished | Sep 09 10:10:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172767957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_disconnected.172767957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_enable.3802439325 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 43367519 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:10:22 AM UTC 24 |
| Finished | Sep 09 10:10:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802439325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.3802439325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.2735909723 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 1129730866 ps |
| CPU time | 3.9 seconds |
| Started | Sep 09 10:10:23 AM UTC 24 |
| Finished | Sep 09 10:10:28 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735909723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.2735909723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.2450982497 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 229587889 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:10:23 AM UTC 24 |
| Finished | Sep 09 10:10:26 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450982497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.2450982497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.4162431164 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 177209523 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:10:23 AM UTC 24 |
| Finished | Sep 09 10:10:26 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162431164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_fifo_levels.4162431164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.351271808 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 555065978 ps |
| CPU time | 3.4 seconds |
| Started | Sep 09 10:10:23 AM UTC 24 |
| Finished | Sep 09 10:10:28 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=351271808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_fifo_rst.351271808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.992826370 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 211502842 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:10:23 AM UTC 24 |
| Finished | Sep 09 10:10:26 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=992826370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.992826370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.4041190440 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 144523978 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:10:25 AM UTC 24 |
| Finished | Sep 09 10:10:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4041190440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.4041190440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.2548373780 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 206047909 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:10:25 AM UTC 24 |
| Finished | Sep 09 10:10:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548373780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.2548373780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.396566685 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 5115409505 ps |
| CPU time | 42.34 seconds |
| Started | Sep 09 10:10:23 AM UTC 24 |
| Finished | Sep 09 10:11:07 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396566685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.396566685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.1312834347 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 12831376793 ps |
| CPU time | 99.36 seconds |
| Started | Sep 09 10:10:25 AM UTC 24 |
| Finished | Sep 09 10:12:06 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312834347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.1312834347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.1613543246 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 226606410 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:10:27 AM UTC 24 |
| Finished | Sep 09 10:10:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613543246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.1613543246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.3729866241 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 32790132858 ps |
| CPU time | 59.52 seconds |
| Started | Sep 09 10:10:27 AM UTC 24 |
| Finished | Sep 09 10:11:29 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729866241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.3729866241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.1098436705 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 4471298342 ps |
| CPU time | 7.36 seconds |
| Started | Sep 09 10:10:27 AM UTC 24 |
| Finished | Sep 09 10:10:36 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098436705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_link_suspend.1098436705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.3703293772 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 4683427501 ps |
| CPU time | 44.95 seconds |
| Started | Sep 09 10:10:27 AM UTC 24 |
| Finished | Sep 09 10:11:14 AM UTC 24 |
| Peak memory | 229424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703293772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.3703293772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.2430419766 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 3777264566 ps |
| CPU time | 106.62 seconds |
| Started | Sep 09 10:10:27 AM UTC 24 |
| Finished | Sep 09 10:12:16 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2430419766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.2430419766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.1353805834 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 257455126 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:10:29 AM UTC 24 |
| Finished | Sep 09 10:10:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353805834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.1353805834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.2469674408 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 186106734 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:10:29 AM UTC 24 |
| Finished | Sep 09 10:10:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469674408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.2469674408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.1455938539 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 2896895960 ps |
| CPU time | 78.32 seconds |
| Started | Sep 09 10:10:29 AM UTC 24 |
| Finished | Sep 09 10:11:49 AM UTC 24 |
| Peak memory | 234288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455938539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.1455938539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.1086433518 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 173229473 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:10:29 AM UTC 24 |
| Finished | Sep 09 10:10:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086433518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.1086433518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.443848066 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 141315547 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:10:30 AM UTC 24 |
| Finished | Sep 09 10:10:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=443848066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.443848066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.1535493108 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 170932906 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:10:30 AM UTC 24 |
| Finished | Sep 09 10:10:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535493108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.1535493108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.2798499613 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 209352763 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:10:31 AM UTC 24 |
| Finished | Sep 09 10:10:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2798499613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.2798499613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.2640884937 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 237780428 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:10:32 AM UTC 24 |
| Finished | Sep 09 10:10:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640884937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_out_stall.2640884937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.2898314905 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 176933769 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:10:32 AM UTC 24 |
| Finished | Sep 09 10:10:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898314905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.2898314905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.2991313856 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 153531417 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:10:32 AM UTC 24 |
| Finished | Sep 09 10:10:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2991313856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_pending_in_trans.2991313856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.1654351153 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 264397910 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:10:32 AM UTC 24 |
| Finished | Sep 09 10:10:34 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654351153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.1654351153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.1739705690 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 145236291 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:10:33 AM UTC 24 |
| Finished | Sep 09 10:10:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1739705690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.1739705690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.3896069555 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 36750958 ps |
| CPU time | 0.88 seconds |
| Started | Sep 09 10:10:33 AM UTC 24 |
| Finished | Sep 09 10:10:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3896069555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.3896069555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.2040745307 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 17192383427 ps |
| CPU time | 46.21 seconds |
| Started | Sep 09 10:10:33 AM UTC 24 |
| Finished | Sep 09 10:11:21 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040745307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.2040745307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.1004007068 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 169802534 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:10:33 AM UTC 24 |
| Finished | Sep 09 10:10:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004007068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.1004007068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.1610061274 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 253526268 ps |
| CPU time | 1.84 seconds |
| Started | Sep 09 10:10:35 AM UTC 24 |
| Finished | Sep 09 10:10:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1610061274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.1610061274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.889339523 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 177833139 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:10:35 AM UTC 24 |
| Finished | Sep 09 10:10:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889339523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_random_length_in_transaction.889339523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.2582107943 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 191471672 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:10:35 AM UTC 24 |
| Finished | Sep 09 10:10:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582107943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.2582107943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.3395768880 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 228989056 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:10:36 AM UTC 24 |
| Finished | Sep 09 10:10:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395768880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.3395768880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.1278898383 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 401767389 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:10:36 AM UTC 24 |
| Finished | Sep 09 10:10:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1278898383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.1278898383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.503250568 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 145450503 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:10:36 AM UTC 24 |
| Finished | Sep 09 10:10:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=503250568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_setup_stage.503250568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.4138372323 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 193595686 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:10:36 AM UTC 24 |
| Finished | Sep 09 10:10:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138372323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.4138372323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.3347681770 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 202962854 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:10:36 AM UTC 24 |
| Finished | Sep 09 10:10:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347681770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.3347681770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.2058290727 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 2265702218 ps |
| CPU time | 17.04 seconds |
| Started | Sep 09 10:10:36 AM UTC 24 |
| Finished | Sep 09 10:10:54 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058290727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.2058290727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.3936804165 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 163192958 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:10:37 AM UTC 24 |
| Finished | Sep 09 10:10:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936804165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.3936804165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.135722471 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 177456087 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:10:37 AM UTC 24 |
| Finished | Sep 09 10:10:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135722471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_stall_trans.135722471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.2746720496 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 1159389852 ps |
| CPU time | 4.99 seconds |
| Started | Sep 09 10:10:37 AM UTC 24 |
| Finished | Sep 09 10:10:43 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746720496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.2746720496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.3332691764 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 2862065721 ps |
| CPU time | 22.41 seconds |
| Started | Sep 09 10:10:37 AM UTC 24 |
| Finished | Sep 09 10:11:01 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332691764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.3332691764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.4265626910 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 481660977 ps |
| CPU time | 7.92 seconds |
| Started | Sep 09 10:10:21 AM UTC 24 |
| Finished | Sep 09 10:10:30 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4265626910 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.4265626910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.404342022 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 605209886 ps |
| CPU time | 3.17 seconds |
| Started | Sep 09 10:10:37 AM UTC 24 |
| Finished | Sep 09 10:10:42 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=404342022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_tx _rx_disruption.404342022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.739717828 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 577536871 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=739717828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_t x_rx_disruption.739717828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.1649983425 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 539100493 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1649983425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.1649983425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.1778856545 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 596539033 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1778856545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.1778856545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.2966799384 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 615892334 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2966799384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_ tx_rx_disruption.2966799384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.3443273383 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 488334209 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3443273383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_ tx_rx_disruption.3443273383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.182145683 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 409496079 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=182145683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_t x_rx_disruption.182145683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.219827481 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 636420195 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:19:26 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=219827481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_t x_rx_disruption.219827481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.2842343315 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 556044968 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:19:27 AM UTC 24 |
| Finished | Sep 09 10:19:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2842343315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.2842343315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.2627654736 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 506700141 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:19:27 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2627654736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_ tx_rx_disruption.2627654736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.3152569348 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 519278517 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:19:27 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3152569348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.3152569348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.3048918936 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 51263688 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:11:00 AM UTC 24 |
| Finished | Sep 09 10:11:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3048918936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.3048918936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.2924557125 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 4311493405 ps |
| CPU time | 11.9 seconds |
| Started | Sep 09 10:10:39 AM UTC 24 |
| Finished | Sep 09 10:10:52 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2924557125 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.2924557125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.1723527648 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 18922361437 ps |
| CPU time | 31.3 seconds |
| Started | Sep 09 10:10:39 AM UTC 24 |
| Finished | Sep 09 10:11:12 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723527648 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.1723527648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.1512719810 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 25299558666 ps |
| CPU time | 37.38 seconds |
| Started | Sep 09 10:10:39 AM UTC 24 |
| Finished | Sep 09 10:11:18 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1512719810 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.1512719810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.1474135549 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 151107798 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:10:39 AM UTC 24 |
| Finished | Sep 09 10:10:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474135549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.1474135549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.1179960456 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 148317805 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:10:40 AM UTC 24 |
| Finished | Sep 09 10:10:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179960456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_bitstuff_err.1179960456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.3581551606 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 256775164 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:10:40 AM UTC 24 |
| Finished | Sep 09 10:10:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581551606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.3581551606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.1411717690 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 1094971200 ps |
| CPU time | 3.05 seconds |
| Started | Sep 09 10:10:40 AM UTC 24 |
| Finished | Sep 09 10:10:44 AM UTC 24 |
| Peak memory | 216484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411717690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.1411717690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.3506409495 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 44956015222 ps |
| CPU time | 90.49 seconds |
| Started | Sep 09 10:10:40 AM UTC 24 |
| Finished | Sep 09 10:12:13 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506409495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_address.3506409495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.1676949021 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 2942386613 ps |
| CPU time | 25.27 seconds |
| Started | Sep 09 10:10:40 AM UTC 24 |
| Finished | Sep 09 10:11:07 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1676949021 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.1676949021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.832050453 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 681509042 ps |
| CPU time | 2.44 seconds |
| Started | Sep 09 10:10:42 AM UTC 24 |
| Finished | Sep 09 10:10:45 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832050453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_disable_endpoint.832050453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.2585615253 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 144098139 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:10:42 AM UTC 24 |
| Finished | Sep 09 10:10:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585615253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.2585615253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_enable.768470135 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 55119050 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:10:43 AM UTC 24 |
| Finished | Sep 09 10:10:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=768470135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_enable.768470135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.3638379738 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 921560692 ps |
| CPU time | 4.63 seconds |
| Started | Sep 09 10:10:43 AM UTC 24 |
| Finished | Sep 09 10:10:49 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3638379738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.3638379738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.2675335944 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 512813098 ps |
| CPU time | 2.07 seconds |
| Started | Sep 09 10:10:43 AM UTC 24 |
| Finished | Sep 09 10:10:46 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2675335944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.2675335944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.1362932650 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 276374476 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:10:43 AM UTC 24 |
| Finished | Sep 09 10:10:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1362932650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_fifo_levels.1362932650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.1027069569 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 556411761 ps |
| CPU time | 5.15 seconds |
| Started | Sep 09 10:10:44 AM UTC 24 |
| Finished | Sep 09 10:10:50 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027069569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_fifo_rst.1027069569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.426872008 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 156823136 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:10:44 AM UTC 24 |
| Finished | Sep 09 10:10:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=426872008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.426872008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.3859820167 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 137192109 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:10:48 AM UTC 24 |
| Finished | Sep 09 10:10:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859820167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.3859820167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.4142780274 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 197481046 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:10:48 AM UTC 24 |
| Finished | Sep 09 10:10:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142780274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.4142780274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.502949115 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 4799710203 ps |
| CPU time | 49.94 seconds |
| Started | Sep 09 10:10:44 AM UTC 24 |
| Finished | Sep 09 10:11:36 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=502949115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.502949115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.81858227 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 12065003759 ps |
| CPU time | 146.04 seconds |
| Started | Sep 09 10:10:48 AM UTC 24 |
| Finished | Sep 09 10:13:16 AM UTC 24 |
| Peak memory | 220156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=81858227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.81858227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.1858638416 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 203663802 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:10:48 AM UTC 24 |
| Finished | Sep 09 10:10:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858638416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.1858638416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.638631563 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 7767216430 ps |
| CPU time | 11.59 seconds |
| Started | Sep 09 10:10:48 AM UTC 24 |
| Finished | Sep 09 10:11:01 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=638631563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_link_resume.638631563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.3893153727 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 4118492069 ps |
| CPU time | 8.95 seconds |
| Started | Sep 09 10:10:48 AM UTC 24 |
| Finished | Sep 09 10:10:58 AM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893153727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_link_suspend.3893153727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.1838731739 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 4496085843 ps |
| CPU time | 40.71 seconds |
| Started | Sep 09 10:10:48 AM UTC 24 |
| Finished | Sep 09 10:11:30 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838731739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.1838731739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.428156507 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 2708851702 ps |
| CPU time | 77.79 seconds |
| Started | Sep 09 10:10:48 AM UTC 24 |
| Finished | Sep 09 10:12:08 AM UTC 24 |
| Peak memory | 227756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=428156507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.428156507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.581547592 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 244991262 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:10:48 AM UTC 24 |
| Finished | Sep 09 10:10:51 AM UTC 24 |
| Peak memory | 214724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=581547592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.581547592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.528185555 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 221440087 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:10:48 AM UTC 24 |
| Finished | Sep 09 10:10:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528185555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.528185555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.4007504371 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 2534880856 ps |
| CPU time | 70.44 seconds |
| Started | Sep 09 10:10:49 AM UTC 24 |
| Finished | Sep 09 10:12:02 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4007504371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.4007504371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.4212891695 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 155652898 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:10:49 AM UTC 24 |
| Finished | Sep 09 10:10:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212891695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.4212891695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.3863267101 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 151406342 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:10:51 AM UTC 24 |
| Finished | Sep 09 10:10:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863267101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.3863267101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.3817599004 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 189393492 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:10:52 AM UTC 24 |
| Finished | Sep 09 10:10:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3817599004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.3817599004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.3907258656 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 182284487 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:10:52 AM UTC 24 |
| Finished | Sep 09 10:10:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907258656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.3907258656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.1901918616 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 230757219 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:10:52 AM UTC 24 |
| Finished | Sep 09 10:10:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901918616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_out_trans_nak.1901918616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.1174462835 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 185650039 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:10:52 AM UTC 24 |
| Finished | Sep 09 10:10:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174462835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.1174462835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.2969042263 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 168711591 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:10:52 AM UTC 24 |
| Finished | Sep 09 10:10:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2969042263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.2969042263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.2583722011 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 160980079 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:10:54 AM UTC 24 |
| Finished | Sep 09 10:10:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2583722011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.2583722011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.3480359879 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 37057820 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:10:54 AM UTC 24 |
| Finished | Sep 09 10:10:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480359879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.3480359879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.1253934538 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 7370134033 ps |
| CPU time | 20.11 seconds |
| Started | Sep 09 10:10:54 AM UTC 24 |
| Finished | Sep 09 10:11:16 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253934538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.1253934538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.671313772 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 193677245 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:10:54 AM UTC 24 |
| Finished | Sep 09 10:10:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=671313772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_pkt_received.671313772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.132508573 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 222393264 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:10:56 AM UTC 24 |
| Finished | Sep 09 10:10:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=132508573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_pkt_sent.132508573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.669249455 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 222425279 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:10:56 AM UTC 24 |
| Finished | Sep 09 10:10:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669249455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_random_length_in_transaction.669249455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.1132340305 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 180840751 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:10:56 AM UTC 24 |
| Finished | Sep 09 10:10:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132340305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.1132340305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.1560998342 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 147298025 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:10:56 AM UTC 24 |
| Finished | Sep 09 10:10:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1560998342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.1560998342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.1401127637 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 385435088 ps |
| CPU time | 2.27 seconds |
| Started | Sep 09 10:10:56 AM UTC 24 |
| Finished | Sep 09 10:10:59 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401127637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.1401127637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.3522443298 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 153038443 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:10:56 AM UTC 24 |
| Finished | Sep 09 10:10:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3522443298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_setup_stage.3522443298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.2900470931 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 169284016 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:10:56 AM UTC 24 |
| Finished | Sep 09 10:10:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2900470931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.2900470931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.2533813677 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 277987018 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:10:56 AM UTC 24 |
| Finished | Sep 09 10:10:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533813677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.2533813677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.533817811 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 2473714939 ps |
| CPU time | 68.39 seconds |
| Started | Sep 09 10:10:56 AM UTC 24 |
| Finished | Sep 09 10:12:07 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=533817811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.533817811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.1570452081 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 176257317 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:10:58 AM UTC 24 |
| Finished | Sep 09 10:11:00 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570452081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.1570452081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.1198320769 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 182879101 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:10:58 AM UTC 24 |
| Finished | Sep 09 10:11:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198320769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.1198320769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.3358487649 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 516758686 ps |
| CPU time | 2.84 seconds |
| Started | Sep 09 10:10:58 AM UTC 24 |
| Finished | Sep 09 10:11:02 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3358487649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.3358487649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.2847213144 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 2595581642 ps |
| CPU time | 70.96 seconds |
| Started | Sep 09 10:10:58 AM UTC 24 |
| Finished | Sep 09 10:12:11 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847213144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.2847213144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.4204822271 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 2530970769 ps |
| CPU time | 22.45 seconds |
| Started | Sep 09 10:10:40 AM UTC 24 |
| Finished | Sep 09 10:11:04 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204822271 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.4204822271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.176478701 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 451305801 ps |
| CPU time | 2.63 seconds |
| Started | Sep 09 10:11:00 AM UTC 24 |
| Finished | Sep 09 10:11:03 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=176478701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_tx _rx_disruption.176478701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.1228331946 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 604604194 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 214368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1228331946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.1228331946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.1056640969 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 598244588 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1056640969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.1056640969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.139270634 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 578728847 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=139270634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_t x_rx_disruption.139270634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.872848258 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 518311011 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=872848258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_t x_rx_disruption.872848258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.258193162 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 421356437 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=258193162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_t x_rx_disruption.258193162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.2796288711 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 469424685 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2796288711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.2796288711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.3146413725 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 615158537 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3146413725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_ tx_rx_disruption.3146413725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.235705196 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 460148750 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=235705196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_t x_rx_disruption.235705196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.1637852358 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 522843011 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1637852358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_ tx_rx_disruption.1637852358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.2797735446 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 625020067 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2797735446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_ tx_rx_disruption.2797735446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.1524264479 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 35518140 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 10:11:17 AM UTC 24 |
| Finished | Sep 09 10:11:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1524264479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.1524264479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.34859101 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 5993149756 ps |
| CPU time | 10.64 seconds |
| Started | Sep 09 10:11:00 AM UTC 24 |
| Finished | Sep 09 10:11:11 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=34859101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.34859101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.6709541 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 15482623202 ps |
| CPU time | 19.79 seconds |
| Started | Sep 09 10:11:00 AM UTC 24 |
| Finished | Sep 09 10:11:21 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=6709541 -assert nopostproc +UVM_TESTNAME=usbdev_base_tes t +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbde v-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.6709541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.4221139782 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 23977593896 ps |
| CPU time | 41.22 seconds |
| Started | Sep 09 10:11:00 AM UTC 24 |
| Finished | Sep 09 10:11:42 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221139782 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.4221139782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.3954899287 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 156540781 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:11:00 AM UTC 24 |
| Finished | Sep 09 10:11:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3954899287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_av_buffer.3954899287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.3658721161 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 178594467 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:11:00 AM UTC 24 |
| Finished | Sep 09 10:11:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658721161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.3658721161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.26937106 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 138948250 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:11:01 AM UTC 24 |
| Finished | Sep 09 10:11:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=26937106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_clear.26937106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.1629586686 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 967032434 ps |
| CPU time | 3.49 seconds |
| Started | Sep 09 10:11:01 AM UTC 24 |
| Finished | Sep 09 10:11:06 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629586686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.1629586686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.1348019845 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 17166477886 ps |
| CPU time | 34.65 seconds |
| Started | Sep 09 10:11:01 AM UTC 24 |
| Finished | Sep 09 10:11:37 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348019845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.1348019845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.778069715 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 673179399 ps |
| CPU time | 5.6 seconds |
| Started | Sep 09 10:11:03 AM UTC 24 |
| Finished | Sep 09 10:11:10 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=778069715 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.778069715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.1061790116 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 655389906 ps |
| CPU time | 3.13 seconds |
| Started | Sep 09 10:11:03 AM UTC 24 |
| Finished | Sep 09 10:11:07 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061790116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_disable_endpoint.1061790116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.1291546605 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 153352808 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:11:03 AM UTC 24 |
| Finished | Sep 09 10:11:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1291546605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.1291546605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_enable.3859157696 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 53284358 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:11:03 AM UTC 24 |
| Finished | Sep 09 10:11:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859157696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.3859157696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.2224532548 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 876533497 ps |
| CPU time | 3.13 seconds |
| Started | Sep 09 10:11:03 AM UTC 24 |
| Finished | Sep 09 10:11:07 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224532548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.2224532548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.1026716252 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 658995851 ps |
| CPU time | 1.88 seconds |
| Started | Sep 09 10:11:03 AM UTC 24 |
| Finished | Sep 09 10:11:06 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026716252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.1026716252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.3546822041 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 248426193 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 10:11:05 AM UTC 24 |
| Finished | Sep 09 10:11:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546822041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_fifo_levels.3546822041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.2937887217 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 281636309 ps |
| CPU time | 3.44 seconds |
| Started | Sep 09 10:11:05 AM UTC 24 |
| Finished | Sep 09 10:11:09 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937887217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.2937887217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.86845648 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 236481184 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:11:05 AM UTC 24 |
| Finished | Sep 09 10:11:07 AM UTC 24 |
| Peak memory | 227360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=86845648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.86845648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.3679525546 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 175308392 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:11:06 AM UTC 24 |
| Finished | Sep 09 10:11:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679525546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.3679525546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.3662246055 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 185302524 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:11:06 AM UTC 24 |
| Finished | Sep 09 10:11:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3662246055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.3662246055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.1828778204 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 4585887500 ps |
| CPU time | 126.2 seconds |
| Started | Sep 09 10:11:05 AM UTC 24 |
| Finished | Sep 09 10:13:13 AM UTC 24 |
| Peak memory | 227760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828778204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.1828778204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.534409217 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 9917182574 ps |
| CPU time | 69.39 seconds |
| Started | Sep 09 10:11:06 AM UTC 24 |
| Finished | Sep 09 10:12:18 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=534409217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.534409217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.2486177002 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 187745027 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:11:08 AM UTC 24 |
| Finished | Sep 09 10:11:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2486177002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.2486177002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.2421615912 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 23536421837 ps |
| CPU time | 57.33 seconds |
| Started | Sep 09 10:11:08 AM UTC 24 |
| Finished | Sep 09 10:12:07 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421615912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.2421615912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.1209103255 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 5926435737 ps |
| CPU time | 12.98 seconds |
| Started | Sep 09 10:11:08 AM UTC 24 |
| Finished | Sep 09 10:11:22 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209103255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.1209103255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.3259564964 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 5093190232 ps |
| CPU time | 38.23 seconds |
| Started | Sep 09 10:11:08 AM UTC 24 |
| Finished | Sep 09 10:11:48 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259564964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.3259564964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.1258485729 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 3818259660 ps |
| CPU time | 34.56 seconds |
| Started | Sep 09 10:11:08 AM UTC 24 |
| Finished | Sep 09 10:11:44 AM UTC 24 |
| Peak memory | 227620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258485729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.1258485729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.3458848007 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 245431304 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:11:08 AM UTC 24 |
| Finished | Sep 09 10:11:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3458848007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.3458848007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.2826430507 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 183111445 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:11:08 AM UTC 24 |
| Finished | Sep 09 10:11:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826430507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.2826430507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.768417194 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 1536623084 ps |
| CPU time | 41.89 seconds |
| Started | Sep 09 10:11:09 AM UTC 24 |
| Finished | Sep 09 10:11:52 AM UTC 24 |
| Peak memory | 227496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=768417194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.768417194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.222834356 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 191618183 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:11:09 AM UTC 24 |
| Finished | Sep 09 10:11:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=222834356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.222834356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.4133645882 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 153709884 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:11:10 AM UTC 24 |
| Finished | Sep 09 10:11:12 AM UTC 24 |
| Peak memory | 214812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133645882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.4133645882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.3179838760 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 199307098 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:11:10 AM UTC 24 |
| Finished | Sep 09 10:11:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3179838760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.3179838760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.4096001725 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 172275493 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:11:10 AM UTC 24 |
| Finished | Sep 09 10:11:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096001725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.4096001725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.2157211796 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 204225513 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:11:10 AM UTC 24 |
| Finished | Sep 09 10:11:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157211796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_out_stall.2157211796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.937035144 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 160032248 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:11:10 AM UTC 24 |
| Finished | Sep 09 10:11:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=937035144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_out_trans_nak.937035144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.3886514708 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 175802866 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:11:12 AM UTC 24 |
| Finished | Sep 09 10:11:14 AM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886514708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.3886514708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.3664399728 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 221932966 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:11:12 AM UTC 24 |
| Finished | Sep 09 10:11:14 AM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664399728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.3664399728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.3205576162 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 156889611 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:11:12 AM UTC 24 |
| Finished | Sep 09 10:11:14 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205576162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.3205576162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.2609862173 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 74194152 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:11:12 AM UTC 24 |
| Finished | Sep 09 10:11:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609862173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.2609862173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.1801880663 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 16078172963 ps |
| CPU time | 50.2 seconds |
| Started | Sep 09 10:11:13 AM UTC 24 |
| Finished | Sep 09 10:12:05 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801880663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_pkt_buffer.1801880663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.2494766533 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 177377369 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:11:13 AM UTC 24 |
| Finished | Sep 09 10:11:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494766533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_pkt_received.2494766533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.1483146892 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 169807675 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:11:13 AM UTC 24 |
| Finished | Sep 09 10:11:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1483146892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_pkt_sent.1483146892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.2518936084 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 237096298 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:11:13 AM UTC 24 |
| Finished | Sep 09 10:11:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518936084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.2518936084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.160014779 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 205468505 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:11:15 AM UTC 24 |
| Finished | Sep 09 10:11:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=160014779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.160014779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.856569824 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 199793182 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:11:15 AM UTC 24 |
| Finished | Sep 09 10:11:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=856569824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_rx_crc_err.856569824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.2789255653 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 369242774 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:11:15 AM UTC 24 |
| Finished | Sep 09 10:11:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789255653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_rx_full.2789255653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.3581801109 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 173190312 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:11:15 AM UTC 24 |
| Finished | Sep 09 10:11:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581801109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_setup_stage.3581801109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.1532814422 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 167852008 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:11:15 AM UTC 24 |
| Finished | Sep 09 10:11:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532814422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.1532814422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.2417156946 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 255979838 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:11:15 AM UTC 24 |
| Finished | Sep 09 10:11:18 AM UTC 24 |
| Peak memory | 214900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417156946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.2417156946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.2140630715 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 3572559019 ps |
| CPU time | 102.96 seconds |
| Started | Sep 09 10:11:15 AM UTC 24 |
| Finished | Sep 09 10:13:01 AM UTC 24 |
| Peak memory | 234072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140630715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.2140630715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.254526953 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 192069468 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:11:15 AM UTC 24 |
| Finished | Sep 09 10:11:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=254526953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.254526953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.2942560098 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 150006177 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:11:15 AM UTC 24 |
| Finished | Sep 09 10:11:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942560098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.2942560098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.2659588805 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 572392236 ps |
| CPU time | 2.02 seconds |
| Started | Sep 09 10:11:17 AM UTC 24 |
| Finished | Sep 09 10:11:20 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2659588805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.2659588805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.3810826317 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 2120646923 ps |
| CPU time | 15.47 seconds |
| Started | Sep 09 10:11:16 AM UTC 24 |
| Finished | Sep 09 10:11:32 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810826317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.3810826317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.2986758012 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 457113818 ps |
| CPU time | 9.19 seconds |
| Started | Sep 09 10:11:03 AM UTC 24 |
| Finished | Sep 09 10:11:13 AM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986758012 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.2986758012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.3288561263 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 533855612 ps |
| CPU time | 2.85 seconds |
| Started | Sep 09 10:11:17 AM UTC 24 |
| Finished | Sep 09 10:11:21 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3288561263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.3288561263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.851334721 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 433993566 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=851334721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_t x_rx_disruption.851334721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.3713422487 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 553722648 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:19:31 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3713422487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_ tx_rx_disruption.3713422487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.1225953788 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 508422352 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:19:32 AM UTC 24 |
| Finished | Sep 09 10:19:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1225953788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_ tx_rx_disruption.1225953788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.1814326500 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 451945449 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1814326500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_ tx_rx_disruption.1814326500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.1918229841 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 458747367 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1918229841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_ tx_rx_disruption.1918229841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.746918234 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 621886249 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=746918234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_t x_rx_disruption.746918234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.1644729650 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 503933711 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1644729650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_ tx_rx_disruption.1644729650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.387891015 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 568605983 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=387891015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_t x_rx_disruption.387891015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.1846223812 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 498518680 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1846223812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_ tx_rx_disruption.1846223812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.2132708208 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 663589267 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2132708208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.2132708208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.1389337200 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 32391805 ps |
| CPU time | 0.82 seconds |
| Started | Sep 09 10:11:39 AM UTC 24 |
| Finished | Sep 09 10:11:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389337200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.1389337200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.744930723 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 4776798748 ps |
| CPU time | 10.82 seconds |
| Started | Sep 09 10:11:17 AM UTC 24 |
| Finished | Sep 09 10:11:29 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=744930723 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.744930723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.2544757258 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 16064332028 ps |
| CPU time | 22.9 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:11:44 AM UTC 24 |
| Peak memory | 227584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2544757258 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.2544757258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.3278116071 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 25708380922 ps |
| CPU time | 44.9 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:12:06 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278116071 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.3278116071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.3045389076 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 172643683 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:11:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045389076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.3045389076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.2806040846 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 158624065 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:11:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2806040846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.2806040846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.3890254594 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 568961439 ps |
| CPU time | 2.27 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:11:24 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890254594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.3890254594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.2843020789 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 1055989737 ps |
| CPU time | 3.06 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:11:24 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843020789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.2843020789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.3413896264 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 38777632717 ps |
| CPU time | 72.75 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:12:35 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413896264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.3413896264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.746994005 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 902157259 ps |
| CPU time | 20.35 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:11:42 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=746994005 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.746994005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.3073615190 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 643352760 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:11:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3073615190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.3073615190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.3667915883 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 145440935 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:11:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3667915883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.3667915883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_enable.269674128 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 40156766 ps |
| CPU time | 0.89 seconds |
| Started | Sep 09 10:11:21 AM UTC 24 |
| Finished | Sep 09 10:11:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269674128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_enable.269674128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.1876572217 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 981180374 ps |
| CPU time | 3.36 seconds |
| Started | Sep 09 10:11:22 AM UTC 24 |
| Finished | Sep 09 10:11:27 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1876572217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.1876572217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.3579842121 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 465563080 ps |
| CPU time | 2.04 seconds |
| Started | Sep 09 10:11:22 AM UTC 24 |
| Finished | Sep 09 10:11:25 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579842121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.3579842121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.1953360770 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 247886081 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:11:22 AM UTC 24 |
| Finished | Sep 09 10:11:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953360770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_fifo_levels.1953360770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.2106129294 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 293687524 ps |
| CPU time | 2.98 seconds |
| Started | Sep 09 10:11:23 AM UTC 24 |
| Finished | Sep 09 10:11:27 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106129294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.2106129294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.1666564208 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 239620083 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:11:24 AM UTC 24 |
| Finished | Sep 09 10:11:26 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666564208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.1666564208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.1312567861 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 137032608 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:11:24 AM UTC 24 |
| Finished | Sep 09 10:11:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312567861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.1312567861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.2832268431 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 257836293 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:11:24 AM UTC 24 |
| Finished | Sep 09 10:11:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2832268431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.2832268431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.2344834582 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 5174348369 ps |
| CPU time | 46.75 seconds |
| Started | Sep 09 10:11:23 AM UTC 24 |
| Finished | Sep 09 10:12:11 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344834582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.2344834582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.2941266286 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 7486353804 ps |
| CPU time | 67.37 seconds |
| Started | Sep 09 10:11:24 AM UTC 24 |
| Finished | Sep 09 10:12:33 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941266286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.2941266286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.2204504985 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 187814738 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:11:24 AM UTC 24 |
| Finished | Sep 09 10:11:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204504985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.2204504985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.1146148828 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 28986415139 ps |
| CPU time | 43.73 seconds |
| Started | Sep 09 10:11:24 AM UTC 24 |
| Finished | Sep 09 10:12:10 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146148828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.1146148828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.1928476784 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 5435689193 ps |
| CPU time | 9.2 seconds |
| Started | Sep 09 10:11:25 AM UTC 24 |
| Finished | Sep 09 10:11:36 AM UTC 24 |
| Peak memory | 227564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928476784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_link_suspend.1928476784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.1931050606 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 3685847401 ps |
| CPU time | 97.62 seconds |
| Started | Sep 09 10:11:26 AM UTC 24 |
| Finished | Sep 09 10:13:06 AM UTC 24 |
| Peak memory | 234272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931050606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.1931050606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.3393136796 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 4040841590 ps |
| CPU time | 105.03 seconds |
| Started | Sep 09 10:11:26 AM UTC 24 |
| Finished | Sep 09 10:13:13 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393136796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.3393136796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.4228147150 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 234728155 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:11:27 AM UTC 24 |
| Finished | Sep 09 10:11:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4228147150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.4228147150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.3621229957 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 198625276 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:11:28 AM UTC 24 |
| Finished | Sep 09 10:11:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621229957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.3621229957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.159826865 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 2489035422 ps |
| CPU time | 70.04 seconds |
| Started | Sep 09 10:11:28 AM UTC 24 |
| Finished | Sep 09 10:12:40 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=159826865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.159826865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.2768586512 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 212840600 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:11:28 AM UTC 24 |
| Finished | Sep 09 10:11:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768586512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.2768586512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.2616286942 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 142379542 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:11:28 AM UTC 24 |
| Finished | Sep 09 10:11:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2616286942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.2616286942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.1635116851 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 226801556 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:11:28 AM UTC 24 |
| Finished | Sep 09 10:11:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1635116851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_nak_trans.1635116851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.1340995093 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 146767068 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:11:28 AM UTC 24 |
| Finished | Sep 09 10:11:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340995093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.1340995093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.872287275 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 167464530 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:11:30 AM UTC 24 |
| Finished | Sep 09 10:11:32 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=872287275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_out_stall.872287275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.3979866877 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 159520072 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:11:31 AM UTC 24 |
| Finished | Sep 09 10:11:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979866877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.3979866877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.3259773838 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 192251226 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:11:31 AM UTC 24 |
| Finished | Sep 09 10:11:34 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259773838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.3259773838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.1410772185 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 228004640 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:11:31 AM UTC 24 |
| Finished | Sep 09 10:11:34 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410772185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.1410772185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.2364311503 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 159264048 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:11:32 AM UTC 24 |
| Finished | Sep 09 10:11:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2364311503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.2364311503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.1719797560 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 43431231 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:11:32 AM UTC 24 |
| Finished | Sep 09 10:11:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719797560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.1719797560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.1588702326 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 15645054214 ps |
| CPU time | 51.62 seconds |
| Started | Sep 09 10:11:32 AM UTC 24 |
| Finished | Sep 09 10:12:26 AM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588702326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_pkt_buffer.1588702326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.2217285041 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 189964641 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:11:33 AM UTC 24 |
| Finished | Sep 09 10:11:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217285041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_pkt_received.2217285041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.292885772 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 220196306 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:11:33 AM UTC 24 |
| Finished | Sep 09 10:11:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=292885772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_pkt_sent.292885772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.1392048136 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 214497404 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:11:34 AM UTC 24 |
| Finished | Sep 09 10:11:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1392048136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_random_length_in_transaction.1392048136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.254775704 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 171871580 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:11:34 AM UTC 24 |
| Finished | Sep 09 10:11:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=254775704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.254775704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.2929526644 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 151533541 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:11:35 AM UTC 24 |
| Finished | Sep 09 10:11:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2929526644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.2929526644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.3221140038 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 249432860 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:11:35 AM UTC 24 |
| Finished | Sep 09 10:11:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3221140038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.3221140038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.106117557 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 153807375 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:11:35 AM UTC 24 |
| Finished | Sep 09 10:11:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=106117557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_setup_stage.106117557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.3343276293 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 180451712 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:11:35 AM UTC 24 |
| Finished | Sep 09 10:11:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343276293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.3343276293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.1796602556 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 192199589 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:11:36 AM UTC 24 |
| Finished | Sep 09 10:11:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796602556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.1796602556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.2256302883 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 2051914017 ps |
| CPU time | 17.54 seconds |
| Started | Sep 09 10:11:36 AM UTC 24 |
| Finished | Sep 09 10:11:54 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256302883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.2256302883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.3463584081 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 156416345 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:11:37 AM UTC 24 |
| Finished | Sep 09 10:11:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463584081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.3463584081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.3106587012 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 181060640 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:11:37 AM UTC 24 |
| Finished | Sep 09 10:11:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106587012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_stall_trans.3106587012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.2510110986 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 1033005167 ps |
| CPU time | 4.66 seconds |
| Started | Sep 09 10:11:37 AM UTC 24 |
| Finished | Sep 09 10:11:44 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2510110986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.2510110986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.3468291418 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 3842103362 ps |
| CPU time | 105.08 seconds |
| Started | Sep 09 10:11:37 AM UTC 24 |
| Finished | Sep 09 10:13:24 AM UTC 24 |
| Peak memory | 227700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468291418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.3468291418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.110184776 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 3923902990 ps |
| CPU time | 37.65 seconds |
| Started | Sep 09 10:11:20 AM UTC 24 |
| Finished | Sep 09 10:12:00 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=110184776 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.110184776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.4183069684 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 404972653 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:11:37 AM UTC 24 |
| Finished | Sep 09 10:11:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4183069684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.4183069684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.3490220843 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 478284877 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3490220843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_ tx_rx_disruption.3490220843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.1782562414 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 573167892 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1782562414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.1782562414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.3348720166 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 488519275 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3348720166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.3348720166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.3572766316 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 638871398 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3572766316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.3572766316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.3606189464 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 631165332 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:36 AM UTC 24 |
| Finished | Sep 09 10:19:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3606189464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_ tx_rx_disruption.3606189464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.2974927603 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 484557993 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:19:38 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2974927603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_ tx_rx_disruption.2974927603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.1188961193 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 604958595 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:19:38 AM UTC 24 |
| Finished | Sep 09 10:19:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1188961193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_ tx_rx_disruption.1188961193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.822010691 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 689942353 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:19:38 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=822010691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_t x_rx_disruption.822010691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.2891353287 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 421633464 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:19:38 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2891353287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_ tx_rx_disruption.2891353287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.1128901329 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 490452065 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:19:38 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1128901329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_ tx_rx_disruption.1128901329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.1947818278 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 46728527 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 09:59:03 AM UTC 24 |
| Finished | Sep 09 09:59:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947818278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.1947818278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.3191154025 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 30610076168 ps |
| CPU time | 73.66 seconds |
| Started | Sep 09 09:57:52 AM UTC 24 |
| Finished | Sep 09 09:59:07 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3191154025 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.3191154025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.3292555010 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 155551712 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 09:57:52 AM UTC 24 |
| Finished | Sep 09 09:57:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292555010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.3292555010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.725920212 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 150054232 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 09:57:55 AM UTC 24 |
| Finished | Sep 09 09:57:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=725920212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_bitstuff_err.725920212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.3120148093 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 178303855 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 09:57:57 AM UTC 24 |
| Finished | Sep 09 09:57:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3120148093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_data_toggle_clear.3120148093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.3029847264 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 1013806951 ps |
| CPU time | 4.45 seconds |
| Started | Sep 09 09:57:57 AM UTC 24 |
| Finished | Sep 09 09:58:02 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029847264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.3029847264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.1699078902 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 3889061370 ps |
| CPU time | 38.55 seconds |
| Started | Sep 09 09:58:00 AM UTC 24 |
| Finished | Sep 09 09:58:40 AM UTC 24 |
| Peak memory | 217516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699078902 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.1699078902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.159283038 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 632921732 ps |
| CPU time | 3.23 seconds |
| Started | Sep 09 09:58:04 AM UTC 24 |
| Finished | Sep 09 09:58:08 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159283038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_disable_endpoint.159283038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.1789493027 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 147849980 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 09:58:06 AM UTC 24 |
| Finished | Sep 09 09:58:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1789493027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.1789493027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_enable.746571725 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 46439639 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 09:58:09 AM UTC 24 |
| Finished | Sep 09 09:58:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=746571725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_enable.746571725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.3071656763 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 716209825 ps |
| CPU time | 3.34 seconds |
| Started | Sep 09 09:58:10 AM UTC 24 |
| Finished | Sep 09 09:58:14 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071656763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.3071656763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.3856867941 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 312697050 ps |
| CPU time | 2.09 seconds |
| Started | Sep 09 09:58:13 AM UTC 24 |
| Finished | Sep 09 09:58:16 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856867941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.3856867941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.1317909318 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 170324200 ps |
| CPU time | 2.89 seconds |
| Started | Sep 09 09:58:14 AM UTC 24 |
| Finished | Sep 09 09:58:18 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1317909318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_fifo_rst.1317909318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.2675651035 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 119188366436 ps |
| CPU time | 208.5 seconds |
| Started | Sep 09 09:58:16 AM UTC 24 |
| Finished | Sep 09 10:01:48 AM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2675651035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.2675651035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.654111152 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 118330568651 ps |
| CPU time | 308.78 seconds |
| Started | Sep 09 09:58:18 AM UTC 24 |
| Finished | Sep 09 10:03:31 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=654111152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 3.usbdev_freq_hiclk_max.654111152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.989165601 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 88264882978 ps |
| CPU time | 214.56 seconds |
| Started | Sep 09 09:58:18 AM UTC 24 |
| Finished | Sep 09 10:01:56 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=989165601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 3.usbdev_freq_loclk_max.989165601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.1871002661 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 114154090301 ps |
| CPU time | 201.14 seconds |
| Started | Sep 09 09:58:19 AM UTC 24 |
| Finished | Sep 09 10:01:43 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871002661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.1871002661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.1389508006 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 243333039 ps |
| CPU time | 1.84 seconds |
| Started | Sep 09 09:58:19 AM UTC 24 |
| Finished | Sep 09 09:58:22 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389508006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.1389508006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.4116894680 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 141194407 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 09:58:21 AM UTC 24 |
| Finished | Sep 09 09:58:24 AM UTC 24 |
| Peak memory | 214840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116894680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_stall.4116894680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.3819570131 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 256231052 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 09:58:21 AM UTC 24 |
| Finished | Sep 09 09:58:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3819570131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_trans.3819570131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.687460672 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 2879850568 ps |
| CPU time | 84.58 seconds |
| Started | Sep 09 09:58:19 AM UTC 24 |
| Finished | Sep 09 09:59:46 AM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=687460672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.687460672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.823169573 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 7399754952 ps |
| CPU time | 59.02 seconds |
| Started | Sep 09 09:58:25 AM UTC 24 |
| Finished | Sep 09 09:59:25 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=823169573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.823169573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.2471076366 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 251463689 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 09:58:25 AM UTC 24 |
| Finished | Sep 09 09:58:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2471076366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.2471076366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.2998309443 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 30030377813 ps |
| CPU time | 58.94 seconds |
| Started | Sep 09 09:58:25 AM UTC 24 |
| Finished | Sep 09 09:59:25 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998309443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.2998309443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.2624388654 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 9360632757 ps |
| CPU time | 24.01 seconds |
| Started | Sep 09 09:58:25 AM UTC 24 |
| Finished | Sep 09 09:58:50 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2624388654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.2624388654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.3794758625 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 3958445189 ps |
| CPU time | 123.46 seconds |
| Started | Sep 09 09:58:25 AM UTC 24 |
| Finished | Sep 09 10:00:31 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3794758625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.3794758625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.1805476538 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 237117574 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 09:58:25 AM UTC 24 |
| Finished | Sep 09 09:58:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1805476538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.1805476538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.1479388838 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 203707873 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 09:58:27 AM UTC 24 |
| Finished | Sep 09 09:58:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479388838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.1479388838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.3898953198 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 2646506525 ps |
| CPU time | 17.95 seconds |
| Started | Sep 09 09:58:28 AM UTC 24 |
| Finished | Sep 09 09:58:47 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898953198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.3898953198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.4258979242 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 2746021712 ps |
| CPU time | 23.91 seconds |
| Started | Sep 09 09:58:28 AM UTC 24 |
| Finished | Sep 09 09:58:53 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258979242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.4258979242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.161164946 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 1487856735 ps |
| CPU time | 16.73 seconds |
| Started | Sep 09 09:58:30 AM UTC 24 |
| Finished | Sep 09 09:58:48 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=161164946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.161164946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.3103976417 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 156928586 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 09:58:31 AM UTC 24 |
| Finished | Sep 09 09:58:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3103976417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.3103976417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.3707785894 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 161128890 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 09:58:33 AM UTC 24 |
| Finished | Sep 09 09:58:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707785894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.3707785894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.111552463 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 188719526 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 09:58:35 AM UTC 24 |
| Finished | Sep 09 09:58:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=111552463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_out_iso.111552463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.1565432186 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 172732226 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 09:58:36 AM UTC 24 |
| Finished | Sep 09 09:58:38 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1565432186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_out_stall.1565432186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.2585577003 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 196810427 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 09:58:36 AM UTC 24 |
| Finished | Sep 09 09:58:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585577003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_out_trans_nak.2585577003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.345295697 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 177752018 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 09:58:36 AM UTC 24 |
| Finished | Sep 09 09:58:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=345295697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pending_in_trans.345295697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.554407313 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 248882457 ps |
| CPU time | 1.96 seconds |
| Started | Sep 09 09:58:38 AM UTC 24 |
| Finished | Sep 09 09:58:41 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=554407313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.554407313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.3467840379 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 235317071 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 09:58:38 AM UTC 24 |
| Finished | Sep 09 09:58:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467840379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.3467840379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.3539532085 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 145653811 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 09:58:39 AM UTC 24 |
| Finished | Sep 09 09:58:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539532085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.3539532085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.3117487382 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 23091420881 ps |
| CPU time | 70.2 seconds |
| Started | Sep 09 09:58:39 AM UTC 24 |
| Finished | Sep 09 09:59:51 AM UTC 24 |
| Peak memory | 234200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3117487382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.3117487382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.3436297070 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 177495775 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 09:58:40 AM UTC 24 |
| Finished | Sep 09 09:58:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436297070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_pkt_received.3436297070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.818568391 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 226422310 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 09:58:41 AM UTC 24 |
| Finished | Sep 09 09:58:44 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=818568391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_pkt_sent.818568391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.2530234483 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 5737519631 ps |
| CPU time | 23.47 seconds |
| Started | Sep 09 09:58:43 AM UTC 24 |
| Finished | Sep 09 09:59:08 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530234483 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.2530234483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.497453979 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 6197702939 ps |
| CPU time | 29.31 seconds |
| Started | Sep 09 09:58:45 AM UTC 24 |
| Finished | Sep 09 09:59:16 AM UTC 24 |
| Peak memory | 229720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=497453979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.497453979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.863540074 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 10512234903 ps |
| CPU time | 52.19 seconds |
| Started | Sep 09 09:58:45 AM UTC 24 |
| Finished | Sep 09 09:59:39 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=863540074 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.863540074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.2766043401 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 210249830 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 09:58:41 AM UTC 24 |
| Finished | Sep 09 09:58:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766043401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.2766043401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.3973295502 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 150560942 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 09:58:43 AM UTC 24 |
| Finished | Sep 09 09:58:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3973295502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.3973295502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.3247478946 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 20157001256 ps |
| CPU time | 39.78 seconds |
| Started | Sep 09 09:58:45 AM UTC 24 |
| Finished | Sep 09 09:59:26 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247478946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.3247478946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.2047449091 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 197475655 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 09:58:46 AM UTC 24 |
| Finished | Sep 09 09:58:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047449091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.2047449091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.258350772 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 274780674 ps |
| CPU time | 2.13 seconds |
| Started | Sep 09 09:58:48 AM UTC 24 |
| Finished | Sep 09 09:58:52 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=258350772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_rx_full.258350772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.1845490370 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 150534085 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 09:58:50 AM UTC 24 |
| Finished | Sep 09 09:58:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845490370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_pid_err.1845490370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.3165031065 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 980693720 ps |
| CPU time | 3.5 seconds |
| Started | Sep 09 09:59:03 AM UTC 24 |
| Finished | Sep 09 09:59:07 AM UTC 24 |
| Peak memory | 251472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165031065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.3165031065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.1469035185 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 418049716 ps |
| CPU time | 2.51 seconds |
| Started | Sep 09 09:58:50 AM UTC 24 |
| Finished | Sep 09 09:58:53 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1469035185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.1469035185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.4000041566 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 300002962 ps |
| CPU time | 1.88 seconds |
| Started | Sep 09 09:58:51 AM UTC 24 |
| Finished | Sep 09 09:58:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000041566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.4000041566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.1442755261 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 150017498 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 09:58:53 AM UTC 24 |
| Finished | Sep 09 09:58:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442755261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_setup_stage.1442755261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.2207851775 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 206501990 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 09:58:53 AM UTC 24 |
| Finished | Sep 09 09:58:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207851775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 3.usbdev_setup_trans_ignored.2207851775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.2825762882 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 204790172 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 09:58:54 AM UTC 24 |
| Finished | Sep 09 09:58:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2825762882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.2825762882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.1724555388 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 2575532368 ps |
| CPU time | 27.19 seconds |
| Started | Sep 09 09:58:54 AM UTC 24 |
| Finished | Sep 09 09:59:23 AM UTC 24 |
| Peak memory | 227736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724555388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.1724555388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.561213713 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 175498419 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 09:58:54 AM UTC 24 |
| Finished | Sep 09 09:58:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561213713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.561213713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.27684713 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 143021804 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 09:58:57 AM UTC 24 |
| Finished | Sep 09 09:58:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=27684713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_stall_trans.27684713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.1247910902 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 450032507 ps |
| CPU time | 2.13 seconds |
| Started | Sep 09 09:58:58 AM UTC 24 |
| Finished | Sep 09 09:59:01 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247910902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.1247910902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.4147168692 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 1584651445 ps |
| CPU time | 19.84 seconds |
| Started | Sep 09 09:58:57 AM UTC 24 |
| Finished | Sep 09 09:59:18 AM UTC 24 |
| Peak memory | 227332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147168692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_streaming_out.4147168692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.226563177 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 3638528922 ps |
| CPU time | 26.87 seconds |
| Started | Sep 09 09:59:00 AM UTC 24 |
| Finished | Sep 09 09:59:28 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=226563177 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_0 8/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.226563177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.2902830466 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 1978149196 ps |
| CPU time | 19.35 seconds |
| Started | Sep 09 09:58:03 AM UTC 24 |
| Finished | Sep 09 09:58:23 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902830466 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.2902830466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.1172400370 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 471354537 ps |
| CPU time | 2.56 seconds |
| Started | Sep 09 09:59:00 AM UTC 24 |
| Finished | Sep 09 09:59:03 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1172400370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.1172400370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.1371452466 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 68632929 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:12:02 AM UTC 24 |
| Finished | Sep 09 10:12:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371452466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.1371452466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.424764239 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 9897825715 ps |
| CPU time | 16.89 seconds |
| Started | Sep 09 10:11:39 AM UTC 24 |
| Finished | Sep 09 10:11:57 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=424764239 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.424764239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.2179861104 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 13683389560 ps |
| CPU time | 19.72 seconds |
| Started | Sep 09 10:11:39 AM UTC 24 |
| Finished | Sep 09 10:12:00 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179861104 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.2179861104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.392643787 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 24436212287 ps |
| CPU time | 43.12 seconds |
| Started | Sep 09 10:11:39 AM UTC 24 |
| Finished | Sep 09 10:12:24 AM UTC 24 |
| Peak memory | 227384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=392643787 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.392643787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.2336255442 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 231000461 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:11:39 AM UTC 24 |
| Finished | Sep 09 10:11:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2336255442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.2336255442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.970235278 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 160628018 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:11:39 AM UTC 24 |
| Finished | Sep 09 10:11:42 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=970235278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_bitstuff_err.970235278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.772336515 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 507558418 ps |
| CPU time | 2.88 seconds |
| Started | Sep 09 10:11:41 AM UTC 24 |
| Finished | Sep 09 10:11:45 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=772336515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_data_toggle_clear.772336515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.1631445801 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 943802252 ps |
| CPU time | 3.67 seconds |
| Started | Sep 09 10:11:41 AM UTC 24 |
| Finished | Sep 09 10:11:46 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631445801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.1631445801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.2101557948 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 23619205324 ps |
| CPU time | 39.69 seconds |
| Started | Sep 09 10:11:41 AM UTC 24 |
| Finished | Sep 09 10:12:22 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101557948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.2101557948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.1296977116 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 4968026961 ps |
| CPU time | 37.58 seconds |
| Started | Sep 09 10:11:42 AM UTC 24 |
| Finished | Sep 09 10:12:22 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296977116 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.1296977116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.3503426779 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 669377599 ps |
| CPU time | 2.69 seconds |
| Started | Sep 09 10:11:43 AM UTC 24 |
| Finished | Sep 09 10:11:46 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3503426779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_disable_endpoint.3503426779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.3988253885 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 140180957 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:11:43 AM UTC 24 |
| Finished | Sep 09 10:11:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988253885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.3988253885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_enable.3644062629 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 40978697 ps |
| CPU time | 0.81 seconds |
| Started | Sep 09 10:11:43 AM UTC 24 |
| Finished | Sep 09 10:11:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3644062629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.3644062629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.175563657 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 1024615006 ps |
| CPU time | 5.15 seconds |
| Started | Sep 09 10:11:44 AM UTC 24 |
| Finished | Sep 09 10:11:50 AM UTC 24 |
| Peak memory | 217328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=175563657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.175563657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.3831053907 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 701726490 ps |
| CPU time | 2.94 seconds |
| Started | Sep 09 10:11:44 AM UTC 24 |
| Finished | Sep 09 10:11:48 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831053907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.3831053907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.2138804494 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 160694509 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:11:45 AM UTC 24 |
| Finished | Sep 09 10:11:48 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138804494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_fifo_levels.2138804494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.1978266811 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 289787021 ps |
| CPU time | 2.94 seconds |
| Started | Sep 09 10:11:45 AM UTC 24 |
| Finished | Sep 09 10:11:50 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1978266811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.1978266811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.2416345866 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 197077488 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:11:45 AM UTC 24 |
| Finished | Sep 09 10:11:48 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416345866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.2416345866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.4150512094 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 134889815 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:11:45 AM UTC 24 |
| Finished | Sep 09 10:11:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150512094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.4150512094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.4012373714 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 240033907 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:11:45 AM UTC 24 |
| Finished | Sep 09 10:11:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012373714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_trans.4012373714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.75590295 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 3143991714 ps |
| CPU time | 26.27 seconds |
| Started | Sep 09 10:11:45 AM UTC 24 |
| Finished | Sep 09 10:12:13 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75590295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.75590295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.542883561 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 6368782386 ps |
| CPU time | 41.81 seconds |
| Started | Sep 09 10:11:47 AM UTC 24 |
| Finished | Sep 09 10:12:30 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=542883561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.542883561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.869212650 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 242379190 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:11:48 AM UTC 24 |
| Finished | Sep 09 10:11:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=869212650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_link_in_err.869212650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.1599622598 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 24895454278 ps |
| CPU time | 46.44 seconds |
| Started | Sep 09 10:11:50 AM UTC 24 |
| Finished | Sep 09 10:12:38 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599622598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.1599622598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.2137814832 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 8659351405 ps |
| CPU time | 21.72 seconds |
| Started | Sep 09 10:11:50 AM UTC 24 |
| Finished | Sep 09 10:12:13 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137814832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.2137814832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.4119108910 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 5374127215 ps |
| CPU time | 54.31 seconds |
| Started | Sep 09 10:11:50 AM UTC 24 |
| Finished | Sep 09 10:12:46 AM UTC 24 |
| Peak memory | 234296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4119108910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.4119108910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.908543656 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 1966040897 ps |
| CPU time | 15.57 seconds |
| Started | Sep 09 10:11:50 AM UTC 24 |
| Finished | Sep 09 10:12:07 AM UTC 24 |
| Peak memory | 234200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=908543656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.908543656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.657642556 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 261778613 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:11:50 AM UTC 24 |
| Finished | Sep 09 10:11:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=657642556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.657642556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.2294260564 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 243092230 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:11:50 AM UTC 24 |
| Finished | Sep 09 10:11:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294260564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.2294260564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.811855214 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 1486564398 ps |
| CPU time | 15.29 seconds |
| Started | Sep 09 10:11:52 AM UTC 24 |
| Finished | Sep 09 10:12:09 AM UTC 24 |
| Peak memory | 234028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=811855214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.811855214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.579453855 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 166858768 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:11:52 AM UTC 24 |
| Finished | Sep 09 10:11:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579453855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.579453855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.2310445528 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 161316805 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:11:52 AM UTC 24 |
| Finished | Sep 09 10:11:54 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310445528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.2310445528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.3238873233 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 234836681 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:11:52 AM UTC 24 |
| Finished | Sep 09 10:11:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3238873233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.3238873233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.570685243 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 182541191 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:11:52 AM UTC 24 |
| Finished | Sep 09 10:11:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=570685243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_out_iso.570685243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.143748135 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 176564712 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:11:54 AM UTC 24 |
| Finished | Sep 09 10:11:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=143748135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_out_stall.143748135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.1003942789 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 179032934 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:11:54 AM UTC 24 |
| Finished | Sep 09 10:11:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003942789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.1003942789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.1545612614 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 183927957 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:11:54 AM UTC 24 |
| Finished | Sep 09 10:11:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545612614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.1545612614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.3419716196 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 180509455 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:11:55 AM UTC 24 |
| Finished | Sep 09 10:11:58 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3419716196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.3419716196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.993673501 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 148025619 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:11:56 AM UTC 24 |
| Finished | Sep 09 10:11:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=993673501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.993673501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.2363066327 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 31261465 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:11:56 AM UTC 24 |
| Finished | Sep 09 10:11:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363066327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.2363066327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.1228159507 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 8192593150 ps |
| CPU time | 25.69 seconds |
| Started | Sep 09 10:11:56 AM UTC 24 |
| Finished | Sep 09 10:12:23 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1228159507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.1228159507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.4244761111 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 177387531 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:11:56 AM UTC 24 |
| Finished | Sep 09 10:11:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244761111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.4244761111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.450595320 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 201586841 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:11:57 AM UTC 24 |
| Finished | Sep 09 10:12:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=450595320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_pkt_sent.450595320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.3318466023 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 237172310 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:11:57 AM UTC 24 |
| Finished | Sep 09 10:12:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318466023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.3318466023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.3377481039 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 213703860 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:11:57 AM UTC 24 |
| Finished | Sep 09 10:12:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377481039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.3377481039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.992820507 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 182580549 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:11:57 AM UTC 24 |
| Finished | Sep 09 10:12:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=992820507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_rx_crc_err.992820507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.1412743337 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 251262970 ps |
| CPU time | 1.89 seconds |
| Started | Sep 09 10:11:59 AM UTC 24 |
| Finished | Sep 09 10:12:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412743337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.1412743337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.3824975883 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 165557118 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:11:59 AM UTC 24 |
| Finished | Sep 09 10:12:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824975883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.3824975883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.1206179088 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 153259628 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:11:59 AM UTC 24 |
| Finished | Sep 09 10:12:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206179088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.1206179088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.1583944691 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 239378060 ps |
| CPU time | 1.86 seconds |
| Started | Sep 09 10:11:59 AM UTC 24 |
| Finished | Sep 09 10:12:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1583944691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.1583944691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.1011122985 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 2145409538 ps |
| CPU time | 55.7 seconds |
| Started | Sep 09 10:11:59 AM UTC 24 |
| Finished | Sep 09 10:12:56 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011122985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.1011122985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.58613040 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 216140020 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:12:01 AM UTC 24 |
| Finished | Sep 09 10:12:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=58613040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.58613040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.1059283424 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 183808907 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:12:01 AM UTC 24 |
| Finished | Sep 09 10:12:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059283424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.1059283424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.1709549974 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 1097311381 ps |
| CPU time | 4.4 seconds |
| Started | Sep 09 10:12:01 AM UTC 24 |
| Finished | Sep 09 10:12:06 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709549974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.1709549974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.2996179677 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 2844854627 ps |
| CPU time | 77.5 seconds |
| Started | Sep 09 10:12:01 AM UTC 24 |
| Finished | Sep 09 10:13:20 AM UTC 24 |
| Peak memory | 227372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996179677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.2996179677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.2781637705 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 3839236199 ps |
| CPU time | 33.68 seconds |
| Started | Sep 09 10:11:42 AM UTC 24 |
| Finished | Sep 09 10:12:18 AM UTC 24 |
| Peak memory | 217500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2781637705 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.2781637705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.1527084258 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 631108442 ps |
| CPU time | 3.03 seconds |
| Started | Sep 09 10:12:01 AM UTC 24 |
| Finished | Sep 09 10:12:05 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1527084258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_t x_rx_disruption.1527084258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.1146903999 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 523430460 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:19:38 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1146903999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.1146903999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.1743078074 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 555438813 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:19:38 AM UTC 24 |
| Finished | Sep 09 10:19:51 AM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1743078074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.1743078074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.1838330570 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 639488315 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:19:38 AM UTC 24 |
| Finished | Sep 09 10:19:51 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1838330570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_ tx_rx_disruption.1838330570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.1858375867 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 555172239 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:19:38 AM UTC 24 |
| Finished | Sep 09 10:19:51 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1858375867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.1858375867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.2044738600 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 604307227 ps |
| CPU time | 1.8 seconds |
| Started | Sep 09 10:19:40 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 216260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2044738600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_ tx_rx_disruption.2044738600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.2213206752 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 616814447 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:19:40 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2213206752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.2213206752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.1081549941 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 582816133 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:19:40 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1081549941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.1081549941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.1323771441 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 568361054 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:19:40 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1323771441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_ tx_rx_disruption.1323771441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.2608097070 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 505919195 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:19:40 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2608097070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_ tx_rx_disruption.2608097070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.1017442660 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 493910398 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:19:40 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1017442660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.1017442660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.2770426564 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 60090463 ps |
| CPU time | 0.95 seconds |
| Started | Sep 09 10:12:20 AM UTC 24 |
| Finished | Sep 09 10:12:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770426564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.2770426564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.1722290452 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 11244871444 ps |
| CPU time | 17.81 seconds |
| Started | Sep 09 10:12:03 AM UTC 24 |
| Finished | Sep 09 10:12:21 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722290452 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.1722290452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.2021518311 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 14063325621 ps |
| CPU time | 16.67 seconds |
| Started | Sep 09 10:12:03 AM UTC 24 |
| Finished | Sep 09 10:12:20 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021518311 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.2021518311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.394695776 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 28612461969 ps |
| CPU time | 38.11 seconds |
| Started | Sep 09 10:12:03 AM UTC 24 |
| Finished | Sep 09 10:12:42 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=394695776 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.394695776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.556128171 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 144790287 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:12:03 AM UTC 24 |
| Finished | Sep 09 10:12:05 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=556128171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_av_buffer.556128171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.1588555516 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 171073988 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:12:04 AM UTC 24 |
| Finished | Sep 09 10:12:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588555516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_bitstuff_err.1588555516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.341752017 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 277958680 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:12:04 AM UTC 24 |
| Finished | Sep 09 10:12:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=341752017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_data_toggle_clear.341752017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.2276496216 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 1109027192 ps |
| CPU time | 3.8 seconds |
| Started | Sep 09 10:12:04 AM UTC 24 |
| Finished | Sep 09 10:12:09 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2276496216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.2276496216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.2031509256 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 39324230692 ps |
| CPU time | 89.63 seconds |
| Started | Sep 09 10:12:05 AM UTC 24 |
| Finished | Sep 09 10:13:37 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031509256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.2031509256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.411893708 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 1305071429 ps |
| CPU time | 30.68 seconds |
| Started | Sep 09 10:12:07 AM UTC 24 |
| Finished | Sep 09 10:12:39 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=411893708 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.411893708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.4193541233 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 888116516 ps |
| CPU time | 4.01 seconds |
| Started | Sep 09 10:12:07 AM UTC 24 |
| Finished | Sep 09 10:12:12 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4193541233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.4193541233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.3668146324 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 192580555 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:12:07 AM UTC 24 |
| Finished | Sep 09 10:12:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3668146324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_disconnected.3668146324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_enable.1190501100 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 94500676 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:12:07 AM UTC 24 |
| Finished | Sep 09 10:12:10 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190501100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.1190501100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.499463341 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 762815852 ps |
| CPU time | 3.55 seconds |
| Started | Sep 09 10:12:07 AM UTC 24 |
| Finished | Sep 09 10:12:12 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=499463341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.499463341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_levels.1349765859 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 284884558 ps |
| CPU time | 2.08 seconds |
| Started | Sep 09 10:12:09 AM UTC 24 |
| Finished | Sep 09 10:12:12 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1349765859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_fifo_levels.1349765859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.4033092495 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 281286045 ps |
| CPU time | 1.91 seconds |
| Started | Sep 09 10:12:09 AM UTC 24 |
| Finished | Sep 09 10:12:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033092495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.4033092495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.2742412066 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 198695240 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:12:09 AM UTC 24 |
| Finished | Sep 09 10:12:12 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742412066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.2742412066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.3688293669 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 140724500 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:12:09 AM UTC 24 |
| Finished | Sep 09 10:12:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688293669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.3688293669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.1791232445 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 158332419 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:12:09 AM UTC 24 |
| Finished | Sep 09 10:12:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1791232445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.1791232445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.3751394364 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 5530193218 ps |
| CPU time | 159.33 seconds |
| Started | Sep 09 10:12:09 AM UTC 24 |
| Finished | Sep 09 10:14:51 AM UTC 24 |
| Peak memory | 236896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3751394364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.3751394364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.3520811291 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 12248755464 ps |
| CPU time | 81.95 seconds |
| Started | Sep 09 10:12:09 AM UTC 24 |
| Finished | Sep 09 10:13:33 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520811291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.3520811291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.1382577259 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 201984713 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:12:11 AM UTC 24 |
| Finished | Sep 09 10:12:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382577259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.1382577259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.1309776759 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 14723919810 ps |
| CPU time | 21.42 seconds |
| Started | Sep 09 10:12:11 AM UTC 24 |
| Finished | Sep 09 10:12:33 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1309776759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.1309776759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.3263957125 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 10368815361 ps |
| CPU time | 17.78 seconds |
| Started | Sep 09 10:12:11 AM UTC 24 |
| Finished | Sep 09 10:12:30 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263957125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.3263957125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.2760833277 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 3768061977 ps |
| CPU time | 36.22 seconds |
| Started | Sep 09 10:12:11 AM UTC 24 |
| Finished | Sep 09 10:12:48 AM UTC 24 |
| Peak memory | 234396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760833277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.2760833277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.222419554 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 2953941267 ps |
| CPU time | 82.57 seconds |
| Started | Sep 09 10:12:12 AM UTC 24 |
| Finished | Sep 09 10:13:37 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=222419554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.222419554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.2958138454 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 237788820 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:12:12 AM UTC 24 |
| Finished | Sep 09 10:12:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958138454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.2958138454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.2335996600 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 193158334 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:12:12 AM UTC 24 |
| Finished | Sep 09 10:12:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335996600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.2335996600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.2594199737 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 3632870614 ps |
| CPU time | 97.67 seconds |
| Started | Sep 09 10:12:12 AM UTC 24 |
| Finished | Sep 09 10:13:52 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594199737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.2594199737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.449775189 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 154777561 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:12:12 AM UTC 24 |
| Finished | Sep 09 10:12:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=449775189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.449775189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.1329259641 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 139585679 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:12:13 AM UTC 24 |
| Finished | Sep 09 10:12:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329259641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.1329259641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.3416239897 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 213468320 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:12:14 AM UTC 24 |
| Finished | Sep 09 10:12:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416239897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.3416239897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.462030002 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 189999701 ps |
| CPU time | 1.01 seconds |
| Started | Sep 09 10:12:14 AM UTC 24 |
| Finished | Sep 09 10:12:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=462030002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_out_iso.462030002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.547535595 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 187204903 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:12:14 AM UTC 24 |
| Finished | Sep 09 10:12:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=547535595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_out_stall.547535595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.1672432602 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 159097093 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:12:14 AM UTC 24 |
| Finished | Sep 09 10:12:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1672432602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.1672432602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.2160458688 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 178103996 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:12:14 AM UTC 24 |
| Finished | Sep 09 10:12:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160458688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.2160458688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.4031454602 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 343338443 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:12:15 AM UTC 24 |
| Finished | Sep 09 10:12:17 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031454602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.4031454602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.1064092289 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 146289809 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:12:15 AM UTC 24 |
| Finished | Sep 09 10:12:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064092289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.1064092289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.349055034 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 35598013 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:12:15 AM UTC 24 |
| Finished | Sep 09 10:12:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=349055034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_phy_pins_sense.349055034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.1657356902 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 13849971134 ps |
| CPU time | 42.85 seconds |
| Started | Sep 09 10:12:16 AM UTC 24 |
| Finished | Sep 09 10:13:00 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657356902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.1657356902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.1433200534 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 171200094 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:12:16 AM UTC 24 |
| Finished | Sep 09 10:12:18 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433200534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.1433200534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.2330742472 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 184737928 ps |
| CPU time | 1.05 seconds |
| Started | Sep 09 10:12:16 AM UTC 24 |
| Finished | Sep 09 10:12:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2330742472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.2330742472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.1015885792 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 180161304 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:12:16 AM UTC 24 |
| Finished | Sep 09 10:12:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1015885792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.1015885792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.1385676378 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 181272684 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:12:18 AM UTC 24 |
| Finished | Sep 09 10:12:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385676378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.1385676378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.1588927332 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 152441337 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:12:18 AM UTC 24 |
| Finished | Sep 09 10:12:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588927332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.1588927332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.1203261824 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 309641289 ps |
| CPU time | 2.21 seconds |
| Started | Sep 09 10:12:18 AM UTC 24 |
| Finished | Sep 09 10:12:21 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1203261824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.1203261824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.507846101 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 155550020 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:12:18 AM UTC 24 |
| Finished | Sep 09 10:12:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=507846101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_setup_stage.507846101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.481080657 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 154675033 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:12:18 AM UTC 24 |
| Finished | Sep 09 10:12:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=481080657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 31.usbdev_setup_trans_ignored.481080657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.2731082300 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 230824355 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:12:18 AM UTC 24 |
| Finished | Sep 09 10:12:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2731082300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.2731082300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.2446514746 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 1870499768 ps |
| CPU time | 48.42 seconds |
| Started | Sep 09 10:12:18 AM UTC 24 |
| Finished | Sep 09 10:13:08 AM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446514746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.2446514746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.2622625908 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 195422030 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:12:18 AM UTC 24 |
| Finished | Sep 09 10:12:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622625908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.2622625908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.246252876 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 186432214 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:12:18 AM UTC 24 |
| Finished | Sep 09 10:12:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=246252876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_stall_trans.246252876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.4019985064 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 446782382 ps |
| CPU time | 2.22 seconds |
| Started | Sep 09 10:12:20 AM UTC 24 |
| Finished | Sep 09 10:12:23 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4019985064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.4019985064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.1689986130 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 2256767428 ps |
| CPU time | 55.01 seconds |
| Started | Sep 09 10:12:20 AM UTC 24 |
| Finished | Sep 09 10:13:16 AM UTC 24 |
| Peak memory | 234112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689986130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.1689986130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.3289235859 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 1559296539 ps |
| CPU time | 12.89 seconds |
| Started | Sep 09 10:12:07 AM UTC 24 |
| Finished | Sep 09 10:12:21 AM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3289235859 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.3289235859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.4049760363 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 569891573 ps |
| CPU time | 2.01 seconds |
| Started | Sep 09 10:12:20 AM UTC 24 |
| Finished | Sep 09 10:12:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4049760363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.4049760363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.914663047 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 427541828 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=914663047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_t x_rx_disruption.914663047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.102138773 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 512344703 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=102138773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_t x_rx_disruption.102138773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.3914042807 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 532024456 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3914042807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.3914042807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.1405472887 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 481463871 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1405472887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_ tx_rx_disruption.1405472887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.3127733650 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 515432857 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3127733650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_ tx_rx_disruption.3127733650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.885473881 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 558100474 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=885473881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_t x_rx_disruption.885473881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.1512468315 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 608661114 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1512468315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_ tx_rx_disruption.1512468315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.2003192939 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 566500430 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2003192939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_ tx_rx_disruption.2003192939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.2864251996 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 629819880 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2864251996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_ tx_rx_disruption.2864251996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.972712332 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 633519970 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=972712332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_t x_rx_disruption.972712332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.3498504360 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 89118632 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:12:39 AM UTC 24 |
| Finished | Sep 09 10:12:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3498504360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.3498504360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.3792805216 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 6090273013 ps |
| CPU time | 9.05 seconds |
| Started | Sep 09 10:12:21 AM UTC 24 |
| Finished | Sep 09 10:12:32 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3792805216 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.3792805216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.3097886434 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 14107044141 ps |
| CPU time | 17.22 seconds |
| Started | Sep 09 10:12:21 AM UTC 24 |
| Finished | Sep 09 10:12:40 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097886434 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.3097886434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.352884540 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 24878143737 ps |
| CPU time | 38.57 seconds |
| Started | Sep 09 10:12:21 AM UTC 24 |
| Finished | Sep 09 10:13:01 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=352884540 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.352884540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.2826467232 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 154924063 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:12:21 AM UTC 24 |
| Finished | Sep 09 10:12:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826467232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.2826467232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.1505679992 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 167123667 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:12:22 AM UTC 24 |
| Finished | Sep 09 10:12:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505679992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_bitstuff_err.1505679992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.1811105539 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 358024925 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:12:22 AM UTC 24 |
| Finished | Sep 09 10:12:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811105539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.1811105539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.3570069042 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 653354253 ps |
| CPU time | 3.22 seconds |
| Started | Sep 09 10:12:22 AM UTC 24 |
| Finished | Sep 09 10:12:26 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570069042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.3570069042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.2416793996 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 13928888012 ps |
| CPU time | 25.79 seconds |
| Started | Sep 09 10:12:22 AM UTC 24 |
| Finished | Sep 09 10:12:49 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416793996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.2416793996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.386724211 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 5692005230 ps |
| CPU time | 46.54 seconds |
| Started | Sep 09 10:12:24 AM UTC 24 |
| Finished | Sep 09 10:13:12 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=386724211 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.386724211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.615223423 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 783692942 ps |
| CPU time | 2.21 seconds |
| Started | Sep 09 10:12:24 AM UTC 24 |
| Finished | Sep 09 10:12:27 AM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=615223423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_disable_endpoint.615223423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.2428309682 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 142531283 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:12:24 AM UTC 24 |
| Finished | Sep 09 10:12:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2428309682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.2428309682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_enable.2308635596 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 30674367 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:12:24 AM UTC 24 |
| Finished | Sep 09 10:12:26 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308635596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.2308635596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.3597715028 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 959869999 ps |
| CPU time | 3.46 seconds |
| Started | Sep 09 10:12:24 AM UTC 24 |
| Finished | Sep 09 10:12:29 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597715028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.3597715028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.1399042308 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 527857514 ps |
| CPU time | 1.93 seconds |
| Started | Sep 09 10:12:24 AM UTC 24 |
| Finished | Sep 09 10:12:27 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399042308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.1399042308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.3009992399 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 327541851 ps |
| CPU time | 2.8 seconds |
| Started | Sep 09 10:12:24 AM UTC 24 |
| Finished | Sep 09 10:12:28 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3009992399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_fifo_rst.3009992399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.3740590551 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 213388204 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:12:25 AM UTC 24 |
| Finished | Sep 09 10:12:27 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740590551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.3740590551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.66778721 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 150568971 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:12:25 AM UTC 24 |
| Finished | Sep 09 10:12:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=66778721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_in_stall.66778721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.106151097 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 217029764 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 10:12:26 AM UTC 24 |
| Finished | Sep 09 10:12:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=106151097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_in_trans.106151097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.1232099018 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 4887567243 ps |
| CPU time | 129.51 seconds |
| Started | Sep 09 10:12:24 AM UTC 24 |
| Finished | Sep 09 10:14:37 AM UTC 24 |
| Peak memory | 229808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232099018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.1232099018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.326784325 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 4855485293 ps |
| CPU time | 59.92 seconds |
| Started | Sep 09 10:12:26 AM UTC 24 |
| Finished | Sep 09 10:13:28 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=326784325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.326784325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.764725894 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 239594537 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:12:28 AM UTC 24 |
| Finished | Sep 09 10:12:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=764725894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_link_in_err.764725894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.792446184 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 26872353556 ps |
| CPU time | 53.75 seconds |
| Started | Sep 09 10:12:28 AM UTC 24 |
| Finished | Sep 09 10:13:24 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=792446184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_link_resume.792446184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.3813369568 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 4726463687 ps |
| CPU time | 7.94 seconds |
| Started | Sep 09 10:12:28 AM UTC 24 |
| Finished | Sep 09 10:12:37 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813369568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.3813369568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.3738465618 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 3098064336 ps |
| CPU time | 27.42 seconds |
| Started | Sep 09 10:12:28 AM UTC 24 |
| Finished | Sep 09 10:12:57 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738465618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.3738465618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.2413642806 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 2748772614 ps |
| CPU time | 19.74 seconds |
| Started | Sep 09 10:12:28 AM UTC 24 |
| Finished | Sep 09 10:12:49 AM UTC 24 |
| Peak memory | 229704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2413642806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.2413642806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.1464934840 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 263195539 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:12:28 AM UTC 24 |
| Finished | Sep 09 10:12:31 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464934840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.1464934840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.2831132629 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 188295554 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:12:28 AM UTC 24 |
| Finished | Sep 09 10:12:31 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2831132629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.2831132629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.3389796257 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 2342654518 ps |
| CPU time | 22.32 seconds |
| Started | Sep 09 10:12:30 AM UTC 24 |
| Finished | Sep 09 10:12:54 AM UTC 24 |
| Peak memory | 229732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3389796257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.3389796257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.839767858 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 154185375 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:12:30 AM UTC 24 |
| Finished | Sep 09 10:12:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=839767858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.839767858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.1252941719 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 150346206 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:12:30 AM UTC 24 |
| Finished | Sep 09 10:12:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252941719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.1252941719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.3495241508 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 156390230 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:12:30 AM UTC 24 |
| Finished | Sep 09 10:12:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495241508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_out_iso.3495241508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.2079964580 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 214673842 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:12:32 AM UTC 24 |
| Finished | Sep 09 10:12:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079964580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_out_stall.2079964580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.237154453 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 154395077 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:12:32 AM UTC 24 |
| Finished | Sep 09 10:12:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=237154453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_out_trans_nak.237154453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.1809045055 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 168273448 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:12:32 AM UTC 24 |
| Finished | Sep 09 10:12:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1809045055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_pending_in_trans.1809045055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.4121956117 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 286392814 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:12:32 AM UTC 24 |
| Finished | Sep 09 10:12:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121956117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.4121956117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.299057156 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 185033519 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:12:32 AM UTC 24 |
| Finished | Sep 09 10:12:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=299057156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.299057156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.2185736365 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 33685159 ps |
| CPU time | 0.87 seconds |
| Started | Sep 09 10:12:33 AM UTC 24 |
| Finished | Sep 09 10:12:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185736365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.2185736365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.4236662342 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 14885081369 ps |
| CPU time | 41.62 seconds |
| Started | Sep 09 10:12:33 AM UTC 24 |
| Finished | Sep 09 10:13:16 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236662342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.4236662342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.2642250080 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 197894868 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:12:33 AM UTC 24 |
| Finished | Sep 09 10:12:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642250080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.2642250080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.4226671338 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 170310507 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:12:35 AM UTC 24 |
| Finished | Sep 09 10:12:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226671338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.4226671338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.4220014201 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 193624314 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:12:35 AM UTC 24 |
| Finished | Sep 09 10:12:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220014201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.4220014201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.3523325598 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 180952839 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:12:35 AM UTC 24 |
| Finished | Sep 09 10:12:37 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523325598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.3523325598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.3057856637 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 138092554 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:12:35 AM UTC 24 |
| Finished | Sep 09 10:12:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057856637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_rx_crc_err.3057856637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.2441831782 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 265552208 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:12:35 AM UTC 24 |
| Finished | Sep 09 10:12:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441831782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_rx_full.2441831782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.2173680161 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 155287687 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:12:35 AM UTC 24 |
| Finished | Sep 09 10:12:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173680161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_setup_stage.2173680161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.3959537371 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 155659841 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:12:37 AM UTC 24 |
| Finished | Sep 09 10:12:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959537371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.3959537371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.770410856 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 243612896 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:12:37 AM UTC 24 |
| Finished | Sep 09 10:12:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=770410856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.770410856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.4198598776 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 3172822410 ps |
| CPU time | 22.47 seconds |
| Started | Sep 09 10:12:37 AM UTC 24 |
| Finished | Sep 09 10:13:01 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4198598776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.4198598776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.1593091661 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 170608341 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:12:37 AM UTC 24 |
| Finished | Sep 09 10:12:40 AM UTC 24 |
| Peak memory | 214632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593091661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.1593091661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.1184673508 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 185138636 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:12:37 AM UTC 24 |
| Finished | Sep 09 10:12:40 AM UTC 24 |
| Peak memory | 214644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1184673508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.1184673508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.4281254062 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 621707551 ps |
| CPU time | 2.02 seconds |
| Started | Sep 09 10:12:39 AM UTC 24 |
| Finished | Sep 09 10:12:42 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281254062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.4281254062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.2312790241 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 2761712494 ps |
| CPU time | 75.05 seconds |
| Started | Sep 09 10:12:37 AM UTC 24 |
| Finished | Sep 09 10:13:54 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2312790241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_streaming_out.2312790241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.1139134564 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 2019363011 ps |
| CPU time | 18.85 seconds |
| Started | Sep 09 10:12:24 AM UTC 24 |
| Finished | Sep 09 10:12:44 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1139134564 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.1139134564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.2107669458 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 615612377 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:12:39 AM UTC 24 |
| Finished | Sep 09 10:12:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2107669458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.2107669458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.749672659 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 507436238 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:44 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=749672659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_t x_rx_disruption.749672659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.362635314 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 555806552 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=362635314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_t x_rx_disruption.362635314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.2506756339 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 457106120 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2506756339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_ tx_rx_disruption.2506756339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.1913062395 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 452649831 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:19:42 AM UTC 24 |
| Finished | Sep 09 10:19:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1913062395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.1913062395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.158596370 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 485177237 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:19:45 AM UTC 24 |
| Finished | Sep 09 10:19:51 AM UTC 24 |
| Peak memory | 214544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=158596370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_t x_rx_disruption.158596370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.3082883777 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 482479659 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:19:45 AM UTC 24 |
| Finished | Sep 09 10:19:51 AM UTC 24 |
| Peak memory | 214636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3082883777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.3082883777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.4098844082 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 563421667 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:45 AM UTC 24 |
| Finished | Sep 09 10:19:51 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4098844082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.4098844082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.1559228935 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 507345368 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:19:45 AM UTC 24 |
| Finished | Sep 09 10:19:51 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1559228935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_ tx_rx_disruption.1559228935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.3916798480 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 618782328 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:19:45 AM UTC 24 |
| Finished | Sep 09 10:19:51 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3916798480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.3916798480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.2555504810 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 495806721 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:19:47 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2555504810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.2555504810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.3333440820 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 38783377 ps |
| CPU time | 0.81 seconds |
| Started | Sep 09 10:13:01 AM UTC 24 |
| Finished | Sep 09 10:13:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333440820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.3333440820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.940828285 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 9661805922 ps |
| CPU time | 18.12 seconds |
| Started | Sep 09 10:12:39 AM UTC 24 |
| Finished | Sep 09 10:12:59 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=940828285 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.940828285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.2439306535 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 16188357059 ps |
| CPU time | 19.79 seconds |
| Started | Sep 09 10:12:39 AM UTC 24 |
| Finished | Sep 09 10:13:00 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2439306535 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.2439306535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.1075977167 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 29712542162 ps |
| CPU time | 49.63 seconds |
| Started | Sep 09 10:12:39 AM UTC 24 |
| Finished | Sep 09 10:13:31 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075977167 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.1075977167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.137873294 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 204484983 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:12:39 AM UTC 24 |
| Finished | Sep 09 10:12:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=137873294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_av_buffer.137873294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.1334727561 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 163998593 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:12:41 AM UTC 24 |
| Finished | Sep 09 10:12:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334727561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_bitstuff_err.1334727561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.2676565324 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 255296513 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:12:41 AM UTC 24 |
| Finished | Sep 09 10:12:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676565324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.2676565324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.3189799538 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 1292619561 ps |
| CPU time | 3.25 seconds |
| Started | Sep 09 10:12:41 AM UTC 24 |
| Finished | Sep 09 10:12:45 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189799538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.3189799538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.185670554 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 12733853005 ps |
| CPU time | 21.76 seconds |
| Started | Sep 09 10:12:41 AM UTC 24 |
| Finished | Sep 09 10:13:04 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=185670554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_device_address.185670554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.15573746 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 2522372693 ps |
| CPU time | 22.02 seconds |
| Started | Sep 09 10:12:41 AM UTC 24 |
| Finished | Sep 09 10:13:04 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=15573746 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.15573746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.1574164505 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 895529289 ps |
| CPU time | 3.73 seconds |
| Started | Sep 09 10:12:42 AM UTC 24 |
| Finished | Sep 09 10:12:47 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574164505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.1574164505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.1645484407 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 160132798 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:12:42 AM UTC 24 |
| Finished | Sep 09 10:12:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1645484407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_disconnected.1645484407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_enable.1008228096 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 98710560 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:12:43 AM UTC 24 |
| Finished | Sep 09 10:12:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008228096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_enable.1008228096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.1733112962 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 1035162901 ps |
| CPU time | 3.4 seconds |
| Started | Sep 09 10:12:44 AM UTC 24 |
| Finished | Sep 09 10:12:48 AM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733112962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.1733112962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.1599941552 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 317300573 ps |
| CPU time | 1.98 seconds |
| Started | Sep 09 10:12:44 AM UTC 24 |
| Finished | Sep 09 10:12:47 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599941552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.1599941552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_levels.997715744 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 224596643 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:12:44 AM UTC 24 |
| Finished | Sep 09 10:12:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=997715744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_fifo_levels.997715744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.2708608147 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 599687888 ps |
| CPU time | 4.41 seconds |
| Started | Sep 09 10:12:44 AM UTC 24 |
| Finished | Sep 09 10:12:50 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2708608147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.2708608147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.2894116635 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 233250761 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:12:44 AM UTC 24 |
| Finished | Sep 09 10:12:47 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894116635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.2894116635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.1740078171 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 169477828 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:12:46 AM UTC 24 |
| Finished | Sep 09 10:12:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1740078171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.1740078171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.556778179 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 245756793 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 10:12:46 AM UTC 24 |
| Finished | Sep 09 10:12:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=556778179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_in_trans.556778179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.3326282023 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 4728738833 ps |
| CPU time | 36.66 seconds |
| Started | Sep 09 10:12:44 AM UTC 24 |
| Finished | Sep 09 10:13:22 AM UTC 24 |
| Peak memory | 234180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326282023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.3326282023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.1470862105 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 12096516659 ps |
| CPU time | 83.36 seconds |
| Started | Sep 09 10:12:46 AM UTC 24 |
| Finished | Sep 09 10:14:12 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470862105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.1470862105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.2475422220 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 192340993 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:12:46 AM UTC 24 |
| Finished | Sep 09 10:12:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475422220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_in_err.2475422220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.1525604158 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 27491657488 ps |
| CPU time | 53.47 seconds |
| Started | Sep 09 10:12:48 AM UTC 24 |
| Finished | Sep 09 10:13:43 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525604158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_resume.1525604158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.208783326 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 5096934420 ps |
| CPU time | 9.63 seconds |
| Started | Sep 09 10:12:48 AM UTC 24 |
| Finished | Sep 09 10:12:59 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208783326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_suspend.208783326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.2939119372 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 3841475550 ps |
| CPU time | 38.21 seconds |
| Started | Sep 09 10:12:48 AM UTC 24 |
| Finished | Sep 09 10:13:28 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939119372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.2939119372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.41759106 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 2046485773 ps |
| CPU time | 53.63 seconds |
| Started | Sep 09 10:12:48 AM UTC 24 |
| Finished | Sep 09 10:13:43 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=41759106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.41759106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.802908985 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 243464568 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:12:48 AM UTC 24 |
| Finished | Sep 09 10:12:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=802908985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.802908985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.3223893003 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 207212334 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:12:50 AM UTC 24 |
| Finished | Sep 09 10:12:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3223893003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.3223893003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.4188421870 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 1812813920 ps |
| CPU time | 48.25 seconds |
| Started | Sep 09 10:12:50 AM UTC 24 |
| Finished | Sep 09 10:13:40 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188421870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.4188421870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.1634172737 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 156251487 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:12:50 AM UTC 24 |
| Finished | Sep 09 10:12:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1634172737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.1634172737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.1261349417 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 143151151 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:12:50 AM UTC 24 |
| Finished | Sep 09 10:12:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261349417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.1261349417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.3291130730 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 194589570 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:12:50 AM UTC 24 |
| Finished | Sep 09 10:12:53 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291130730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_nak_trans.3291130730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.986210672 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 160333697 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:12:50 AM UTC 24 |
| Finished | Sep 09 10:12:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=986210672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_out_iso.986210672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.2205249540 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 178663267 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:12:51 AM UTC 24 |
| Finished | Sep 09 10:12:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205249540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_out_stall.2205249540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.3895321162 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 190558411 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:12:52 AM UTC 24 |
| Finished | Sep 09 10:12:54 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3895321162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_out_trans_nak.3895321162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.3656945505 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 159302973 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:12:52 AM UTC 24 |
| Finished | Sep 09 10:12:54 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656945505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.3656945505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.3600434887 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 228271746 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 10:12:54 AM UTC 24 |
| Finished | Sep 09 10:12:57 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600434887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.3600434887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.3271883839 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 147097315 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:12:54 AM UTC 24 |
| Finished | Sep 09 10:12:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3271883839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.3271883839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.4177674761 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 46579285 ps |
| CPU time | 1.05 seconds |
| Started | Sep 09 10:12:54 AM UTC 24 |
| Finished | Sep 09 10:12:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4177674761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.4177674761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.3525073208 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 21823185577 ps |
| CPU time | 66.51 seconds |
| Started | Sep 09 10:12:54 AM UTC 24 |
| Finished | Sep 09 10:14:03 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525073208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.3525073208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.901809867 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 157375347 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:12:54 AM UTC 24 |
| Finished | Sep 09 10:12:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901809867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_pkt_received.901809867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.2899343157 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 206099997 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:12:56 AM UTC 24 |
| Finished | Sep 09 10:12:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899343157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.2899343157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.302233068 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 186602257 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:12:56 AM UTC 24 |
| Finished | Sep 09 10:12:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=302233068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_random_length_in_transaction.302233068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.2100646591 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 239729637 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:12:56 AM UTC 24 |
| Finished | Sep 09 10:12:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100646591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.2100646591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.3845761874 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 166958927 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:12:56 AM UTC 24 |
| Finished | Sep 09 10:12:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845761874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_rx_crc_err.3845761874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.37161856 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 256308687 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:12:58 AM UTC 24 |
| Finished | Sep 09 10:13:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=37161856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_rx_full.37161856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.2766708081 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 150971125 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:12:58 AM UTC 24 |
| Finished | Sep 09 10:13:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766708081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.2766708081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.3043278854 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 142936857 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:12:58 AM UTC 24 |
| Finished | Sep 09 10:13:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3043278854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.3043278854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.765446079 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 251404446 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:12:58 AM UTC 24 |
| Finished | Sep 09 10:13:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=765446079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.765446079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.1958092259 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 1889716273 ps |
| CPU time | 52.87 seconds |
| Started | Sep 09 10:12:59 AM UTC 24 |
| Finished | Sep 09 10:13:54 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1958092259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.1958092259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.2861861184 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 153243295 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:12:59 AM UTC 24 |
| Finished | Sep 09 10:13:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861861184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.2861861184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.666100070 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 198461415 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:12:59 AM UTC 24 |
| Finished | Sep 09 10:13:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=666100070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_stall_trans.666100070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.1062108840 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 1187792568 ps |
| CPU time | 3.71 seconds |
| Started | Sep 09 10:13:01 AM UTC 24 |
| Finished | Sep 09 10:13:05 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1062108840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.1062108840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.3089886729 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 3987066430 ps |
| CPU time | 110.15 seconds |
| Started | Sep 09 10:13:01 AM UTC 24 |
| Finished | Sep 09 10:14:53 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089886729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.3089886729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.1796247923 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 1425179713 ps |
| CPU time | 33.08 seconds |
| Started | Sep 09 10:12:41 AM UTC 24 |
| Finished | Sep 09 10:13:15 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796247923 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.1796247923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.1368342740 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 680453601 ps |
| CPU time | 3 seconds |
| Started | Sep 09 10:13:01 AM UTC 24 |
| Finished | Sep 09 10:13:05 AM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1368342740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_t x_rx_disruption.1368342740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.2535110177 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 562751579 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:19:47 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2535110177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.2535110177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.2775793084 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 508383762 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:19:47 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2775793084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_ tx_rx_disruption.2775793084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.4024415808 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 485214752 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:19:47 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4024415808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_ tx_rx_disruption.4024415808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.895862995 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 455382356 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:19:47 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=895862995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_t x_rx_disruption.895862995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.1208175495 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 532500339 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:19:47 AM UTC 24 |
| Finished | Sep 09 10:19:50 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1208175495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.1208175495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.3225754736 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 532828252 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:19:48 AM UTC 24 |
| Finished | Sep 09 10:19:51 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3225754736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.3225754736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.3342829377 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 600776425 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:19:50 AM UTC 24 |
| Finished | Sep 09 10:19:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3342829377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_ tx_rx_disruption.3342829377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.1129177459 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 463225552 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1129177459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.1129177459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.2921373660 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 562624990 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2921373660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_ tx_rx_disruption.2921373660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.3655052528 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 650251889 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3655052528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_ tx_rx_disruption.3655052528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.3960362495 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 40409898 ps |
| CPU time | 0.91 seconds |
| Started | Sep 09 10:13:21 AM UTC 24 |
| Finished | Sep 09 10:13:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960362495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.3960362495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.1425892579 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 4602790420 ps |
| CPU time | 7.48 seconds |
| Started | Sep 09 10:13:02 AM UTC 24 |
| Finished | Sep 09 10:13:11 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1425892579 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.1425892579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.3215390511 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 14210106602 ps |
| CPU time | 17.79 seconds |
| Started | Sep 09 10:13:02 AM UTC 24 |
| Finished | Sep 09 10:13:21 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215390511 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.3215390511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.2584711453 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 31033601613 ps |
| CPU time | 43.68 seconds |
| Started | Sep 09 10:13:03 AM UTC 24 |
| Finished | Sep 09 10:13:48 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2584711453 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.2584711453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.825735840 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 153485516 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:13:03 AM UTC 24 |
| Finished | Sep 09 10:13:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825735840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_av_buffer.825735840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.359398489 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 152573379 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:13:03 AM UTC 24 |
| Finished | Sep 09 10:13:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=359398489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_bitstuff_err.359398489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.1144284166 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 292111933 ps |
| CPU time | 1.96 seconds |
| Started | Sep 09 10:13:03 AM UTC 24 |
| Finished | Sep 09 10:13:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144284166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_data_toggle_clear.1144284166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.2336845392 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 470180731 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:13:03 AM UTC 24 |
| Finished | Sep 09 10:13:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2336845392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.2336845392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.3245371833 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 25117233187 ps |
| CPU time | 44.88 seconds |
| Started | Sep 09 10:13:03 AM UTC 24 |
| Finished | Sep 09 10:13:49 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245371833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.3245371833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.3230798313 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 460844925 ps |
| CPU time | 8.65 seconds |
| Started | Sep 09 10:13:03 AM UTC 24 |
| Finished | Sep 09 10:13:13 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230798313 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.3230798313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.1385392015 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 862915375 ps |
| CPU time | 3 seconds |
| Started | Sep 09 10:13:03 AM UTC 24 |
| Finished | Sep 09 10:13:07 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385392015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.1385392015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.4009551915 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 146985106 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:13:04 AM UTC 24 |
| Finished | Sep 09 10:13:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4009551915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.4009551915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_enable.2837803006 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 51604678 ps |
| CPU time | 0.86 seconds |
| Started | Sep 09 10:13:04 AM UTC 24 |
| Finished | Sep 09 10:13:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2837803006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_enable.2837803006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.3554043217 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 859285352 ps |
| CPU time | 2.57 seconds |
| Started | Sep 09 10:13:06 AM UTC 24 |
| Finished | Sep 09 10:13:10 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3554043217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.3554043217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.2078813757 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 482380466 ps |
| CPU time | 2.76 seconds |
| Started | Sep 09 10:13:06 AM UTC 24 |
| Finished | Sep 09 10:13:10 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078813757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.2078813757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.1700819694 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 289616294 ps |
| CPU time | 1.93 seconds |
| Started | Sep 09 10:13:06 AM UTC 24 |
| Finished | Sep 09 10:13:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700819694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_fifo_levels.1700819694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.934052817 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 315922676 ps |
| CPU time | 2.77 seconds |
| Started | Sep 09 10:13:06 AM UTC 24 |
| Finished | Sep 09 10:13:10 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=934052817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_fifo_rst.934052817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.177572504 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 165217444 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:13:06 AM UTC 24 |
| Finished | Sep 09 10:13:09 AM UTC 24 |
| Peak memory | 227368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=177572504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.177572504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.1951455961 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 143391522 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:13:08 AM UTC 24 |
| Finished | Sep 09 10:13:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1951455961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.1951455961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.3366088241 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 234147641 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:13:08 AM UTC 24 |
| Finished | Sep 09 10:13:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3366088241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_trans.3366088241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.2308215359 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 4712979579 ps |
| CPU time | 46.33 seconds |
| Started | Sep 09 10:13:06 AM UTC 24 |
| Finished | Sep 09 10:13:54 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308215359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.2308215359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.1735692188 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 10368134653 ps |
| CPU time | 108.6 seconds |
| Started | Sep 09 10:13:08 AM UTC 24 |
| Finished | Sep 09 10:14:58 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1735692188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.1735692188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.1701280793 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 215530029 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:13:08 AM UTC 24 |
| Finished | Sep 09 10:13:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1701280793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.1701280793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.3772859338 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 8559900967 ps |
| CPU time | 12.47 seconds |
| Started | Sep 09 10:13:08 AM UTC 24 |
| Finished | Sep 09 10:13:21 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772859338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.3772859338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.263032489 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 8817008367 ps |
| CPU time | 12.85 seconds |
| Started | Sep 09 10:13:08 AM UTC 24 |
| Finished | Sep 09 10:13:22 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=263032489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_suspend.263032489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.901705998 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 3338790097 ps |
| CPU time | 87.98 seconds |
| Started | Sep 09 10:13:09 AM UTC 24 |
| Finished | Sep 09 10:14:39 AM UTC 24 |
| Peak memory | 234112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=901705998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.901705998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.4291900527 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 2949323807 ps |
| CPU time | 29.29 seconds |
| Started | Sep 09 10:13:09 AM UTC 24 |
| Finished | Sep 09 10:13:40 AM UTC 24 |
| Peak memory | 234292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291900527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.4291900527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.1053157195 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 244436808 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:13:12 AM UTC 24 |
| Finished | Sep 09 10:13:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053157195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.1053157195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.2881516290 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 197917036 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:13:12 AM UTC 24 |
| Finished | Sep 09 10:13:14 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881516290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.2881516290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.4228778139 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 2978561831 ps |
| CPU time | 75.79 seconds |
| Started | Sep 09 10:13:12 AM UTC 24 |
| Finished | Sep 09 10:14:29 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4228778139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.4228778139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.3902621764 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 170227665 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:13:12 AM UTC 24 |
| Finished | Sep 09 10:13:14 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3902621764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.3902621764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.3469479233 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 156122084 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:13:12 AM UTC 24 |
| Finished | Sep 09 10:13:14 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469479233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.3469479233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.37223185 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 216158479 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:13:12 AM UTC 24 |
| Finished | Sep 09 10:13:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=37223185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_nak_trans.37223185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.1898947606 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 175451794 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:13:12 AM UTC 24 |
| Finished | Sep 09 10:13:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1898947606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.1898947606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.1727137962 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 237035359 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:13:12 AM UTC 24 |
| Finished | Sep 09 10:13:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1727137962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.1727137962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.1595181625 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 166426877 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:13:13 AM UTC 24 |
| Finished | Sep 09 10:13:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595181625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_out_trans_nak.1595181625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.1559449924 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 152485655 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:13:13 AM UTC 24 |
| Finished | Sep 09 10:13:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559449924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.1559449924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.14318089 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 287645827 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:13:13 AM UTC 24 |
| Finished | Sep 09 10:13:16 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=14318089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.14318089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.2008010239 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 142178613 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:13:15 AM UTC 24 |
| Finished | Sep 09 10:13:17 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008010239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.2008010239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.270157795 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 42579801 ps |
| CPU time | 0.92 seconds |
| Started | Sep 09 10:13:15 AM UTC 24 |
| Finished | Sep 09 10:13:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270157795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_phy_pins_sense.270157795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.3506516173 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 7601285900 ps |
| CPU time | 19.79 seconds |
| Started | Sep 09 10:13:15 AM UTC 24 |
| Finished | Sep 09 10:13:36 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506516173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.3506516173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.306944700 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 186637809 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:13:16 AM UTC 24 |
| Finished | Sep 09 10:13:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=306944700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_pkt_received.306944700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.1620910484 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 193449509 ps |
| CPU time | 1.01 seconds |
| Started | Sep 09 10:13:16 AM UTC 24 |
| Finished | Sep 09 10:13:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620910484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.1620910484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.3256366001 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 227181562 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:13:17 AM UTC 24 |
| Finished | Sep 09 10:13:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256366001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.3256366001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.3576801252 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 220280992 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:13:17 AM UTC 24 |
| Finished | Sep 09 10:13:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576801252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.3576801252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.3142564198 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 132894108 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:13:17 AM UTC 24 |
| Finished | Sep 09 10:13:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142564198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.3142564198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.2688666128 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 436125632 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:13:17 AM UTC 24 |
| Finished | Sep 09 10:13:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688666128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.2688666128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.851157428 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 146808581 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:13:17 AM UTC 24 |
| Finished | Sep 09 10:13:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=851157428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_setup_stage.851157428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.2568982582 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 200940774 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:13:17 AM UTC 24 |
| Finished | Sep 09 10:13:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2568982582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.2568982582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.2622719930 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 272068821 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:13:17 AM UTC 24 |
| Finished | Sep 09 10:13:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622719930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.2622719930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.4117392890 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 2524067115 ps |
| CPU time | 62.65 seconds |
| Started | Sep 09 10:13:19 AM UTC 24 |
| Finished | Sep 09 10:14:23 AM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117392890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.4117392890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.33925280 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 178488868 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:13:19 AM UTC 24 |
| Finished | Sep 09 10:13:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33925280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.33925280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.1062796443 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 179075287 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:13:19 AM UTC 24 |
| Finished | Sep 09 10:13:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1062796443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.1062796443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.2802549348 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 267564337 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:13:19 AM UTC 24 |
| Finished | Sep 09 10:13:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802549348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.2802549348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.1694231470 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 2502316354 ps |
| CPU time | 22.09 seconds |
| Started | Sep 09 10:13:19 AM UTC 24 |
| Finished | Sep 09 10:13:42 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694231470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.1694231470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.842871303 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 840610715 ps |
| CPU time | 5.81 seconds |
| Started | Sep 09 10:13:03 AM UTC 24 |
| Finished | Sep 09 10:13:10 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=842871303 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.842871303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.330877978 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 600096110 ps |
| CPU time | 2.57 seconds |
| Started | Sep 09 10:13:19 AM UTC 24 |
| Finished | Sep 09 10:13:23 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=330877978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_tx _rx_disruption.330877978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.61540853 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 599073414 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=61540853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_tx _rx_disruption.61540853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.2775816364 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 573763191 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2775816364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_ tx_rx_disruption.2775816364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.127744838 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 445632230 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=127744838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_t x_rx_disruption.127744838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.1568760161 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 551344080 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1568760161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_ tx_rx_disruption.1568760161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.419639594 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 544040502 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=419639594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_t x_rx_disruption.419639594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.1326517773 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 605753024 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1326517773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.1326517773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.4274963182 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 450225431 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4274963182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.4274963182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.3437621729 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 505328429 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3437621729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.3437621729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.3975053240 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 612047131 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3975053240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.3975053240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.796260256 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 586476832 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=796260256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_t x_rx_disruption.796260256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.3262002409 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 55807713 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 10:13:38 AM UTC 24 |
| Finished | Sep 09 10:13:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262002409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.3262002409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.577216829 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 10713817620 ps |
| CPU time | 17.95 seconds |
| Started | Sep 09 10:13:21 AM UTC 24 |
| Finished | Sep 09 10:13:40 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=577216829 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.577216829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.2785874184 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 19642303448 ps |
| CPU time | 26.24 seconds |
| Started | Sep 09 10:13:21 AM UTC 24 |
| Finished | Sep 09 10:13:49 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785874184 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.2785874184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.464919933 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 29596715394 ps |
| CPU time | 43.29 seconds |
| Started | Sep 09 10:13:21 AM UTC 24 |
| Finished | Sep 09 10:14:06 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=464919933 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.464919933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.698574457 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 174127348 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:13:21 AM UTC 24 |
| Finished | Sep 09 10:13:23 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698574457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_av_buffer.698574457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.4218772830 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 144029390 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:13:21 AM UTC 24 |
| Finished | Sep 09 10:13:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4218772830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.4218772830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.3894485826 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 212010687 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:13:21 AM UTC 24 |
| Finished | Sep 09 10:13:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894485826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.3894485826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.913496964 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 284504905 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:13:21 AM UTC 24 |
| Finished | Sep 09 10:13:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=913496964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.913496964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.635299906 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 15473155326 ps |
| CPU time | 29.67 seconds |
| Started | Sep 09 10:13:23 AM UTC 24 |
| Finished | Sep 09 10:13:54 AM UTC 24 |
| Peak memory | 217460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=635299906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_device_address.635299906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.1140811854 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 846087599 ps |
| CPU time | 17.6 seconds |
| Started | Sep 09 10:13:23 AM UTC 24 |
| Finished | Sep 09 10:13:42 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140811854 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.1140811854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.2301580078 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 1024600791 ps |
| CPU time | 2.88 seconds |
| Started | Sep 09 10:13:23 AM UTC 24 |
| Finished | Sep 09 10:13:27 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301580078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.2301580078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.556154195 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 145767287 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:13:23 AM UTC 24 |
| Finished | Sep 09 10:13:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=556154195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_disconnected.556154195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_enable.196894426 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 35131091 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:13:23 AM UTC 24 |
| Finished | Sep 09 10:13:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=196894426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_enable.196894426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.1723713304 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 830312989 ps |
| CPU time | 4.1 seconds |
| Started | Sep 09 10:13:23 AM UTC 24 |
| Finished | Sep 09 10:13:28 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723713304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.1723713304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.3360123526 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 626234576 ps |
| CPU time | 2.72 seconds |
| Started | Sep 09 10:13:24 AM UTC 24 |
| Finished | Sep 09 10:13:28 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360123526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.3360123526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.347826127 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 463732659 ps |
| CPU time | 4.79 seconds |
| Started | Sep 09 10:13:25 AM UTC 24 |
| Finished | Sep 09 10:13:31 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347826127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_fifo_rst.347826127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.3056726671 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 187134006 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:13:25 AM UTC 24 |
| Finished | Sep 09 10:13:27 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3056726671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.3056726671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.40077485 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 163537780 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:13:25 AM UTC 24 |
| Finished | Sep 09 10:13:27 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40077485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_in_stall.40077485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.2719810296 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 197362163 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:13:25 AM UTC 24 |
| Finished | Sep 09 10:13:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719810296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_trans.2719810296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.1312455045 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 3678636778 ps |
| CPU time | 35.91 seconds |
| Started | Sep 09 10:13:25 AM UTC 24 |
| Finished | Sep 09 10:14:02 AM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312455045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.1312455045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.4171720902 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 5382650233 ps |
| CPU time | 34.59 seconds |
| Started | Sep 09 10:13:25 AM UTC 24 |
| Finished | Sep 09 10:14:01 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4171720902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.4171720902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.1413427759 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 201859628 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:13:25 AM UTC 24 |
| Finished | Sep 09 10:13:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1413427759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_in_err.1413427759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.2356572261 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 8600174076 ps |
| CPU time | 15.96 seconds |
| Started | Sep 09 10:13:26 AM UTC 24 |
| Finished | Sep 09 10:13:43 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356572261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.2356572261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.1707249757 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 6134673623 ps |
| CPU time | 12.19 seconds |
| Started | Sep 09 10:13:26 AM UTC 24 |
| Finished | Sep 09 10:13:40 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1707249757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.1707249757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.4087948041 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 4385957603 ps |
| CPU time | 43.92 seconds |
| Started | Sep 09 10:13:26 AM UTC 24 |
| Finished | Sep 09 10:14:12 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4087948041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.4087948041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.3883645114 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 2836756630 ps |
| CPU time | 23.13 seconds |
| Started | Sep 09 10:13:27 AM UTC 24 |
| Finished | Sep 09 10:13:52 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883645114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.3883645114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.920910394 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 232925834 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:13:27 AM UTC 24 |
| Finished | Sep 09 10:13:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=920910394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.920910394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.3411597059 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 190666642 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:13:29 AM UTC 24 |
| Finished | Sep 09 10:13:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3411597059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.3411597059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.1314571474 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 2546690173 ps |
| CPU time | 21.67 seconds |
| Started | Sep 09 10:13:29 AM UTC 24 |
| Finished | Sep 09 10:13:52 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1314571474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.1314571474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.3898658552 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 202227541 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:13:29 AM UTC 24 |
| Finished | Sep 09 10:13:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898658552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.3898658552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.4261480154 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 160823792 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:13:30 AM UTC 24 |
| Finished | Sep 09 10:13:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261480154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.4261480154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.2269661545 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 187615790 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:13:30 AM UTC 24 |
| Finished | Sep 09 10:13:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269661545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.2269661545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.3861293587 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 172937506 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:13:30 AM UTC 24 |
| Finished | Sep 09 10:13:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861293587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_out_iso.3861293587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.1687054846 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 161605597 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:13:30 AM UTC 24 |
| Finished | Sep 09 10:13:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687054846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_out_stall.1687054846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.3617947269 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 177079675 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:13:30 AM UTC 24 |
| Finished | Sep 09 10:13:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617947269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.3617947269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.536037884 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 145770338 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:13:31 AM UTC 24 |
| Finished | Sep 09 10:13:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=536037884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pending_in_trans.536037884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.1118224782 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 230245626 ps |
| CPU time | 1.84 seconds |
| Started | Sep 09 10:13:31 AM UTC 24 |
| Finished | Sep 09 10:13:34 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118224782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.1118224782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.4276949991 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 181626710 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:13:32 AM UTC 24 |
| Finished | Sep 09 10:13:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276949991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.4276949991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.3173146067 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 102522660 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:13:32 AM UTC 24 |
| Finished | Sep 09 10:13:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3173146067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.3173146067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.2321216071 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 16798880911 ps |
| CPU time | 51.12 seconds |
| Started | Sep 09 10:13:33 AM UTC 24 |
| Finished | Sep 09 10:14:25 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321216071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_pkt_buffer.2321216071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.1114245915 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 212494818 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:13:33 AM UTC 24 |
| Finished | Sep 09 10:13:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114245915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.1114245915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.3284370972 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 219238603 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:13:33 AM UTC 24 |
| Finished | Sep 09 10:13:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3284370972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.3284370972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.2272349063 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 173891555 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:13:34 AM UTC 24 |
| Finished | Sep 09 10:13:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2272349063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.2272349063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.2308226274 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 165700593 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:13:34 AM UTC 24 |
| Finished | Sep 09 10:13:37 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308226274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.2308226274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.3391857781 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 185035880 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:13:34 AM UTC 24 |
| Finished | Sep 09 10:13:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391857781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_rx_crc_err.3391857781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.1664719686 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 263414251 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:13:34 AM UTC 24 |
| Finished | Sep 09 10:13:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664719686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.1664719686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.1577044656 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 150957472 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:13:35 AM UTC 24 |
| Finished | Sep 09 10:13:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577044656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.1577044656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.250162837 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 147456399 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:13:35 AM UTC 24 |
| Finished | Sep 09 10:13:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=250162837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 35.usbdev_setup_trans_ignored.250162837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.3550869768 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 238228297 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 10:13:35 AM UTC 24 |
| Finished | Sep 09 10:13:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3550869768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.3550869768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.4247926547 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 3061301869 ps |
| CPU time | 85.4 seconds |
| Started | Sep 09 10:13:36 AM UTC 24 |
| Finished | Sep 09 10:15:03 AM UTC 24 |
| Peak memory | 229804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247926547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.4247926547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.3729592708 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 152875268 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:13:36 AM UTC 24 |
| Finished | Sep 09 10:13:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729592708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.3729592708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.4056605866 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 162960997 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:13:36 AM UTC 24 |
| Finished | Sep 09 10:13:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4056605866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_stall_trans.4056605866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.3737083705 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 335568698 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:13:38 AM UTC 24 |
| Finished | Sep 09 10:13:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737083705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.3737083705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.707588972 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 2218133374 ps |
| CPU time | 22.55 seconds |
| Started | Sep 09 10:13:36 AM UTC 24 |
| Finished | Sep 09 10:14:00 AM UTC 24 |
| Peak memory | 227564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=707588972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_streaming_out.707588972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.1523025445 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 1343841001 ps |
| CPU time | 9.41 seconds |
| Started | Sep 09 10:13:23 AM UTC 24 |
| Finished | Sep 09 10:13:33 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523025445 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.1523025445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.1710169887 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 626726054 ps |
| CPU time | 1.92 seconds |
| Started | Sep 09 10:13:38 AM UTC 24 |
| Finished | Sep 09 10:13:41 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1710169887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_t x_rx_disruption.1710169887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.665810369 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 495090998 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=665810369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_t x_rx_disruption.665810369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.1047494410 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 539319829 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1047494410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_ tx_rx_disruption.1047494410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.3263783501 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 580008987 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3263783501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.3263783501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.381823885 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 606817241 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=381823885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_t x_rx_disruption.381823885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.1290654903 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 611271443 ps |
| CPU time | 1.84 seconds |
| Started | Sep 09 10:19:52 AM UTC 24 |
| Finished | Sep 09 10:19:56 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1290654903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.1290654903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.2282146050 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 588839657 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:53 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2282146050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_ tx_rx_disruption.2282146050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.564710337 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 585174662 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:19:53 AM UTC 24 |
| Finished | Sep 09 10:19:56 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=564710337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_t x_rx_disruption.564710337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.4291333182 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 457409042 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:19:53 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 214828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4291333182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.4291333182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.104741767 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 488954988 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:19:53 AM UTC 24 |
| Finished | Sep 09 10:19:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=104741767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_t x_rx_disruption.104741767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.3110153669 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 484933035 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3110153669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_ tx_rx_disruption.3110153669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.1052196056 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 106778516 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:13:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052196056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.1052196056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.3375458575 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 6203802093 ps |
| CPU time | 9.55 seconds |
| Started | Sep 09 10:13:38 AM UTC 24 |
| Finished | Sep 09 10:13:49 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3375458575 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.3375458575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.3252772215 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 21079497264 ps |
| CPU time | 27.53 seconds |
| Started | Sep 09 10:13:38 AM UTC 24 |
| Finished | Sep 09 10:14:07 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252772215 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.3252772215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.3283136366 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 30932473861 ps |
| CPU time | 43.49 seconds |
| Started | Sep 09 10:13:38 AM UTC 24 |
| Finished | Sep 09 10:14:23 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283136366 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.3283136366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.1434845950 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 162789626 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:13:38 AM UTC 24 |
| Finished | Sep 09 10:13:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434845950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.1434845950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.3542613748 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 160160201 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:13:38 AM UTC 24 |
| Finished | Sep 09 10:13:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542613748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_bitstuff_err.3542613748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.1800501415 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 360635434 ps |
| CPU time | 2.24 seconds |
| Started | Sep 09 10:13:38 AM UTC 24 |
| Finished | Sep 09 10:13:42 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800501415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.1800501415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.3523485797 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 562067115 ps |
| CPU time | 2.27 seconds |
| Started | Sep 09 10:13:40 AM UTC 24 |
| Finished | Sep 09 10:13:43 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523485797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.3523485797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.3589539362 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 13721115480 ps |
| CPU time | 27.27 seconds |
| Started | Sep 09 10:13:40 AM UTC 24 |
| Finished | Sep 09 10:14:08 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589539362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.3589539362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.2309402120 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 2057858289 ps |
| CPU time | 16.39 seconds |
| Started | Sep 09 10:13:41 AM UTC 24 |
| Finished | Sep 09 10:13:59 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309402120 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.2309402120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.3784658781 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 860423325 ps |
| CPU time | 3.15 seconds |
| Started | Sep 09 10:13:41 AM UTC 24 |
| Finished | Sep 09 10:13:45 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3784658781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.3784658781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.2050859006 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 153773492 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:13:41 AM UTC 24 |
| Finished | Sep 09 10:13:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050859006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_disconnected.2050859006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_enable.1320976192 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 34050530 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:13:41 AM UTC 24 |
| Finished | Sep 09 10:13:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320976192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.1320976192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.1252531291 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 793068969 ps |
| CPU time | 3.26 seconds |
| Started | Sep 09 10:13:41 AM UTC 24 |
| Finished | Sep 09 10:13:46 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252531291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.1252531291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.3592303816 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 542116931 ps |
| CPU time | 1.93 seconds |
| Started | Sep 09 10:13:42 AM UTC 24 |
| Finished | Sep 09 10:13:44 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592303816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.3592303816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.2283733001 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 199028400 ps |
| CPU time | 4.03 seconds |
| Started | Sep 09 10:13:43 AM UTC 24 |
| Finished | Sep 09 10:13:48 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283733001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.2283733001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.3472522745 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 146942050 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:13:43 AM UTC 24 |
| Finished | Sep 09 10:13:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472522745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.3472522745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.4208458675 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 152417489 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:13:43 AM UTC 24 |
| Finished | Sep 09 10:13:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208458675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.4208458675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.2777175082 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 202508858 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:13:43 AM UTC 24 |
| Finished | Sep 09 10:13:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777175082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.2777175082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.3976829227 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 2624791617 ps |
| CPU time | 25.71 seconds |
| Started | Sep 09 10:13:43 AM UTC 24 |
| Finished | Sep 09 10:14:10 AM UTC 24 |
| Peak memory | 229788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976829227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.3976829227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.357590042 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 7016852679 ps |
| CPU time | 77.37 seconds |
| Started | Sep 09 10:13:45 AM UTC 24 |
| Finished | Sep 09 10:15:04 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=357590042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.357590042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.428174960 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 242617435 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:13:45 AM UTC 24 |
| Finished | Sep 09 10:13:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=428174960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_link_in_err.428174960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.2050695535 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 12581468033 ps |
| CPU time | 23.65 seconds |
| Started | Sep 09 10:13:45 AM UTC 24 |
| Finished | Sep 09 10:14:10 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050695535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_resume.2050695535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.2773542034 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 5055028987 ps |
| CPU time | 13.13 seconds |
| Started | Sep 09 10:13:45 AM UTC 24 |
| Finished | Sep 09 10:13:59 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773542034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.2773542034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.3269325751 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 2622860356 ps |
| CPU time | 21.21 seconds |
| Started | Sep 09 10:13:45 AM UTC 24 |
| Finished | Sep 09 10:14:07 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269325751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.3269325751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.1521726057 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 1871750835 ps |
| CPU time | 19.31 seconds |
| Started | Sep 09 10:13:45 AM UTC 24 |
| Finished | Sep 09 10:14:05 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521726057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.1521726057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.2776533443 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 239054937 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 10:13:46 AM UTC 24 |
| Finished | Sep 09 10:13:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776533443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.2776533443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.2603313215 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 207664369 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:13:46 AM UTC 24 |
| Finished | Sep 09 10:13:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603313215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.2603313215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.3992284886 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 1551576440 ps |
| CPU time | 40.01 seconds |
| Started | Sep 09 10:13:46 AM UTC 24 |
| Finished | Sep 09 10:14:28 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992284886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.3992284886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.858461644 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 150106259 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:13:47 AM UTC 24 |
| Finished | Sep 09 10:13:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=858461644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.858461644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.245704859 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 169908301 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:13:47 AM UTC 24 |
| Finished | Sep 09 10:13:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=245704859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.245704859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.3997779671 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 182228309 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:13:47 AM UTC 24 |
| Finished | Sep 09 10:13:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3997779671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.3997779671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.3065474162 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 165654858 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:13:48 AM UTC 24 |
| Finished | Sep 09 10:13:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3065474162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.3065474162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.4152819376 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 232092196 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:13:48 AM UTC 24 |
| Finished | Sep 09 10:13:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152819376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_out_stall.4152819376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.350257833 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 225302303 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:13:49 AM UTC 24 |
| Finished | Sep 09 10:13:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=350257833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_out_trans_nak.350257833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.108707836 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 151438638 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:13:49 AM UTC 24 |
| Finished | Sep 09 10:13:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108707836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pending_in_trans.108707836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.1193528768 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 213548198 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:13:49 AM UTC 24 |
| Finished | Sep 09 10:13:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193528768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.1193528768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.617040859 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 146941701 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:13:51 AM UTC 24 |
| Finished | Sep 09 10:13:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=617040859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.617040859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.3044375593 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 53322229 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:13:51 AM UTC 24 |
| Finished | Sep 09 10:13:53 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044375593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.3044375593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.1183105565 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 14986124220 ps |
| CPU time | 47.52 seconds |
| Started | Sep 09 10:13:51 AM UTC 24 |
| Finished | Sep 09 10:14:40 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1183105565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.1183105565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.2151885149 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 180932205 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:13:51 AM UTC 24 |
| Finished | Sep 09 10:13:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151885149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.2151885149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.936325887 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 174686068 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:13:51 AM UTC 24 |
| Finished | Sep 09 10:13:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=936325887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_pkt_sent.936325887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.3434991845 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 181759616 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:13:51 AM UTC 24 |
| Finished | Sep 09 10:13:54 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434991845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.3434991845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.709026179 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 191398997 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:13:51 AM UTC 24 |
| Finished | Sep 09 10:13:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709026179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.709026179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.3081433499 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 178537755 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:13:51 AM UTC 24 |
| Finished | Sep 09 10:13:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081433499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.3081433499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.1286553765 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 335112248 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:13:51 AM UTC 24 |
| Finished | Sep 09 10:13:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286553765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_rx_full.1286553765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.903878200 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 155320553 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:13:53 AM UTC 24 |
| Finished | Sep 09 10:13:55 AM UTC 24 |
| Peak memory | 214820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=903878200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_setup_stage.903878200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.966495570 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 162768786 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:13:53 AM UTC 24 |
| Finished | Sep 09 10:13:55 AM UTC 24 |
| Peak memory | 214772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=966495570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 36.usbdev_setup_trans_ignored.966495570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.1246011553 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 216630246 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:13:53 AM UTC 24 |
| Finished | Sep 09 10:13:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1246011553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.1246011553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.2538211746 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 2314762176 ps |
| CPU time | 60.99 seconds |
| Started | Sep 09 10:13:53 AM UTC 24 |
| Finished | Sep 09 10:14:56 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2538211746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.2538211746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.2198735638 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 161614329 ps |
| CPU time | 1.01 seconds |
| Started | Sep 09 10:13:53 AM UTC 24 |
| Finished | Sep 09 10:13:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198735638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.2198735638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.2774306625 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 166949354 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:13:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774306625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.2774306625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.3759107294 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 803857313 ps |
| CPU time | 2.35 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:13:58 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759107294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.3759107294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.2026623348 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 2607245110 ps |
| CPU time | 20.71 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:14:17 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2026623348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_streaming_out.2026623348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.1919568667 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 1140771778 ps |
| CPU time | 9.05 seconds |
| Started | Sep 09 10:13:41 AM UTC 24 |
| Finished | Sep 09 10:13:51 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1919568667 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.1919568667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.1278002640 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 570646697 ps |
| CPU time | 3 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:13:59 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1278002640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_t x_rx_disruption.1278002640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.1351369918 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 672360389 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:58 AM UTC 24 |
| Peak memory | 214736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1351369918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_ tx_rx_disruption.1351369918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.2223881284 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 512879436 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2223881284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.2223881284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.2386912366 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 482589668 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2386912366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.2386912366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.4171669271 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 446196319 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4171669271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_ tx_rx_disruption.4171669271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.1854068041 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 594607702 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1854068041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_ tx_rx_disruption.1854068041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.968643612 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 547740870 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:58 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=968643612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_t x_rx_disruption.968643612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.2872856521 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 596032102 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2872856521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_ tx_rx_disruption.2872856521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.345045675 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 447523247 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=345045675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_t x_rx_disruption.345045675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.2138381452 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 501821520 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2138381452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.2138381452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.4245141129 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 589945183 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4245141129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.4245141129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.4063866206 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 46900065 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:14:11 AM UTC 24 |
| Finished | Sep 09 10:14:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063866206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.4063866206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.377170345 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 6406628465 ps |
| CPU time | 8.82 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:14:05 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=377170345 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.377170345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.2779582272 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 20373526661 ps |
| CPU time | 43.13 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:14:40 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779582272 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.2779582272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.3687598709 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 31418070840 ps |
| CPU time | 47.63 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:14:44 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687598709 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.3687598709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.154190535 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 175228226 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:13:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=154190535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_av_buffer.154190535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.2730358319 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 152388972 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:13:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730358319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.2730358319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.1952672788 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 441102231 ps |
| CPU time | 2.54 seconds |
| Started | Sep 09 10:13:55 AM UTC 24 |
| Finished | Sep 09 10:13:59 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952672788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.1952672788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.917642625 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 1095455378 ps |
| CPU time | 3.12 seconds |
| Started | Sep 09 10:13:57 AM UTC 24 |
| Finished | Sep 09 10:14:01 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=917642625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.917642625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.483445760 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 49665994791 ps |
| CPU time | 87.92 seconds |
| Started | Sep 09 10:13:57 AM UTC 24 |
| Finished | Sep 09 10:15:26 AM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=483445760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_device_address.483445760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.924495600 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 1515780039 ps |
| CPU time | 16.7 seconds |
| Started | Sep 09 10:13:57 AM UTC 24 |
| Finished | Sep 09 10:14:14 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=924495600 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.924495600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.3114222376 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 640231322 ps |
| CPU time | 2.04 seconds |
| Started | Sep 09 10:13:57 AM UTC 24 |
| Finished | Sep 09 10:14:00 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114222376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_disable_endpoint.3114222376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.2896672395 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 137020199 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:13:57 AM UTC 24 |
| Finished | Sep 09 10:13:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896672395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.2896672395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_enable.667941666 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 70754488 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:13:58 AM UTC 24 |
| Finished | Sep 09 10:14:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=667941666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_enable.667941666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.3009849967 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 971683923 ps |
| CPU time | 2.81 seconds |
| Started | Sep 09 10:13:58 AM UTC 24 |
| Finished | Sep 09 10:14:02 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3009849967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.3009849967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.2255107377 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 565773748 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:13:58 AM UTC 24 |
| Finished | Sep 09 10:14:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2255107377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.2255107377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.3415826237 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 328479877 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 10:13:58 AM UTC 24 |
| Finished | Sep 09 10:14:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3415826237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_fifo_levels.3415826237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.1085516915 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 394720693 ps |
| CPU time | 3.16 seconds |
| Started | Sep 09 10:13:58 AM UTC 24 |
| Finished | Sep 09 10:14:03 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1085516915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.1085516915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.2096427123 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 189968339 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:14:00 AM UTC 24 |
| Finished | Sep 09 10:14:03 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096427123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.2096427123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.3641665187 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 145689502 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:14:00 AM UTC 24 |
| Finished | Sep 09 10:14:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641665187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.3641665187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.2755530792 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 195370126 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:14:00 AM UTC 24 |
| Finished | Sep 09 10:14:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2755530792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.2755530792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.3319466733 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 3746426494 ps |
| CPU time | 28.71 seconds |
| Started | Sep 09 10:14:00 AM UTC 24 |
| Finished | Sep 09 10:14:30 AM UTC 24 |
| Peak memory | 234308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3319466733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.3319466733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.589419831 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 12525035764 ps |
| CPU time | 96.86 seconds |
| Started | Sep 09 10:14:00 AM UTC 24 |
| Finished | Sep 09 10:15:39 AM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=589419831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.589419831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.2451705601 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 192582413 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:14:00 AM UTC 24 |
| Finished | Sep 09 10:14:02 AM UTC 24 |
| Peak memory | 214868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451705601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.2451705601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.4144079550 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 11163905152 ps |
| CPU time | 19.92 seconds |
| Started | Sep 09 10:14:02 AM UTC 24 |
| Finished | Sep 09 10:14:23 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144079550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.4144079550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.3701271709 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 9826968175 ps |
| CPU time | 14.66 seconds |
| Started | Sep 09 10:14:02 AM UTC 24 |
| Finished | Sep 09 10:14:17 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701271709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_link_suspend.3701271709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.2225165342 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 4714625212 ps |
| CPU time | 35.28 seconds |
| Started | Sep 09 10:14:02 AM UTC 24 |
| Finished | Sep 09 10:14:38 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2225165342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.2225165342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.2385623189 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 2662211104 ps |
| CPU time | 21.24 seconds |
| Started | Sep 09 10:14:02 AM UTC 24 |
| Finished | Sep 09 10:14:24 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2385623189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.2385623189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.459156489 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 242059612 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:14:02 AM UTC 24 |
| Finished | Sep 09 10:14:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=459156489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.459156489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.75093735 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 250870509 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:14:02 AM UTC 24 |
| Finished | Sep 09 10:14:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=75093735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.75093735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.1627576394 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 2225703212 ps |
| CPU time | 58.5 seconds |
| Started | Sep 09 10:14:02 AM UTC 24 |
| Finished | Sep 09 10:15:02 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1627576394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.1627576394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.710928840 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 158745801 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:14:03 AM UTC 24 |
| Finished | Sep 09 10:14:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=710928840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.710928840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.1584018866 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 144671774 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:14:03 AM UTC 24 |
| Finished | Sep 09 10:14:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584018866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.1584018866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.1390496127 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 164669297 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:14:03 AM UTC 24 |
| Finished | Sep 09 10:14:06 AM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390496127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.1390496127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.784415733 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 203236260 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:14:03 AM UTC 24 |
| Finished | Sep 09 10:14:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=784415733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_out_iso.784415733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.4184526957 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 185020447 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:14:03 AM UTC 24 |
| Finished | Sep 09 10:14:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4184526957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_out_stall.4184526957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.193499594 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 171630816 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:14:03 AM UTC 24 |
| Finished | Sep 09 10:14:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=193499594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_out_trans_nak.193499594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.89317111 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 152094795 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:14:04 AM UTC 24 |
| Finished | Sep 09 10:14:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=89317111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pending_in_trans.89317111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.1022539551 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 232089417 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:14:05 AM UTC 24 |
| Finished | Sep 09 10:14:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022539551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.1022539551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.283592423 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 190277448 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:14:05 AM UTC 24 |
| Finished | Sep 09 10:14:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=283592423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.283592423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.1280028957 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 29853006 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:14:05 AM UTC 24 |
| Finished | Sep 09 10:14:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280028957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.1280028957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.3550780651 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 8145447766 ps |
| CPU time | 25.42 seconds |
| Started | Sep 09 10:14:06 AM UTC 24 |
| Finished | Sep 09 10:14:32 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3550780651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_pkt_buffer.3550780651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.398545666 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 183903972 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:14:07 AM UTC 24 |
| Finished | Sep 09 10:14:09 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=398545666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_pkt_received.398545666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.2648642107 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 204097415 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:14:07 AM UTC 24 |
| Finished | Sep 09 10:14:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648642107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.2648642107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.3074690069 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 223981274 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:14:07 AM UTC 24 |
| Finished | Sep 09 10:14:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3074690069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_random_length_in_transaction.3074690069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.3996768503 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 211096398 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:14:07 AM UTC 24 |
| Finished | Sep 09 10:14:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3996768503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.3996768503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.2882478339 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 140630237 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:14:07 AM UTC 24 |
| Finished | Sep 09 10:14:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2882478339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.2882478339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.4281385641 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 346217780 ps |
| CPU time | 2.07 seconds |
| Started | Sep 09 10:14:07 AM UTC 24 |
| Finished | Sep 09 10:14:10 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281385641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.4281385641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.2055260826 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 160891759 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:14:07 AM UTC 24 |
| Finished | Sep 09 10:14:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055260826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.2055260826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.497297685 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 142273799 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:14:07 AM UTC 24 |
| Finished | Sep 09 10:14:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=497297685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 37.usbdev_setup_trans_ignored.497297685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.191626554 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 236909616 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:14:07 AM UTC 24 |
| Finished | Sep 09 10:14:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=191626554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.191626554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.1072940563 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 3272911816 ps |
| CPU time | 23.05 seconds |
| Started | Sep 09 10:14:09 AM UTC 24 |
| Finished | Sep 09 10:14:33 AM UTC 24 |
| Peak memory | 216928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072940563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.1072940563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.4024065776 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 232068180 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:14:09 AM UTC 24 |
| Finished | Sep 09 10:14:12 AM UTC 24 |
| Peak memory | 214664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024065776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.4024065776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.3822316488 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 158845493 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:14:09 AM UTC 24 |
| Finished | Sep 09 10:14:12 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822316488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.3822316488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.2443993340 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 1260752609 ps |
| CPU time | 3.65 seconds |
| Started | Sep 09 10:14:09 AM UTC 24 |
| Finished | Sep 09 10:14:14 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2443993340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.2443993340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.1397776422 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 2056230686 ps |
| CPU time | 19.86 seconds |
| Started | Sep 09 10:14:09 AM UTC 24 |
| Finished | Sep 09 10:14:30 AM UTC 24 |
| Peak memory | 227324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1397776422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_streaming_out.1397776422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.440916606 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 2456690723 ps |
| CPU time | 19.46 seconds |
| Started | Sep 09 10:13:57 AM UTC 24 |
| Finished | Sep 09 10:14:17 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=440916606 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.440916606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.1020749223 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 689190875 ps |
| CPU time | 2.06 seconds |
| Started | Sep 09 10:14:09 AM UTC 24 |
| Finished | Sep 09 10:14:12 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1020749223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_t x_rx_disruption.1020749223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.1843770677 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 563229830 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 214488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1843770677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.1843770677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.1864263952 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 615777982 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:20:19 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1864263952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_ tx_rx_disruption.1864263952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.522114751 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 475847869 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 214908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=522114751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_t x_rx_disruption.522114751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.613609612 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 441536444 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=613609612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_t x_rx_disruption.613609612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.127979343 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 664416338 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=127979343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_t x_rx_disruption.127979343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.2680993354 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 580121356 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2680993354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_ tx_rx_disruption.2680993354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.3325572185 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 593827550 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3325572185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_ tx_rx_disruption.3325572185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.979418538 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 514907624 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=979418538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_t x_rx_disruption.979418538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.450219943 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 515434206 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=450219943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_t x_rx_disruption.450219943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.105000875 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 508946497 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:19:55 AM UTC 24 |
| Finished | Sep 09 10:20:00 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=105000875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_t x_rx_disruption.105000875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.1171179324 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 103269686 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:14:29 AM UTC 24 |
| Finished | Sep 09 10:14:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171179324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.1171179324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.413111631 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 4699920212 ps |
| CPU time | 7.8 seconds |
| Started | Sep 09 10:14:11 AM UTC 24 |
| Finished | Sep 09 10:14:20 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=413111631 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.413111631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.1490016034 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 18709104296 ps |
| CPU time | 35.73 seconds |
| Started | Sep 09 10:14:11 AM UTC 24 |
| Finished | Sep 09 10:14:48 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490016034 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.1490016034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.2854352124 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 24627004611 ps |
| CPU time | 36.86 seconds |
| Started | Sep 09 10:14:11 AM UTC 24 |
| Finished | Sep 09 10:14:49 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854352124 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.2854352124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.3057319817 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 177706166 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:14:11 AM UTC 24 |
| Finished | Sep 09 10:14:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057319817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_av_buffer.3057319817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.3903031590 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 192820261 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:14:11 AM UTC 24 |
| Finished | Sep 09 10:14:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903031590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_bitstuff_err.3903031590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.3653235467 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 199352968 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:14:11 AM UTC 24 |
| Finished | Sep 09 10:14:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653235467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.3653235467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.737173463 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 974794815 ps |
| CPU time | 3.73 seconds |
| Started | Sep 09 10:14:11 AM UTC 24 |
| Finished | Sep 09 10:14:16 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=737173463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.737173463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.3101277167 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 41319490029 ps |
| CPU time | 73.65 seconds |
| Started | Sep 09 10:14:11 AM UTC 24 |
| Finished | Sep 09 10:15:27 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101277167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.3101277167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.3769538176 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 1636682458 ps |
| CPU time | 33.59 seconds |
| Started | Sep 09 10:14:13 AM UTC 24 |
| Finished | Sep 09 10:14:48 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769538176 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.3769538176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.2329891061 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 913682328 ps |
| CPU time | 3.77 seconds |
| Started | Sep 09 10:14:13 AM UTC 24 |
| Finished | Sep 09 10:14:18 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329891061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.2329891061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.3720092803 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 143067118 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:14:13 AM UTC 24 |
| Finished | Sep 09 10:14:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3720092803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.3720092803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_enable.4191298864 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 47327196 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 10:14:13 AM UTC 24 |
| Finished | Sep 09 10:14:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4191298864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.4191298864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.117492708 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 902930288 ps |
| CPU time | 3.89 seconds |
| Started | Sep 09 10:14:14 AM UTC 24 |
| Finished | Sep 09 10:14:19 AM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=117492708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.117492708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.3038304629 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 195965450 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:14:14 AM UTC 24 |
| Finished | Sep 09 10:14:17 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3038304629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.3038304629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.2137209471 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 196872187 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:14:14 AM UTC 24 |
| Finished | Sep 09 10:14:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137209471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_fifo_levels.2137209471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.731585598 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 263834661 ps |
| CPU time | 3.1 seconds |
| Started | Sep 09 10:14:14 AM UTC 24 |
| Finished | Sep 09 10:14:19 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=731585598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_fifo_rst.731585598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.348767968 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 263932748 ps |
| CPU time | 2.03 seconds |
| Started | Sep 09 10:14:15 AM UTC 24 |
| Finished | Sep 09 10:14:18 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=348767968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.348767968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.2821644697 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 142691835 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:14:16 AM UTC 24 |
| Finished | Sep 09 10:14:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2821644697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.2821644697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.2992166868 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 251666978 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:14:16 AM UTC 24 |
| Finished | Sep 09 10:14:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992166868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.2992166868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.2652712203 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 3486274495 ps |
| CPU time | 91.14 seconds |
| Started | Sep 09 10:14:15 AM UTC 24 |
| Finished | Sep 09 10:15:48 AM UTC 24 |
| Peak memory | 229760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652712203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.2652712203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.2328118406 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 8810557124 ps |
| CPU time | 60.35 seconds |
| Started | Sep 09 10:14:16 AM UTC 24 |
| Finished | Sep 09 10:15:18 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2328118406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.2328118406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.2893953865 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 219693514 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:14:16 AM UTC 24 |
| Finished | Sep 09 10:14:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893953865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_in_err.2893953865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.3198972698 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 11690491266 ps |
| CPU time | 17.44 seconds |
| Started | Sep 09 10:14:17 AM UTC 24 |
| Finished | Sep 09 10:14:36 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198972698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.3198972698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.2917205809 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 5655109288 ps |
| CPU time | 10.33 seconds |
| Started | Sep 09 10:14:17 AM UTC 24 |
| Finished | Sep 09 10:14:29 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917205809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.2917205809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.2476105356 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 2272639842 ps |
| CPU time | 22.62 seconds |
| Started | Sep 09 10:14:18 AM UTC 24 |
| Finished | Sep 09 10:14:41 AM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476105356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.2476105356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.1041142321 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 2094202141 ps |
| CPU time | 56.93 seconds |
| Started | Sep 09 10:14:18 AM UTC 24 |
| Finished | Sep 09 10:15:16 AM UTC 24 |
| Peak memory | 234124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1041142321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.1041142321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.2714691520 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 239402715 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:14:19 AM UTC 24 |
| Finished | Sep 09 10:14:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714691520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.2714691520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.1718031226 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 211636018 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:14:19 AM UTC 24 |
| Finished | Sep 09 10:14:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1718031226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.1718031226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.4109246637 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 2313107779 ps |
| CPU time | 63.3 seconds |
| Started | Sep 09 10:14:19 AM UTC 24 |
| Finished | Sep 09 10:15:24 AM UTC 24 |
| Peak memory | 229732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109246637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.4109246637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.2897520898 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 202219846 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:14:19 AM UTC 24 |
| Finished | Sep 09 10:14:22 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2897520898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.2897520898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.3438730160 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 166053675 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:14:19 AM UTC 24 |
| Finished | Sep 09 10:14:22 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3438730160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.3438730160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.4203839675 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 179901685 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:14:19 AM UTC 24 |
| Finished | Sep 09 10:14:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203839675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_nak_trans.4203839675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.2739729184 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 186289465 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:14:21 AM UTC 24 |
| Finished | Sep 09 10:14:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739729184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.2739729184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.3779382924 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 186798601 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:14:21 AM UTC 24 |
| Finished | Sep 09 10:14:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3779382924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.3779382924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.2235418101 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 180314877 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:14:21 AM UTC 24 |
| Finished | Sep 09 10:14:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235418101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_out_trans_nak.2235418101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.2717179255 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 193880889 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:14:21 AM UTC 24 |
| Finished | Sep 09 10:14:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2717179255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.2717179255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.1325221604 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 258278344 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:14:22 AM UTC 24 |
| Finished | Sep 09 10:14:24 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325221604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.1325221604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.4180824309 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 159160462 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:14:22 AM UTC 24 |
| Finished | Sep 09 10:14:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4180824309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.4180824309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.3519911002 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 37940496 ps |
| CPU time | 1.05 seconds |
| Started | Sep 09 10:14:23 AM UTC 24 |
| Finished | Sep 09 10:14:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519911002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.3519911002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.2071474500 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 19008605624 ps |
| CPU time | 53.21 seconds |
| Started | Sep 09 10:14:23 AM UTC 24 |
| Finished | Sep 09 10:15:18 AM UTC 24 |
| Peak memory | 231696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071474500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.2071474500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.3448594529 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 197407309 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:14:23 AM UTC 24 |
| Finished | Sep 09 10:14:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448594529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.3448594529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.3198973441 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 217960137 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:14:23 AM UTC 24 |
| Finished | Sep 09 10:14:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198973441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_pkt_sent.3198973441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.3732556012 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 190586905 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:14:25 AM UTC 24 |
| Finished | Sep 09 10:14:27 AM UTC 24 |
| Peak memory | 214156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732556012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_random_length_in_transaction.3732556012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.2726148836 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 194026711 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:14:25 AM UTC 24 |
| Finished | Sep 09 10:14:27 AM UTC 24 |
| Peak memory | 214104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726148836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.2726148836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.2160829661 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 138754138 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:14:25 AM UTC 24 |
| Finished | Sep 09 10:14:27 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160829661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_rx_crc_err.2160829661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.2047473777 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 256894548 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 10:14:25 AM UTC 24 |
| Finished | Sep 09 10:14:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047473777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.2047473777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.2553323919 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 151285310 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:14:25 AM UTC 24 |
| Finished | Sep 09 10:14:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553323919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_setup_stage.2553323919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.1647812367 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 154217488 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:14:25 AM UTC 24 |
| Finished | Sep 09 10:14:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647812367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.1647812367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.19500468 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 222345677 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:14:25 AM UTC 24 |
| Finished | Sep 09 10:14:28 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=19500468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 38.usbdev_smoke.19500468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.1176146921 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 2408626153 ps |
| CPU time | 21.92 seconds |
| Started | Sep 09 10:14:25 AM UTC 24 |
| Finished | Sep 09 10:14:48 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176146921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.1176146921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.2817211112 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 220724492 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:14:25 AM UTC 24 |
| Finished | Sep 09 10:14:28 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2817211112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.2817211112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.3159462342 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 162287897 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:14:27 AM UTC 24 |
| Finished | Sep 09 10:14:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159462342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.3159462342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.1411087605 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 1087144736 ps |
| CPU time | 2.99 seconds |
| Started | Sep 09 10:14:27 AM UTC 24 |
| Finished | Sep 09 10:14:31 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411087605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.1411087605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.2607899340 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 2643606191 ps |
| CPU time | 68.6 seconds |
| Started | Sep 09 10:14:27 AM UTC 24 |
| Finished | Sep 09 10:15:37 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607899340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.2607899340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.3111840572 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 1465503725 ps |
| CPU time | 37.03 seconds |
| Started | Sep 09 10:14:13 AM UTC 24 |
| Finished | Sep 09 10:14:51 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3111840572 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.3111840572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.97784628 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 690807833 ps |
| CPU time | 2.85 seconds |
| Started | Sep 09 10:14:27 AM UTC 24 |
| Finished | Sep 09 10:14:31 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=97784628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_tx_ rx_disruption.97784628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.2275436274 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 595829359 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:20:00 AM UTC 24 |
| Peak memory | 216752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2275436274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_ tx_rx_disruption.2275436274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.3416892481 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 559329836 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:20:00 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3416892481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.3416892481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.335306283 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 464215806 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=335306283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_t x_rx_disruption.335306283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.2562468649 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 537060082 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2562468649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.2562468649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.1463143135 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 552468975 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1463143135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_ tx_rx_disruption.1463143135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.229262849 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 484570227 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 216652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=229262849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_t x_rx_disruption.229262849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.1269570316 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 494729754 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:19:59 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1269570316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.1269570316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.1884186926 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 589142226 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1884186926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.1884186926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.2432714202 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 507151650 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2432714202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.2432714202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.2553985216 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 517612824 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2553985216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.2553985216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.1058960393 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 36278286 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:14:47 AM UTC 24 |
| Finished | Sep 09 10:14:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058960393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.1058960393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.1036946569 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 5627229103 ps |
| CPU time | 13.29 seconds |
| Started | Sep 09 10:14:29 AM UTC 24 |
| Finished | Sep 09 10:14:43 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036946569 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.1036946569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.2788040659 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 13376328189 ps |
| CPU time | 26.44 seconds |
| Started | Sep 09 10:14:29 AM UTC 24 |
| Finished | Sep 09 10:14:57 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788040659 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.2788040659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.1299316239 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 29309434470 ps |
| CPU time | 52.14 seconds |
| Started | Sep 09 10:14:29 AM UTC 24 |
| Finished | Sep 09 10:15:23 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1299316239 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.1299316239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.1032464065 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 176209488 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:14:29 AM UTC 24 |
| Finished | Sep 09 10:14:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032464065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_av_buffer.1032464065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.312438581 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 165993874 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:14:29 AM UTC 24 |
| Finished | Sep 09 10:14:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312438581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_bitstuff_err.312438581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.3462566628 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 635409515 ps |
| CPU time | 2.91 seconds |
| Started | Sep 09 10:14:29 AM UTC 24 |
| Finished | Sep 09 10:14:33 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462566628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.3462566628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.1370601183 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 731560409 ps |
| CPU time | 2.55 seconds |
| Started | Sep 09 10:14:31 AM UTC 24 |
| Finished | Sep 09 10:14:34 AM UTC 24 |
| Peak memory | 216792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1370601183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.1370601183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.2801975993 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 51278018637 ps |
| CPU time | 107.11 seconds |
| Started | Sep 09 10:14:31 AM UTC 24 |
| Finished | Sep 09 10:16:20 AM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2801975993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.2801975993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.4210195510 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 5672528944 ps |
| CPU time | 36.78 seconds |
| Started | Sep 09 10:14:31 AM UTC 24 |
| Finished | Sep 09 10:15:09 AM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210195510 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.4210195510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.3485433781 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 717213217 ps |
| CPU time | 2.26 seconds |
| Started | Sep 09 10:14:31 AM UTC 24 |
| Finished | Sep 09 10:14:34 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485433781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_disable_endpoint.3485433781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.1943463682 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 197368075 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:14:32 AM UTC 24 |
| Finished | Sep 09 10:14:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943463682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_disconnected.1943463682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_enable.1206247582 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 35770315 ps |
| CPU time | 1.05 seconds |
| Started | Sep 09 10:14:32 AM UTC 24 |
| Finished | Sep 09 10:14:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206247582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.1206247582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.86614528 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 924465976 ps |
| CPU time | 4.58 seconds |
| Started | Sep 09 10:14:32 AM UTC 24 |
| Finished | Sep 09 10:14:39 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=86614528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_endpoint_access.86614528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.3668066006 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 295960482 ps |
| CPU time | 1.89 seconds |
| Started | Sep 09 10:14:32 AM UTC 24 |
| Finished | Sep 09 10:14:36 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3668066006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.3668066006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.1440660119 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 290958469 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:14:33 AM UTC 24 |
| Finished | Sep 09 10:14:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1440660119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_fifo_levels.1440660119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.708354839 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 470001319 ps |
| CPU time | 3.42 seconds |
| Started | Sep 09 10:14:33 AM UTC 24 |
| Finished | Sep 09 10:14:38 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=708354839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_fifo_rst.708354839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.2937003862 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 177923731 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:14:34 AM UTC 24 |
| Finished | Sep 09 10:14:37 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937003862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.2937003862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.2813902883 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 173856872 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:14:34 AM UTC 24 |
| Finished | Sep 09 10:14:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2813902883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_stall.2813902883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.3543106973 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 239846867 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:14:34 AM UTC 24 |
| Finished | Sep 09 10:14:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543106973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_trans.3543106973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.2935459073 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 5409176668 ps |
| CPU time | 147.67 seconds |
| Started | Sep 09 10:14:33 AM UTC 24 |
| Finished | Sep 09 10:17:03 AM UTC 24 |
| Peak memory | 227760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935459073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.2935459073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.744334768 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 5883623403 ps |
| CPU time | 54.73 seconds |
| Started | Sep 09 10:14:35 AM UTC 24 |
| Finished | Sep 09 10:15:32 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=744334768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.744334768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.838247298 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 228389306 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:14:35 AM UTC 24 |
| Finished | Sep 09 10:14:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=838247298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_link_in_err.838247298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.1696962844 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 11879705493 ps |
| CPU time | 19.59 seconds |
| Started | Sep 09 10:14:36 AM UTC 24 |
| Finished | Sep 09 10:14:57 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696962844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.1696962844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.3757773050 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 9962388159 ps |
| CPU time | 13.5 seconds |
| Started | Sep 09 10:14:37 AM UTC 24 |
| Finished | Sep 09 10:14:52 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757773050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.3757773050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.3669250623 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 3758235880 ps |
| CPU time | 46.21 seconds |
| Started | Sep 09 10:14:37 AM UTC 24 |
| Finished | Sep 09 10:15:25 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3669250623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.3669250623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1171687415 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 2906930729 ps |
| CPU time | 22.25 seconds |
| Started | Sep 09 10:14:37 AM UTC 24 |
| Finished | Sep 09 10:15:01 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171687415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.1171687415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.317295341 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 239116402 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:14:37 AM UTC 24 |
| Finished | Sep 09 10:14:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=317295341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.317295341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.744750130 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 191782909 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:14:37 AM UTC 24 |
| Finished | Sep 09 10:14:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744750130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.744750130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.3937907793 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 1629267836 ps |
| CPU time | 17.06 seconds |
| Started | Sep 09 10:14:39 AM UTC 24 |
| Finished | Sep 09 10:14:57 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3937907793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.3937907793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.1854907528 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 197792795 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:14:39 AM UTC 24 |
| Finished | Sep 09 10:14:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854907528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.1854907528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.2857632840 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 151442605 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:14:39 AM UTC 24 |
| Finished | Sep 09 10:14:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2857632840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.2857632840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.4213889045 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 191375880 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:14:39 AM UTC 24 |
| Finished | Sep 09 10:14:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213889045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_nak_trans.4213889045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.37633876 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 191206051 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:14:39 AM UTC 24 |
| Finished | Sep 09 10:14:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=37633876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_out_iso.37633876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.803523444 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 207374414 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:14:40 AM UTC 24 |
| Finished | Sep 09 10:14:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=803523444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_out_stall.803523444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.1133930165 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 201191713 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:14:40 AM UTC 24 |
| Finished | Sep 09 10:14:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1133930165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_out_trans_nak.1133930165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.3009475933 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 168067369 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:14:42 AM UTC 24 |
| Finished | Sep 09 10:14:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3009475933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.3009475933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.3908434982 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 200354610 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:14:42 AM UTC 24 |
| Finished | Sep 09 10:14:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908434982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.3908434982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.4264533681 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 188704464 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:14:42 AM UTC 24 |
| Finished | Sep 09 10:14:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264533681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.4264533681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.1030579701 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 55862922 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:14:42 AM UTC 24 |
| Finished | Sep 09 10:14:44 AM UTC 24 |
| Peak memory | 214716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030579701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_pins_sense.1030579701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.1695259803 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 17672968725 ps |
| CPU time | 55.5 seconds |
| Started | Sep 09 10:14:42 AM UTC 24 |
| Finished | Sep 09 10:15:40 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1695259803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_buffer.1695259803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.1490808675 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 151108594 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:14:42 AM UTC 24 |
| Finished | Sep 09 10:14:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490808675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.1490808675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.3694861468 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 188320221 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:14:42 AM UTC 24 |
| Finished | Sep 09 10:14:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694861468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.3694861468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.3326204249 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 224869655 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:14:42 AM UTC 24 |
| Finished | Sep 09 10:14:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326204249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.3326204249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.2824861725 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 206976390 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:14:44 AM UTC 24 |
| Finished | Sep 09 10:14:46 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2824861725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.2824861725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.2455796162 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 150831677 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:14:44 AM UTC 24 |
| Finished | Sep 09 10:14:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455796162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.2455796162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.391443307 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 252633468 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 10:14:44 AM UTC 24 |
| Finished | Sep 09 10:14:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=391443307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_rx_full.391443307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.4004754448 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 155845420 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:14:44 AM UTC 24 |
| Finished | Sep 09 10:14:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004754448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_setup_stage.4004754448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.1464386481 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 215592082 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:14:44 AM UTC 24 |
| Finished | Sep 09 10:14:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464386481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 39.usbdev_setup_trans_ignored.1464386481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.284677750 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 238809535 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:14:45 AM UTC 24 |
| Finished | Sep 09 10:14:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=284677750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.284677750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.3797147915 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 3188905366 ps |
| CPU time | 32.65 seconds |
| Started | Sep 09 10:14:45 AM UTC 24 |
| Finished | Sep 09 10:15:19 AM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3797147915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.3797147915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.566331418 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 187514426 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:14:46 AM UTC 24 |
| Finished | Sep 09 10:14:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=566331418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.566331418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.2088333469 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 231704516 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:14:46 AM UTC 24 |
| Finished | Sep 09 10:14:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2088333469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_stall_trans.2088333469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.2721990104 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 967041582 ps |
| CPU time | 2.79 seconds |
| Started | Sep 09 10:14:46 AM UTC 24 |
| Finished | Sep 09 10:14:50 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721990104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.2721990104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.3167526707 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 2575920918 ps |
| CPU time | 68.35 seconds |
| Started | Sep 09 10:14:46 AM UTC 24 |
| Finished | Sep 09 10:15:56 AM UTC 24 |
| Peak memory | 229444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3167526707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_streaming_out.3167526707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.1228091641 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 683668250 ps |
| CPU time | 14.85 seconds |
| Started | Sep 09 10:14:31 AM UTC 24 |
| Finished | Sep 09 10:14:47 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1228091641 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.1228091641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.40293996 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 527189526 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:14:47 AM UTC 24 |
| Finished | Sep 09 10:14:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=40293996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_tx_ rx_disruption.40293996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.1665718629 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 486062771 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:19:56 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1665718629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.1665718629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.3734421524 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 640279353 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3734421524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.3734421524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.3462111923 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 589985136 ps |
| CPU time | 1.94 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3462111923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.3462111923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.1745401161 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 583469400 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1745401161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.1745401161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.120704730 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 438171099 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:00 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=120704730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_t x_rx_disruption.120704730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.271369995 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 525408691 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=271369995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_t x_rx_disruption.271369995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.238183394 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 514763646 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=238183394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_t x_rx_disruption.238183394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.1686822834 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 628285849 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1686822834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.1686822834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.1722638977 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 406358038 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1722638977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.1722638977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.1323622191 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 448984893 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1323622191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.1323622191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.4264142751 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 52753883 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:00:02 AM UTC 24 |
| Finished | Sep 09 10:00:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264142751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.4264142751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.3251910382 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 9707827402 ps |
| CPU time | 15.06 seconds |
| Started | Sep 09 09:59:05 AM UTC 24 |
| Finished | Sep 09 09:59:21 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251910382 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.3251910382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.1042149082 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 19799670086 ps |
| CPU time | 40.35 seconds |
| Started | Sep 09 09:59:05 AM UTC 24 |
| Finished | Sep 09 09:59:46 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1042149082 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.1042149082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.1683999096 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 24035231329 ps |
| CPU time | 32.73 seconds |
| Started | Sep 09 09:59:05 AM UTC 24 |
| Finished | Sep 09 09:59:39 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683999096 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.1683999096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.2404147578 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 209405916 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 09:59:06 AM UTC 24 |
| Finished | Sep 09 09:59:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404147578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.2404147578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.1632133214 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 161590037 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 09:59:07 AM UTC 24 |
| Finished | Sep 09 09:59:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632133214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.1632133214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.1888789420 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 159455016 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 09:59:08 AM UTC 24 |
| Finished | Sep 09 09:59:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888789420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.1888789420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.2509293510 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 158391049 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 09:59:08 AM UTC 24 |
| Finished | Sep 09 09:59:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2509293510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.2509293510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.2397951736 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 524695576 ps |
| CPU time | 3.07 seconds |
| Started | Sep 09 09:59:09 AM UTC 24 |
| Finished | Sep 09 09:59:13 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2397951736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.2397951736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.1221329707 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 1138359365 ps |
| CPU time | 5.13 seconds |
| Started | Sep 09 09:59:09 AM UTC 24 |
| Finished | Sep 09 09:59:16 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221329707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.1221329707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.4050730006 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 1389648327 ps |
| CPU time | 11.74 seconds |
| Started | Sep 09 09:59:12 AM UTC 24 |
| Finished | Sep 09 09:59:25 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4050730006 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.4050730006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.2399285797 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 713856250 ps |
| CPU time | 3.58 seconds |
| Started | Sep 09 09:59:15 AM UTC 24 |
| Finished | Sep 09 09:59:19 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399285797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_disable_endpoint.2399285797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.614138420 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 187551140 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 09:59:15 AM UTC 24 |
| Finished | Sep 09 09:59:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=614138420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_disconnected.614138420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_enable.3020997246 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 37479158 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 09:59:15 AM UTC 24 |
| Finished | Sep 09 09:59:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3020997246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.3020997246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.2959928752 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 850370989 ps |
| CPU time | 3.67 seconds |
| Started | Sep 09 09:59:17 AM UTC 24 |
| Finished | Sep 09 09:59:22 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2959928752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.2959928752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.1941865798 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 449564617 ps |
| CPU time | 2.38 seconds |
| Started | Sep 09 09:59:17 AM UTC 24 |
| Finished | Sep 09 09:59:20 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941865798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.1941865798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.1345388817 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 257920235 ps |
| CPU time | 1.8 seconds |
| Started | Sep 09 09:59:18 AM UTC 24 |
| Finished | Sep 09 09:59:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1345388817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_fifo_levels.1345388817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.2512024026 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 325325261 ps |
| CPU time | 2.78 seconds |
| Started | Sep 09 09:59:18 AM UTC 24 |
| Finished | Sep 09 09:59:22 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512024026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.2512024026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.1198779547 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 119230085573 ps |
| CPU time | 209.24 seconds |
| Started | Sep 09 09:59:18 AM UTC 24 |
| Finished | Sep 09 10:02:51 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198779547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.1198779547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.1065778692 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 108400118430 ps |
| CPU time | 237 seconds |
| Started | Sep 09 09:59:20 AM UTC 24 |
| Finished | Sep 09 10:03:21 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1065778692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_hiclk_max.1065778692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.3985194035 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 88116946751 ps |
| CPU time | 160.76 seconds |
| Started | Sep 09 09:59:22 AM UTC 24 |
| Finished | Sep 09 10:02:05 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985194035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.3985194035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.991827599 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 94189939509 ps |
| CPU time | 182.15 seconds |
| Started | Sep 09 09:59:22 AM UTC 24 |
| Finished | Sep 09 10:02:27 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=991827599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 4.usbdev_freq_loclk_max.991827599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.3460158499 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 89173489509 ps |
| CPU time | 174.04 seconds |
| Started | Sep 09 09:59:22 AM UTC 24 |
| Finished | Sep 09 10:02:19 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460158499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.3460158499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.4265956717 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 215789082 ps |
| CPU time | 1.92 seconds |
| Started | Sep 09 09:59:23 AM UTC 24 |
| Finished | Sep 09 09:59:26 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4265956717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.4265956717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.1561005307 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 134342935 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 09:59:23 AM UTC 24 |
| Finished | Sep 09 09:59:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561005307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_stall.1561005307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.634438982 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 214651835 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 09:59:24 AM UTC 24 |
| Finished | Sep 09 09:59:27 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=634438982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_in_trans.634438982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.505840484 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 2899160831 ps |
| CPU time | 75.35 seconds |
| Started | Sep 09 09:59:23 AM UTC 24 |
| Finished | Sep 09 10:00:40 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=505840484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.505840484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.3667084572 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 4490588253 ps |
| CPU time | 57.43 seconds |
| Started | Sep 09 09:59:26 AM UTC 24 |
| Finished | Sep 09 10:00:25 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3667084572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.3667084572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.1066574929 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 204722510 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 09:59:27 AM UTC 24 |
| Finished | Sep 09 09:59:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066574929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_in_err.1066574929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.2399187333 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 28061886931 ps |
| CPU time | 49.68 seconds |
| Started | Sep 09 09:59:27 AM UTC 24 |
| Finished | Sep 09 10:00:18 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399187333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.2399187333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.391970445 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 6003197182 ps |
| CPU time | 17.97 seconds |
| Started | Sep 09 09:59:27 AM UTC 24 |
| Finished | Sep 09 09:59:46 AM UTC 24 |
| Peak memory | 227264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=391970445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_suspend.391970445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.2459412761 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 2613608276 ps |
| CPU time | 84.44 seconds |
| Started | Sep 09 09:59:27 AM UTC 24 |
| Finished | Sep 09 10:00:54 AM UTC 24 |
| Peak memory | 229784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459412761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.2459412761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.4079596309 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 1729682380 ps |
| CPU time | 47.25 seconds |
| Started | Sep 09 09:59:27 AM UTC 24 |
| Finished | Sep 09 10:00:16 AM UTC 24 |
| Peak memory | 229548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4079596309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.4079596309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.748228356 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 238414344 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 09:59:29 AM UTC 24 |
| Finished | Sep 09 09:59:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=748228356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.748228356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.2408927781 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 209149764 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 09:59:29 AM UTC 24 |
| Finished | Sep 09 09:59:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408927781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.2408927781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.838392185 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 2166967167 ps |
| CPU time | 22.46 seconds |
| Started | Sep 09 09:59:31 AM UTC 24 |
| Finished | Sep 09 09:59:54 AM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=838392185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.838392185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.1889263444 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 1983576133 ps |
| CPU time | 19.07 seconds |
| Started | Sep 09 09:59:32 AM UTC 24 |
| Finished | Sep 09 09:59:52 AM UTC 24 |
| Peak memory | 234060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889263444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.1889263444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.3459581306 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 2576172418 ps |
| CPU time | 75.64 seconds |
| Started | Sep 09 09:59:32 AM UTC 24 |
| Finished | Sep 09 10:00:49 AM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3459581306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.3459581306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.2103696754 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 201063379 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 09:59:38 AM UTC 24 |
| Finished | Sep 09 09:59:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2103696754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.2103696754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.2624855353 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 216270357 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 09:59:39 AM UTC 24 |
| Finished | Sep 09 09:59:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2624855353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.2624855353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.716174299 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 230941888 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 09:59:39 AM UTC 24 |
| Finished | Sep 09 09:59:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=716174299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_nak_trans.716174299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.3307171930 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 176923963 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 09:59:42 AM UTC 24 |
| Finished | Sep 09 09:59:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307171930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.3307171930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.752104189 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 229782454 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 09:59:42 AM UTC 24 |
| Finished | Sep 09 09:59:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=752104189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_out_stall.752104189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.4191572828 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 194404862 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 09:59:42 AM UTC 24 |
| Finished | Sep 09 09:59:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4191572828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_out_trans_nak.4191572828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.4262998825 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 181547056 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 09:59:43 AM UTC 24 |
| Finished | Sep 09 09:59:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262998825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.4262998825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.3344139563 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 219407331 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 09:59:46 AM UTC 24 |
| Finished | Sep 09 09:59:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344139563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.3344139563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.4269965890 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 281911299 ps |
| CPU time | 1.86 seconds |
| Started | Sep 09 09:59:46 AM UTC 24 |
| Finished | Sep 09 09:59:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269965890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.4269965890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.2381697137 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 142714069 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 09:59:46 AM UTC 24 |
| Finished | Sep 09 09:59:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381697137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.2381697137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.3724993197 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 28240515 ps |
| CPU time | 1 seconds |
| Started | Sep 09 09:59:46 AM UTC 24 |
| Finished | Sep 09 09:59:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724993197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.3724993197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.1013998806 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 10157574821 ps |
| CPU time | 42.95 seconds |
| Started | Sep 09 09:59:48 AM UTC 24 |
| Finished | Sep 09 10:00:32 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013998806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.1013998806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.2434463871 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 191505386 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 09:59:48 AM UTC 24 |
| Finished | Sep 09 09:59:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434463871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_pkt_received.2434463871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.2560213256 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 196974997 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 09:59:48 AM UTC 24 |
| Finished | Sep 09 09:59:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2560213256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.2560213256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.3773972815 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 3807867873 ps |
| CPU time | 29.79 seconds |
| Started | Sep 09 09:59:49 AM UTC 24 |
| Finished | Sep 09 10:00:20 AM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773972815 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.3773972815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.2559895748 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 3572776148 ps |
| CPU time | 35.03 seconds |
| Started | Sep 09 09:59:50 AM UTC 24 |
| Finished | Sep 09 10:00:27 AM UTC 24 |
| Peak memory | 229320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559895748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.2559895748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.4120889839 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 4897818572 ps |
| CPU time | 15.93 seconds |
| Started | Sep 09 09:59:50 AM UTC 24 |
| Finished | Sep 09 10:00:07 AM UTC 24 |
| Peak memory | 233844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120889839 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.4120889839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.2697975465 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 199783288 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 09:59:48 AM UTC 24 |
| Finished | Sep 09 09:59:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2697975465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_random_length_in_transaction.2697975465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.4170208023 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 185821608 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 09:59:49 AM UTC 24 |
| Finished | Sep 09 09:59:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170208023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.4170208023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.2405002104 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 20164563950 ps |
| CPU time | 36.77 seconds |
| Started | Sep 09 09:59:52 AM UTC 24 |
| Finished | Sep 09 10:00:30 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2405002104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 4.usbdev_resume_link_active.2405002104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.3759531455 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 172069675 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 09:59:52 AM UTC 24 |
| Finished | Sep 09 09:59:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759531455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_crc_err.3759531455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.1623387631 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 328901774 ps |
| CPU time | 2.15 seconds |
| Started | Sep 09 09:59:52 AM UTC 24 |
| Finished | Sep 09 09:59:55 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623387631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.1623387631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.3858698081 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 170616766 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 09:59:53 AM UTC 24 |
| Finished | Sep 09 09:59:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858698081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.3858698081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.1779053893 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 671741408 ps |
| CPU time | 2.38 seconds |
| Started | Sep 09 10:00:00 AM UTC 24 |
| Finished | Sep 09 10:00:07 AM UTC 24 |
| Peak memory | 251540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779053893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.1779053893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.827846322 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 392876685 ps |
| CPU time | 2.61 seconds |
| Started | Sep 09 09:59:53 AM UTC 24 |
| Finished | Sep 09 09:59:57 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=827846322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_setup_priority.827846322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.4157537986 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 212440338 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 09:59:53 AM UTC 24 |
| Finished | Sep 09 09:59:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157537986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.4157537986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.318135437 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 152716329 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 09:59:55 AM UTC 24 |
| Finished | Sep 09 09:59:58 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=318135437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_setup_stage.318135437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.1221481236 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 144952384 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 09:59:55 AM UTC 24 |
| Finished | Sep 09 09:59:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221481236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.1221481236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.1538365270 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 192415183 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 09:59:55 AM UTC 24 |
| Finished | Sep 09 09:59:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1538365270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.1538365270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.3337321658 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 2072945842 ps |
| CPU time | 61.77 seconds |
| Started | Sep 09 09:59:55 AM UTC 24 |
| Finished | Sep 09 10:00:59 AM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337321658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.3337321658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.2782375728 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 180608198 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 09:59:57 AM UTC 24 |
| Finished | Sep 09 09:59:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782375728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.2782375728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.4163996006 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 190461602 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 09:59:57 AM UTC 24 |
| Finished | Sep 09 09:59:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163996006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.4163996006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.4262851251 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 930167896 ps |
| CPU time | 3.97 seconds |
| Started | Sep 09 09:59:59 AM UTC 24 |
| Finished | Sep 09 10:00:04 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262851251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.4262851251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.888578486 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 2357453875 ps |
| CPU time | 67 seconds |
| Started | Sep 09 09:59:58 AM UTC 24 |
| Finished | Sep 09 10:01:06 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=888578486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_streaming_out.888578486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.94034382 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 1262984663 ps |
| CPU time | 24.74 seconds |
| Started | Sep 09 09:59:12 AM UTC 24 |
| Finished | Sep 09 09:59:38 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=94034382 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.94034382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.1384889668 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 598132168 ps |
| CPU time | 2.98 seconds |
| Started | Sep 09 09:59:59 AM UTC 24 |
| Finished | Sep 09 10:00:03 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1384889668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx _rx_disruption.1384889668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.3148620792 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 36684078 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:15:04 AM UTC 24 |
| Finished | Sep 09 10:15:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148620792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.3148620792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.3008078096 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 4205989702 ps |
| CPU time | 6.71 seconds |
| Started | Sep 09 10:14:47 AM UTC 24 |
| Finished | Sep 09 10:14:55 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008078096 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.3008078096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.5323002 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 14799612061 ps |
| CPU time | 18.51 seconds |
| Started | Sep 09 10:14:47 AM UTC 24 |
| Finished | Sep 09 10:15:07 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=5323002 -assert nopostproc +UVM_TESTNAME=usbdev_base_tes t +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbde v-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.5323002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.3867530382 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 28510546688 ps |
| CPU time | 37.59 seconds |
| Started | Sep 09 10:14:47 AM UTC 24 |
| Finished | Sep 09 10:15:26 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867530382 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.3867530382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.3898058855 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 155069645 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:14:49 AM UTC 24 |
| Finished | Sep 09 10:14:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898058855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.3898058855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.2120119943 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 171200760 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:14:49 AM UTC 24 |
| Finished | Sep 09 10:14:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2120119943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.2120119943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.3027763956 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 147140646 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:14:49 AM UTC 24 |
| Finished | Sep 09 10:14:51 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3027763956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.3027763956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.1459067554 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 730960757 ps |
| CPU time | 2.73 seconds |
| Started | Sep 09 10:14:49 AM UTC 24 |
| Finished | Sep 09 10:14:53 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459067554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.1459067554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.2410123102 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 28409873489 ps |
| CPU time | 56 seconds |
| Started | Sep 09 10:14:49 AM UTC 24 |
| Finished | Sep 09 10:15:47 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2410123102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.2410123102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.2689226172 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 1133653734 ps |
| CPU time | 24.4 seconds |
| Started | Sep 09 10:14:49 AM UTC 24 |
| Finished | Sep 09 10:15:15 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689226172 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.2689226172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.755712556 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 667183997 ps |
| CPU time | 3.39 seconds |
| Started | Sep 09 10:14:51 AM UTC 24 |
| Finished | Sep 09 10:14:55 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=755712556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_disable_endpoint.755712556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.1722628952 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 184497056 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:14:51 AM UTC 24 |
| Finished | Sep 09 10:14:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722628952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.1722628952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_enable.3404726746 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 33932355 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:14:51 AM UTC 24 |
| Finished | Sep 09 10:14:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404726746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.3404726746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.1098887324 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 957785817 ps |
| CPU time | 3.2 seconds |
| Started | Sep 09 10:14:51 AM UTC 24 |
| Finished | Sep 09 10:14:55 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098887324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.1098887324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.1613539200 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 506815563 ps |
| CPU time | 2.25 seconds |
| Started | Sep 09 10:14:51 AM UTC 24 |
| Finished | Sep 09 10:14:54 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613539200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.1613539200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.3381510633 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 344707068 ps |
| CPU time | 3.79 seconds |
| Started | Sep 09 10:14:52 AM UTC 24 |
| Finished | Sep 09 10:14:58 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381510633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.3381510633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.864185675 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 234325962 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:14:52 AM UTC 24 |
| Finished | Sep 09 10:14:55 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=864185675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.864185675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.3772923048 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 145140519 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:14:53 AM UTC 24 |
| Finished | Sep 09 10:14:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772923048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_stall.3772923048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.3292707047 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 178885057 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:14:53 AM UTC 24 |
| Finished | Sep 09 10:14:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292707047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.3292707047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.2451318170 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 3735057178 ps |
| CPU time | 101.15 seconds |
| Started | Sep 09 10:14:52 AM UTC 24 |
| Finished | Sep 09 10:16:36 AM UTC 24 |
| Peak memory | 234292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451318170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.2451318170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.195886339 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 4679249323 ps |
| CPU time | 54.83 seconds |
| Started | Sep 09 10:14:53 AM UTC 24 |
| Finished | Sep 09 10:15:49 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=195886339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.195886339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.2360123375 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 258263247 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:14:54 AM UTC 24 |
| Finished | Sep 09 10:14:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360123375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_in_err.2360123375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.3036339913 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 10335953857 ps |
| CPU time | 18.17 seconds |
| Started | Sep 09 10:14:54 AM UTC 24 |
| Finished | Sep 09 10:15:14 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036339913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_resume.3036339913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.849751249 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 9503038195 ps |
| CPU time | 14.41 seconds |
| Started | Sep 09 10:14:54 AM UTC 24 |
| Finished | Sep 09 10:15:10 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=849751249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_suspend.849751249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.2613953824 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 2500634581 ps |
| CPU time | 70.2 seconds |
| Started | Sep 09 10:14:55 AM UTC 24 |
| Finished | Sep 09 10:16:07 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613953824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.2613953824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.353479905 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 1630525568 ps |
| CPU time | 14.23 seconds |
| Started | Sep 09 10:14:55 AM UTC 24 |
| Finished | Sep 09 10:15:10 AM UTC 24 |
| Peak memory | 227344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=353479905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.353479905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.3761410210 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 245816720 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:14:56 AM UTC 24 |
| Finished | Sep 09 10:14:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3761410210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.3761410210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.3196417777 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 263340754 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:14:56 AM UTC 24 |
| Finished | Sep 09 10:14:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3196417777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.3196417777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.4203663492 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 1720812030 ps |
| CPU time | 15.24 seconds |
| Started | Sep 09 10:14:56 AM UTC 24 |
| Finished | Sep 09 10:15:13 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203663492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.4203663492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.248358384 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 160219460 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:14:56 AM UTC 24 |
| Finished | Sep 09 10:14:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=248358384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.248358384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.3700246734 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 158644724 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:14:56 AM UTC 24 |
| Finished | Sep 09 10:14:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700246734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.3700246734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.2718284057 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 222448370 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:14:56 AM UTC 24 |
| Finished | Sep 09 10:14:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718284057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.2718284057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.829836321 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 156688352 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:14:56 AM UTC 24 |
| Finished | Sep 09 10:14:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=829836321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_out_iso.829836321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.1812837078 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 181195128 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:14:58 AM UTC 24 |
| Finished | Sep 09 10:15:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812837078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_out_stall.1812837078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.1481187441 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 147928542 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:14:58 AM UTC 24 |
| Finished | Sep 09 10:15:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1481187441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_out_trans_nak.1481187441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.4177502529 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 151582681 ps |
| CPU time | 0.96 seconds |
| Started | Sep 09 10:14:58 AM UTC 24 |
| Finished | Sep 09 10:15:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4177502529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.4177502529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.2802007317 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 230298215 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:14:58 AM UTC 24 |
| Finished | Sep 09 10:15:00 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802007317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.2802007317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.3599422398 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 139166766 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:15:00 AM UTC 24 |
| Finished | Sep 09 10:15:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599422398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.3599422398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.100497975 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 57754123 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:15:00 AM UTC 24 |
| Finished | Sep 09 10:15:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=100497975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_phy_pins_sense.100497975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.118914417 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 12975141298 ps |
| CPU time | 36.3 seconds |
| Started | Sep 09 10:15:00 AM UTC 24 |
| Finished | Sep 09 10:15:38 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=118914417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_pkt_buffer.118914417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.3338537688 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 179912006 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:15:00 AM UTC 24 |
| Finished | Sep 09 10:15:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3338537688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_pkt_received.3338537688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.1668834029 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 169970254 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:15:00 AM UTC 24 |
| Finished | Sep 09 10:15:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668834029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.1668834029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.565217568 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 205548797 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:15:00 AM UTC 24 |
| Finished | Sep 09 10:15:03 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=565217568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_random_length_in_transaction.565217568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.2122936502 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 259258005 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:15:00 AM UTC 24 |
| Finished | Sep 09 10:15:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122936502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.2122936502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.2351130966 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 137325318 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:15:00 AM UTC 24 |
| Finished | Sep 09 10:15:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351130966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_rx_crc_err.2351130966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.1482078302 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 254265312 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:15:00 AM UTC 24 |
| Finished | Sep 09 10:15:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482078302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.1482078302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.2726674294 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 182575875 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:15:02 AM UTC 24 |
| Finished | Sep 09 10:15:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726674294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_setup_stage.2726674294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.1860982668 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 153902607 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:15:02 AM UTC 24 |
| Finished | Sep 09 10:15:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860982668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 40.usbdev_setup_trans_ignored.1860982668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.2743111880 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 215877957 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:15:02 AM UTC 24 |
| Finished | Sep 09 10:15:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2743111880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.2743111880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.3670814660 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 2265465553 ps |
| CPU time | 17.61 seconds |
| Started | Sep 09 10:15:02 AM UTC 24 |
| Finished | Sep 09 10:15:21 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670814660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.3670814660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.2028663350 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 151988927 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:15:02 AM UTC 24 |
| Finished | Sep 09 10:15:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028663350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.2028663350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.197682292 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 158951098 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:15:04 AM UTC 24 |
| Finished | Sep 09 10:15:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197682292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_stall_trans.197682292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.3445807973 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 1234788779 ps |
| CPU time | 5.75 seconds |
| Started | Sep 09 10:15:04 AM UTC 24 |
| Finished | Sep 09 10:15:11 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445807973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.3445807973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.1640248289 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 2954509414 ps |
| CPU time | 80.27 seconds |
| Started | Sep 09 10:15:04 AM UTC 24 |
| Finished | Sep 09 10:16:26 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1640248289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_streaming_out.1640248289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.3376507036 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 1413295208 ps |
| CPU time | 34.67 seconds |
| Started | Sep 09 10:14:49 AM UTC 24 |
| Finished | Sep 09 10:15:25 AM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376507036 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.3376507036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.4081964525 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 474248989 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:15:04 AM UTC 24 |
| Finished | Sep 09 10:15:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4081964525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.4081964525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.2039129314 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 589803106 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2039129314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_ tx_rx_disruption.2039129314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.473074227 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 527492273 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=473074227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_t x_rx_disruption.473074227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.2856929444 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 485888845 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2856929444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.2856929444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.3087806078 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 523570241 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3087806078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_ tx_rx_disruption.3087806078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.2716705617 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 537327570 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2716705617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_ tx_rx_disruption.2716705617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.2946285993 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 471671057 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2946285993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.2946285993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.1125312324 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 553376699 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1125312324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.1125312324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.1721909139 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 503844221 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1721909139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.1721909139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.134136029 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 624166606 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=134136029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_t x_rx_disruption.134136029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.2402024844 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 610085045 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2402024844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_ tx_rx_disruption.2402024844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.1028078264 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 38577191 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:15:23 AM UTC 24 |
| Finished | Sep 09 10:15:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1028078264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.1028078264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.1897523162 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 11388497424 ps |
| CPU time | 19.12 seconds |
| Started | Sep 09 10:15:04 AM UTC 24 |
| Finished | Sep 09 10:15:24 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897523162 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.1897523162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.2594527372 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 20690128372 ps |
| CPU time | 34.1 seconds |
| Started | Sep 09 10:15:04 AM UTC 24 |
| Finished | Sep 09 10:15:40 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594527372 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.2594527372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.141568507 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 30843383708 ps |
| CPU time | 41.45 seconds |
| Started | Sep 09 10:15:04 AM UTC 24 |
| Finished | Sep 09 10:15:47 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=141568507 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.141568507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.2647701605 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 174522114 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:15:06 AM UTC 24 |
| Finished | Sep 09 10:15:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2647701605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_av_buffer.2647701605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.2614585448 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 190698738 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:15:06 AM UTC 24 |
| Finished | Sep 09 10:15:08 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614585448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.2614585448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.1728769165 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 360818981 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:15:06 AM UTC 24 |
| Finished | Sep 09 10:15:09 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728769165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.1728769165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.2475222525 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 1024328838 ps |
| CPU time | 4.52 seconds |
| Started | Sep 09 10:15:06 AM UTC 24 |
| Finished | Sep 09 10:15:11 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475222525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.2475222525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.3694231412 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 31976219801 ps |
| CPU time | 58.2 seconds |
| Started | Sep 09 10:15:06 AM UTC 24 |
| Finished | Sep 09 10:16:06 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694231412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.3694231412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.4195685343 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 8358000914 ps |
| CPU time | 60.63 seconds |
| Started | Sep 09 10:15:06 AM UTC 24 |
| Finished | Sep 09 10:16:08 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195685343 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.4195685343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.1578109223 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 767416271 ps |
| CPU time | 3.71 seconds |
| Started | Sep 09 10:15:07 AM UTC 24 |
| Finished | Sep 09 10:15:12 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1578109223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.1578109223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.1560401149 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 155193936 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:15:07 AM UTC 24 |
| Finished | Sep 09 10:15:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1560401149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.1560401149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_enable.2675273377 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 29670179 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:15:08 AM UTC 24 |
| Finished | Sep 09 10:15:10 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2675273377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_enable.2675273377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.1490464596 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 809244079 ps |
| CPU time | 2.57 seconds |
| Started | Sep 09 10:15:09 AM UTC 24 |
| Finished | Sep 09 10:15:12 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490464596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.1490464596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.3091869237 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 190980234 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:15:09 AM UTC 24 |
| Finished | Sep 09 10:15:11 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091869237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.3091869237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.224800164 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 208001645 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:15:09 AM UTC 24 |
| Finished | Sep 09 10:15:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=224800164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_fifo_levels.224800164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.1660437562 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 508968695 ps |
| CPU time | 4.67 seconds |
| Started | Sep 09 10:15:10 AM UTC 24 |
| Finished | Sep 09 10:15:16 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660437562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.1660437562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.3779302667 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 178769940 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:15:10 AM UTC 24 |
| Finished | Sep 09 10:15:12 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3779302667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.3779302667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.4226236434 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 161497614 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:15:12 AM UTC 24 |
| Finished | Sep 09 10:15:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226236434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_stall.4226236434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.3205641031 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 173776491 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:15:12 AM UTC 24 |
| Finished | Sep 09 10:15:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205641031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.3205641031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.2180609418 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 5081190398 ps |
| CPU time | 134.82 seconds |
| Started | Sep 09 10:15:10 AM UTC 24 |
| Finished | Sep 09 10:17:27 AM UTC 24 |
| Peak memory | 234408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180609418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.2180609418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.3123777332 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 11622763555 ps |
| CPU time | 79.81 seconds |
| Started | Sep 09 10:15:12 AM UTC 24 |
| Finished | Sep 09 10:16:33 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3123777332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.3123777332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.3361772117 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 174933527 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:15:12 AM UTC 24 |
| Finished | Sep 09 10:15:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361772117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.3361772117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.1944801351 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 25917578297 ps |
| CPU time | 53.46 seconds |
| Started | Sep 09 10:15:12 AM UTC 24 |
| Finished | Sep 09 10:16:07 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944801351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.1944801351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.1262357651 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 3589067865 ps |
| CPU time | 6.77 seconds |
| Started | Sep 09 10:15:12 AM UTC 24 |
| Finished | Sep 09 10:15:20 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262357651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.1262357651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.51568750 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 4471657830 ps |
| CPU time | 122.18 seconds |
| Started | Sep 09 10:15:13 AM UTC 24 |
| Finished | Sep 09 10:17:18 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51568750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.51568750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.3228268264 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 4228992639 ps |
| CPU time | 109.83 seconds |
| Started | Sep 09 10:15:13 AM UTC 24 |
| Finished | Sep 09 10:17:05 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228268264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.3228268264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.346968099 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 241551038 ps |
| CPU time | 1.97 seconds |
| Started | Sep 09 10:15:13 AM UTC 24 |
| Finished | Sep 09 10:15:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346968099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.346968099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.3057631164 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 203179535 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:15:13 AM UTC 24 |
| Finished | Sep 09 10:15:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057631164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.3057631164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.935585938 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 2275867418 ps |
| CPU time | 16.47 seconds |
| Started | Sep 09 10:15:15 AM UTC 24 |
| Finished | Sep 09 10:15:32 AM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=935585938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.935585938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.1398309992 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 208468593 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:15:15 AM UTC 24 |
| Finished | Sep 09 10:15:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398309992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.1398309992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.3044860414 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 166631023 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:15:15 AM UTC 24 |
| Finished | Sep 09 10:15:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044860414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.3044860414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.3385936661 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 231129927 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:15:15 AM UTC 24 |
| Finished | Sep 09 10:15:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385936661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.3385936661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.2620324742 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 176693088 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:15:16 AM UTC 24 |
| Finished | Sep 09 10:15:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620324742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_out_iso.2620324742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.1381754115 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 161827806 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:15:16 AM UTC 24 |
| Finished | Sep 09 10:15:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381754115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_out_stall.1381754115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.412637625 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 183866725 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:15:17 AM UTC 24 |
| Finished | Sep 09 10:15:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=412637625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_out_trans_nak.412637625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.1390286324 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 154827327 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:15:18 AM UTC 24 |
| Finished | Sep 09 10:15:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390286324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.1390286324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.1362065646 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 262324378 ps |
| CPU time | 1.91 seconds |
| Started | Sep 09 10:15:18 AM UTC 24 |
| Finished | Sep 09 10:15:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1362065646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.1362065646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.3007123301 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 168601974 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:15:18 AM UTC 24 |
| Finished | Sep 09 10:15:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007123301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.3007123301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.2198288052 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 106523036 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:15:20 AM UTC 24 |
| Finished | Sep 09 10:15:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198288052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.2198288052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.3616422423 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 9257243079 ps |
| CPU time | 25.35 seconds |
| Started | Sep 09 10:15:20 AM UTC 24 |
| Finished | Sep 09 10:15:46 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3616422423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_pkt_buffer.3616422423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.3574189031 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 164447357 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:15:20 AM UTC 24 |
| Finished | Sep 09 10:15:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574189031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.3574189031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.1359269783 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 166291574 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:15:20 AM UTC 24 |
| Finished | Sep 09 10:15:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359269783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.1359269783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.1046396341 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 184758783 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:15:20 AM UTC 24 |
| Finished | Sep 09 10:15:22 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046396341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.1046396341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.1233563275 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 169930715 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:15:20 AM UTC 24 |
| Finished | Sep 09 10:15:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1233563275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.1233563275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.2326735229 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 175992220 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:15:20 AM UTC 24 |
| Finished | Sep 09 10:15:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326735229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_rx_crc_err.2326735229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.3534987423 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 346674078 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:15:21 AM UTC 24 |
| Finished | Sep 09 10:15:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534987423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.3534987423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.3044653786 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 145732452 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:15:21 AM UTC 24 |
| Finished | Sep 09 10:15:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044653786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_setup_stage.3044653786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.101736756 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 145007251 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:15:21 AM UTC 24 |
| Finished | Sep 09 10:15:23 AM UTC 24 |
| Peak memory | 215996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=101736756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 41.usbdev_setup_trans_ignored.101736756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.3508889064 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 215263942 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:15:21 AM UTC 24 |
| Finished | Sep 09 10:15:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508889064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.3508889064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.988594508 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 2804665802 ps |
| CPU time | 29.61 seconds |
| Started | Sep 09 10:15:22 AM UTC 24 |
| Finished | Sep 09 10:15:53 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=988594508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.988594508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.4194218671 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 222715435 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:15:22 AM UTC 24 |
| Finished | Sep 09 10:15:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194218671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.4194218671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.721010423 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 227608199 ps |
| CPU time | 0.93 seconds |
| Started | Sep 09 10:15:22 AM UTC 24 |
| Finished | Sep 09 10:15:23 AM UTC 24 |
| Peak memory | 215948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=721010423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_stall_trans.721010423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.1419579569 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 306032853 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:15:23 AM UTC 24 |
| Finished | Sep 09 10:15:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1419579569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.1419579569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.3700872723 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 3627334720 ps |
| CPU time | 96.68 seconds |
| Started | Sep 09 10:15:23 AM UTC 24 |
| Finished | Sep 09 10:17:02 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700872723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_streaming_out.3700872723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.4243615256 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 3449203065 ps |
| CPU time | 29.55 seconds |
| Started | Sep 09 10:15:07 AM UTC 24 |
| Finished | Sep 09 10:15:38 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4243615256 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.4243615256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.3912180323 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 520431107 ps |
| CPU time | 1.96 seconds |
| Started | Sep 09 10:15:23 AM UTC 24 |
| Finished | Sep 09 10:15:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3912180323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.3912180323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.4279797291 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 582346523 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:21 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4279797291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.4279797291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.2938463163 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 521430902 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:21 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2938463163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_ tx_rx_disruption.2938463163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.2761538846 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 563414047 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:19:58 AM UTC 24 |
| Finished | Sep 09 10:20:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2761538846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_ tx_rx_disruption.2761538846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.3509364372 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 469778080 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:20:00 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3509364372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.3509364372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.454207492 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 586874789 ps |
| CPU time | 1.95 seconds |
| Started | Sep 09 10:20:00 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=454207492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_t x_rx_disruption.454207492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.1713558493 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 545490562 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:20:00 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1713558493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_ tx_rx_disruption.1713558493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.1048271858 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 550969652 ps |
| CPU time | 1.99 seconds |
| Started | Sep 09 10:20:00 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1048271858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.1048271858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.2153264839 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 556713192 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:20:00 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2153264839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.2153264839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.3659231591 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 488903259 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:20:00 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3659231591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_ tx_rx_disruption.3659231591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.3173273018 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 577979003 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:20:00 AM UTC 24 |
| Finished | Sep 09 10:20:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3173273018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.3173273018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.2456973550 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 65193728 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:15:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456973550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.2456973550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.2749539590 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 5453398295 ps |
| CPU time | 10.14 seconds |
| Started | Sep 09 10:15:23 AM UTC 24 |
| Finished | Sep 09 10:15:34 AM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2749539590 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.2749539590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.3276342448 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 19887815319 ps |
| CPU time | 27.27 seconds |
| Started | Sep 09 10:15:25 AM UTC 24 |
| Finished | Sep 09 10:15:53 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276342448 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.3276342448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.1489578177 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 31471437794 ps |
| CPU time | 52.85 seconds |
| Started | Sep 09 10:15:25 AM UTC 24 |
| Finished | Sep 09 10:16:19 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489578177 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.1489578177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.4258627458 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 176739715 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:15:25 AM UTC 24 |
| Finished | Sep 09 10:15:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258627458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.4258627458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.1575250683 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 155176816 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:15:25 AM UTC 24 |
| Finished | Sep 09 10:15:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575250683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_bitstuff_err.1575250683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.697135848 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 551985900 ps |
| CPU time | 2.84 seconds |
| Started | Sep 09 10:15:25 AM UTC 24 |
| Finished | Sep 09 10:15:29 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=697135848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_data_toggle_clear.697135848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.994162358 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 502965742 ps |
| CPU time | 2.67 seconds |
| Started | Sep 09 10:15:25 AM UTC 24 |
| Finished | Sep 09 10:15:29 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=994162358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.994162358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.2515664079 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 38181761387 ps |
| CPU time | 64.91 seconds |
| Started | Sep 09 10:15:27 AM UTC 24 |
| Finished | Sep 09 10:16:33 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515664079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.2515664079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.4176575657 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 1456738921 ps |
| CPU time | 31.66 seconds |
| Started | Sep 09 10:15:27 AM UTC 24 |
| Finished | Sep 09 10:16:00 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4176575657 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.4176575657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.2787892627 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 1065247633 ps |
| CPU time | 4.2 seconds |
| Started | Sep 09 10:15:27 AM UTC 24 |
| Finished | Sep 09 10:15:32 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2787892627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.2787892627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.2772890164 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 131353226 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:15:27 AM UTC 24 |
| Finished | Sep 09 10:15:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2772890164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_disconnected.2772890164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_enable.85457793 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 31399545 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:15:27 AM UTC 24 |
| Finished | Sep 09 10:15:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=85457793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_enable.85457793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.3146443060 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 908533773 ps |
| CPU time | 4.35 seconds |
| Started | Sep 09 10:15:27 AM UTC 24 |
| Finished | Sep 09 10:15:32 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146443060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.3146443060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.54701567 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 649660256 ps |
| CPU time | 2.85 seconds |
| Started | Sep 09 10:15:27 AM UTC 24 |
| Finished | Sep 09 10:15:31 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=54701567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.54701567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.1791440165 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 308043199 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:15:27 AM UTC 24 |
| Finished | Sep 09 10:15:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1791440165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_fifo_levels.1791440165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.2774895297 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 167850923 ps |
| CPU time | 2.25 seconds |
| Started | Sep 09 10:15:30 AM UTC 24 |
| Finished | Sep 09 10:15:33 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774895297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.2774895297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.1318871062 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 192215743 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:15:30 AM UTC 24 |
| Finished | Sep 09 10:15:33 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318871062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.1318871062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.1057362171 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 158937866 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:15:30 AM UTC 24 |
| Finished | Sep 09 10:15:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1057362171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.1057362171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.3671392390 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 226680787 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:15:30 AM UTC 24 |
| Finished | Sep 09 10:15:33 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671392390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.3671392390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.750993647 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 3151974209 ps |
| CPU time | 31.51 seconds |
| Started | Sep 09 10:15:30 AM UTC 24 |
| Finished | Sep 09 10:16:03 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=750993647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.750993647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.4267303 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 11538212517 ps |
| CPU time | 73.51 seconds |
| Started | Sep 09 10:15:30 AM UTC 24 |
| Finished | Sep 09 10:16:46 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.4267303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.3342410270 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 187699939 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:15:30 AM UTC 24 |
| Finished | Sep 09 10:15:33 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3342410270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.3342410270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.2532861858 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 22830324666 ps |
| CPU time | 52.43 seconds |
| Started | Sep 09 10:15:30 AM UTC 24 |
| Finished | Sep 09 10:16:24 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2532861858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.2532861858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.870893730 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 8997685340 ps |
| CPU time | 12.74 seconds |
| Started | Sep 09 10:15:30 AM UTC 24 |
| Finished | Sep 09 10:15:44 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=870893730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_suspend.870893730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.2138308898 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 3494292479 ps |
| CPU time | 38.4 seconds |
| Started | Sep 09 10:15:32 AM UTC 24 |
| Finished | Sep 09 10:16:11 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138308898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.2138308898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.2166086618 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 2840988911 ps |
| CPU time | 71.06 seconds |
| Started | Sep 09 10:15:32 AM UTC 24 |
| Finished | Sep 09 10:16:45 AM UTC 24 |
| Peak memory | 227680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166086618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.2166086618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.3635776988 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 251404971 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:15:33 AM UTC 24 |
| Finished | Sep 09 10:15:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635776988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.3635776988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.3232341224 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 205015726 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:15:33 AM UTC 24 |
| Finished | Sep 09 10:15:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232341224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.3232341224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.444875615 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 3503578715 ps |
| CPU time | 25.71 seconds |
| Started | Sep 09 10:15:33 AM UTC 24 |
| Finished | Sep 09 10:16:00 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=444875615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.444875615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.2713510057 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 167636927 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:15:33 AM UTC 24 |
| Finished | Sep 09 10:15:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713510057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.2713510057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.3353872939 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 145781154 ps |
| CPU time | 0.96 seconds |
| Started | Sep 09 10:15:33 AM UTC 24 |
| Finished | Sep 09 10:15:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3353872939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.3353872939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.4207787965 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 193943928 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:15:35 AM UTC 24 |
| Finished | Sep 09 10:15:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207787965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_nak_trans.4207787965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.2121992782 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 240591577 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:15:35 AM UTC 24 |
| Finished | Sep 09 10:15:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121992782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_iso.2121992782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.2989756264 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 154652212 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:15:35 AM UTC 24 |
| Finished | Sep 09 10:15:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989756264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_out_stall.2989756264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.3146884117 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 200909420 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:15:35 AM UTC 24 |
| Finished | Sep 09 10:15:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146884117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_out_trans_nak.3146884117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.3191418446 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 168857275 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:15:35 AM UTC 24 |
| Finished | Sep 09 10:15:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3191418446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_pending_in_trans.3191418446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.2979207764 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 203963480 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:15:36 AM UTC 24 |
| Finished | Sep 09 10:15:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2979207764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.2979207764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.235017335 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 137665120 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:15:36 AM UTC 24 |
| Finished | Sep 09 10:15:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=235017335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.235017335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.859379685 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 81068839 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:15:36 AM UTC 24 |
| Finished | Sep 09 10:15:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=859379685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_phy_pins_sense.859379685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.2654880384 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 12140417093 ps |
| CPU time | 42.99 seconds |
| Started | Sep 09 10:15:37 AM UTC 24 |
| Finished | Sep 09 10:16:21 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654880384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_pkt_buffer.2654880384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.2895008251 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 192110401 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:15:37 AM UTC 24 |
| Finished | Sep 09 10:15:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895008251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.2895008251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.4021906269 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 230674205 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:15:38 AM UTC 24 |
| Finished | Sep 09 10:15:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021906269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_pkt_sent.4021906269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.2733294849 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 154416952 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:15:38 AM UTC 24 |
| Finished | Sep 09 10:15:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733294849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_random_length_in_transaction.2733294849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.3523970719 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 183160583 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:15:38 AM UTC 24 |
| Finished | Sep 09 10:15:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523970719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.3523970719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.1931392553 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 168241275 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:15:38 AM UTC 24 |
| Finished | Sep 09 10:15:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931392553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.1931392553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.4201193449 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 242717645 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:15:38 AM UTC 24 |
| Finished | Sep 09 10:15:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4201193449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_rx_full.4201193449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.1052140087 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 156463299 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:15:40 AM UTC 24 |
| Finished | Sep 09 10:15:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052140087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.1052140087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.1328661997 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 173687313 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:15:40 AM UTC 24 |
| Finished | Sep 09 10:15:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328661997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.1328661997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.3039941473 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 218397775 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:15:40 AM UTC 24 |
| Finished | Sep 09 10:15:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039941473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.3039941473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.1044728229 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 3363783318 ps |
| CPU time | 100.2 seconds |
| Started | Sep 09 10:15:40 AM UTC 24 |
| Finished | Sep 09 10:17:22 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1044728229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.1044728229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.3418879958 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 163115734 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:15:40 AM UTC 24 |
| Finished | Sep 09 10:15:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3418879958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.3418879958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.3541158268 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 151094581 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:15:40 AM UTC 24 |
| Finished | Sep 09 10:15:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541158268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stall_trans.3541158268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.2347944012 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 882876167 ps |
| CPU time | 3.17 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:15:47 AM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347944012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.2347944012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.1226637364 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 2791018022 ps |
| CPU time | 20.2 seconds |
| Started | Sep 09 10:15:40 AM UTC 24 |
| Finished | Sep 09 10:16:02 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226637364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.1226637364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.2347946215 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 640559347 ps |
| CPU time | 5.12 seconds |
| Started | Sep 09 10:15:27 AM UTC 24 |
| Finished | Sep 09 10:15:33 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347946215 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.2347946215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.4069419942 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 591324712 ps |
| CPU time | 2.47 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:15:46 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4069419942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_t x_rx_disruption.4069419942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.2738558484 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 662958542 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:20:00 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 214952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2738558484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_ tx_rx_disruption.2738558484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.2254245740 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 591932108 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:20:00 AM UTC 24 |
| Finished | Sep 09 10:20:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2254245740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_ tx_rx_disruption.2254245740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.2449572158 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 619741948 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:20:00 AM UTC 24 |
| Finished | Sep 09 10:20:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2449572158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.2449572158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.4279436998 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 703661673 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4279436998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.4279436998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.691418222 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 579194584 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=691418222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_t x_rx_disruption.691418222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.2399254630 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 568001107 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2399254630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.2399254630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.1485029429 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 455941696 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1485029429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_ tx_rx_disruption.1485029429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.577119772 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 607348932 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=577119772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_t x_rx_disruption.577119772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.843218212 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 585984918 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=843218212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_t x_rx_disruption.843218212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.3159046085 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 526486971 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3159046085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.3159046085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.702777559 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 40842328 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:16:01 AM UTC 24 |
| Finished | Sep 09 10:16:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=702777559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.702777559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.979151950 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 5729845437 ps |
| CPU time | 9.13 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:15:53 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=979151950 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.979151950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.1662839087 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 15384681162 ps |
| CPU time | 18.51 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:16:03 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662839087 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.1662839087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.2311738925 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 24553515971 ps |
| CPU time | 44.71 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:16:29 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2311738925 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.2311738925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.1292856336 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 243039263 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:15:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292856336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.1292856336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.3450406395 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 198882331 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:15:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450406395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_bitstuff_err.3450406395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.2698280460 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 444813073 ps |
| CPU time | 2.74 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:15:47 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2698280460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.2698280460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.3046076782 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 400703487 ps |
| CPU time | 2.1 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:15:47 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3046076782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.3046076782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.3025113537 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 46827959644 ps |
| CPU time | 86.11 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:17:12 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025113537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.3025113537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.2041866620 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 1692213129 ps |
| CPU time | 37.85 seconds |
| Started | Sep 09 10:15:43 AM UTC 24 |
| Finished | Sep 09 10:16:23 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041866620 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.2041866620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.1656374216 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 463971962 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:15:46 AM UTC 24 |
| Finished | Sep 09 10:15:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656374216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.1656374216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.2964683264 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 141665456 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:15:46 AM UTC 24 |
| Finished | Sep 09 10:15:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964683264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.2964683264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_enable.3275688242 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 43395206 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:15:46 AM UTC 24 |
| Finished | Sep 09 10:15:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275688242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_enable.3275688242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.4090273737 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 1020694728 ps |
| CPU time | 3.45 seconds |
| Started | Sep 09 10:15:47 AM UTC 24 |
| Finished | Sep 09 10:15:52 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090273737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.4090273737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.893218773 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 218268437 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:15:47 AM UTC 24 |
| Finished | Sep 09 10:15:50 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=893218773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.893218773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.2572076773 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 155664320 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:15:48 AM UTC 24 |
| Finished | Sep 09 10:15:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572076773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_fifo_levels.2572076773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.233194556 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 562929810 ps |
| CPU time | 4.27 seconds |
| Started | Sep 09 10:15:48 AM UTC 24 |
| Finished | Sep 09 10:15:53 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=233194556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_fifo_rst.233194556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.1533416862 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 245823658 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:15:50 AM UTC 24 |
| Finished | Sep 09 10:15:52 AM UTC 24 |
| Peak memory | 233032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1533416862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.1533416862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.2865983761 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 146932120 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:15:50 AM UTC 24 |
| Finished | Sep 09 10:15:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865983761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_stall.2865983761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.3814793864 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 243612569 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:15:50 AM UTC 24 |
| Finished | Sep 09 10:15:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814793864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.3814793864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.2206358776 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 2202166047 ps |
| CPU time | 22.06 seconds |
| Started | Sep 09 10:15:48 AM UTC 24 |
| Finished | Sep 09 10:16:11 AM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206358776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.2206358776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.3592857837 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 13780920185 ps |
| CPU time | 92.42 seconds |
| Started | Sep 09 10:15:50 AM UTC 24 |
| Finished | Sep 09 10:17:24 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592857837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.3592857837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.3817487436 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 179583810 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:15:50 AM UTC 24 |
| Finished | Sep 09 10:15:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3817487436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.3817487436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.273883009 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 24956089631 ps |
| CPU time | 44.68 seconds |
| Started | Sep 09 10:15:50 AM UTC 24 |
| Finished | Sep 09 10:16:36 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=273883009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_link_resume.273883009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.2402648470 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 10685375282 ps |
| CPU time | 16.44 seconds |
| Started | Sep 09 10:15:50 AM UTC 24 |
| Finished | Sep 09 10:16:08 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402648470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_link_suspend.2402648470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.2468913363 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 5025942113 ps |
| CPU time | 36.73 seconds |
| Started | Sep 09 10:15:50 AM UTC 24 |
| Finished | Sep 09 10:16:28 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468913363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.2468913363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.1317210084 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 2091884075 ps |
| CPU time | 53.16 seconds |
| Started | Sep 09 10:15:52 AM UTC 24 |
| Finished | Sep 09 10:16:46 AM UTC 24 |
| Peak memory | 227492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1317210084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.1317210084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.1446388440 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 255703798 ps |
| CPU time | 1.84 seconds |
| Started | Sep 09 10:15:52 AM UTC 24 |
| Finished | Sep 09 10:15:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1446388440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.1446388440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.578557355 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 236678096 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:15:52 AM UTC 24 |
| Finished | Sep 09 10:15:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=578557355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.578557355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.2484148987 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 2812922493 ps |
| CPU time | 74.93 seconds |
| Started | Sep 09 10:15:52 AM UTC 24 |
| Finished | Sep 09 10:17:09 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484148987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.2484148987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.744087591 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 169199294 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:15:52 AM UTC 24 |
| Finished | Sep 09 10:15:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=744087591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.744087591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.1779811463 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 149567249 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:15:53 AM UTC 24 |
| Finished | Sep 09 10:15:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779811463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.1779811463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.719859829 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 215546873 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:15:53 AM UTC 24 |
| Finished | Sep 09 10:15:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=719859829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_nak_trans.719859829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.2977139913 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 156093110 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:15:53 AM UTC 24 |
| Finished | Sep 09 10:15:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977139913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_out_iso.2977139913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.3246675745 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 187093793 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:15:53 AM UTC 24 |
| Finished | Sep 09 10:15:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246675745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_out_stall.3246675745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.2398557015 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 180539728 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:15:54 AM UTC 24 |
| Finished | Sep 09 10:15:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398557015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.2398557015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.1802649061 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 148566796 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:15:54 AM UTC 24 |
| Finished | Sep 09 10:15:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802649061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_pending_in_trans.1802649061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.3334874042 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 268767178 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:15:55 AM UTC 24 |
| Finished | Sep 09 10:15:57 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3334874042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.3334874042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.3166421865 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 142434894 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:15:55 AM UTC 24 |
| Finished | Sep 09 10:15:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166421865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.3166421865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.3642026629 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 69681180 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:15:55 AM UTC 24 |
| Finished | Sep 09 10:15:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3642026629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.3642026629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.3452504378 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 10259402438 ps |
| CPU time | 33.06 seconds |
| Started | Sep 09 10:15:55 AM UTC 24 |
| Finished | Sep 09 10:16:30 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452504378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.3452504378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.3389294941 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 147135395 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:15:57 AM UTC 24 |
| Finished | Sep 09 10:15:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3389294941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.3389294941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.1095742298 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 222245333 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:15:57 AM UTC 24 |
| Finished | Sep 09 10:16:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1095742298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_pkt_sent.1095742298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.3089277946 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 239233006 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:15:57 AM UTC 24 |
| Finished | Sep 09 10:16:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089277946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_random_length_in_transaction.3089277946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.3476198509 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 179968035 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:15:57 AM UTC 24 |
| Finished | Sep 09 10:16:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476198509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.3476198509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.1764727116 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 140876883 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:15:57 AM UTC 24 |
| Finished | Sep 09 10:16:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764727116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.1764727116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.1522201392 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 275572937 ps |
| CPU time | 1.95 seconds |
| Started | Sep 09 10:15:57 AM UTC 24 |
| Finished | Sep 09 10:16:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1522201392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_rx_full.1522201392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.2039289667 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 189641981 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:15:57 AM UTC 24 |
| Finished | Sep 09 10:16:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039289667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_setup_stage.2039289667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.236406429 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 151612091 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:15:57 AM UTC 24 |
| Finished | Sep 09 10:16:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=236406429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 43.usbdev_setup_trans_ignored.236406429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.807765213 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 200493162 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:15:58 AM UTC 24 |
| Finished | Sep 09 10:16:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807765213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.807765213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.2484674204 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 1725175260 ps |
| CPU time | 17.65 seconds |
| Started | Sep 09 10:15:58 AM UTC 24 |
| Finished | Sep 09 10:16:18 AM UTC 24 |
| Peak memory | 229532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484674204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.2484674204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.3326422262 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 157500131 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:15:58 AM UTC 24 |
| Finished | Sep 09 10:16:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326422262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.3326422262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.656258385 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 203677155 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:15:58 AM UTC 24 |
| Finished | Sep 09 10:16:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=656258385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_stall_trans.656258385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.3097191168 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 1374980034 ps |
| CPU time | 5.7 seconds |
| Started | Sep 09 10:16:01 AM UTC 24 |
| Finished | Sep 09 10:16:08 AM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097191168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.3097191168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.2339600390 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 2566850654 ps |
| CPU time | 70.69 seconds |
| Started | Sep 09 10:16:01 AM UTC 24 |
| Finished | Sep 09 10:17:13 AM UTC 24 |
| Peak memory | 227268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339600390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.2339600390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.724334831 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 653511927 ps |
| CPU time | 6.27 seconds |
| Started | Sep 09 10:15:44 AM UTC 24 |
| Finished | Sep 09 10:15:51 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=724334831 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.724334831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.1720788043 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 473515269 ps |
| CPU time | 2.58 seconds |
| Started | Sep 09 10:16:01 AM UTC 24 |
| Finished | Sep 09 10:16:05 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1720788043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_t x_rx_disruption.1720788043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.1025667196 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 597452739 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1025667196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.1025667196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.1646860660 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 591058049 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1646860660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_ tx_rx_disruption.1646860660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.1344794632 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 609991500 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1344794632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_ tx_rx_disruption.1344794632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.723562552 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 490564777 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:20:02 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=723562552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_t x_rx_disruption.723562552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.483720658 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 478023294 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=483720658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_t x_rx_disruption.483720658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.3710051443 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 476297621 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3710051443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.3710051443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.625441689 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 537987170 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=625441689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_t x_rx_disruption.625441689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.2136183164 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 662784115 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:22 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2136183164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.2136183164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.1129456897 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 546322642 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:22 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1129456897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_ tx_rx_disruption.1129456897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.3892497783 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 583548799 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:22 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3892497783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.3892497783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.104044201 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 42740137 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:16:21 AM UTC 24 |
| Finished | Sep 09 10:16:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=104044201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.104044201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.3821212559 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 3621066740 ps |
| CPU time | 9.88 seconds |
| Started | Sep 09 10:16:01 AM UTC 24 |
| Finished | Sep 09 10:16:12 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821212559 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.3821212559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.3254990485 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 15320860462 ps |
| CPU time | 20.15 seconds |
| Started | Sep 09 10:16:01 AM UTC 24 |
| Finished | Sep 09 10:16:23 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254990485 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.3254990485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.2121659930 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 30296628842 ps |
| CPU time | 45.4 seconds |
| Started | Sep 09 10:16:01 AM UTC 24 |
| Finished | Sep 09 10:16:48 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121659930 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.2121659930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.3590485888 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 187968168 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:16:03 AM UTC 24 |
| Finished | Sep 09 10:16:05 AM UTC 24 |
| Peak memory | 216876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590485888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.3590485888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.4024626225 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 148702663 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:16:03 AM UTC 24 |
| Finished | Sep 09 10:16:05 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024626225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_bitstuff_err.4024626225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.4267704565 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 236121449 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:16:03 AM UTC 24 |
| Finished | Sep 09 10:16:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267704565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 44.usbdev_data_toggle_clear.4267704565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.1102638555 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 355350735 ps |
| CPU time | 2.12 seconds |
| Started | Sep 09 10:16:03 AM UTC 24 |
| Finished | Sep 09 10:16:06 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102638555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.1102638555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.569913870 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 46526538324 ps |
| CPU time | 86.74 seconds |
| Started | Sep 09 10:16:03 AM UTC 24 |
| Finished | Sep 09 10:17:32 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=569913870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_device_address.569913870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.146116937 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 3339261176 ps |
| CPU time | 28.73 seconds |
| Started | Sep 09 10:16:03 AM UTC 24 |
| Finished | Sep 09 10:16:33 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=146116937 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.146116937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.1736355202 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 711108728 ps |
| CPU time | 2.72 seconds |
| Started | Sep 09 10:16:05 AM UTC 24 |
| Finished | Sep 09 10:16:08 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736355202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.1736355202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.1644302472 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 148002890 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:16:05 AM UTC 24 |
| Finished | Sep 09 10:16:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644302472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.1644302472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_enable.806726557 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 39087654 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:16:05 AM UTC 24 |
| Finished | Sep 09 10:16:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=806726557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_enable.806726557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.3278934491 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 830183028 ps |
| CPU time | 3.37 seconds |
| Started | Sep 09 10:16:06 AM UTC 24 |
| Finished | Sep 09 10:16:11 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278934491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.3278934491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.1039416848 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 235217329 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:16:06 AM UTC 24 |
| Finished | Sep 09 10:16:09 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1039416848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.1039416848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.3560220100 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 310715217 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:16:06 AM UTC 24 |
| Finished | Sep 09 10:16:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560220100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_fifo_levels.3560220100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.2131942099 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 209538460 ps |
| CPU time | 1.92 seconds |
| Started | Sep 09 10:16:06 AM UTC 24 |
| Finished | Sep 09 10:16:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131942099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_fifo_rst.2131942099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.583658609 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 227376485 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:16:09 AM UTC 24 |
| Finished | Sep 09 10:16:11 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=583658609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.583658609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.2961892329 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 142880391 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:16:09 AM UTC 24 |
| Finished | Sep 09 10:16:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961892329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_stall.2961892329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.3840443154 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 218844497 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:16:09 AM UTC 24 |
| Finished | Sep 09 10:16:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840443154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.3840443154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.1557746103 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 2995269207 ps |
| CPU time | 20.32 seconds |
| Started | Sep 09 10:16:09 AM UTC 24 |
| Finished | Sep 09 10:16:30 AM UTC 24 |
| Peak memory | 234256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557746103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.1557746103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.2199119282 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 9898346037 ps |
| CPU time | 68.02 seconds |
| Started | Sep 09 10:16:09 AM UTC 24 |
| Finished | Sep 09 10:17:19 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199119282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.2199119282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.932317034 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 260993351 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:16:09 AM UTC 24 |
| Finished | Sep 09 10:16:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932317034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_link_in_err.932317034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.4185528971 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 5802065488 ps |
| CPU time | 11.99 seconds |
| Started | Sep 09 10:16:09 AM UTC 24 |
| Finished | Sep 09 10:16:22 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4185528971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.4185528971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.3674164500 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 8476413396 ps |
| CPU time | 17.81 seconds |
| Started | Sep 09 10:16:09 AM UTC 24 |
| Finished | Sep 09 10:16:28 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674164500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_link_suspend.3674164500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.303659029 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 2829149645 ps |
| CPU time | 20.7 seconds |
| Started | Sep 09 10:16:10 AM UTC 24 |
| Finished | Sep 09 10:16:32 AM UTC 24 |
| Peak memory | 234104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=303659029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.303659029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.507722286 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 291257639 ps |
| CPU time | 1.86 seconds |
| Started | Sep 09 10:16:10 AM UTC 24 |
| Finished | Sep 09 10:16:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=507722286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.507722286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.560865886 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 209771996 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:16:10 AM UTC 24 |
| Finished | Sep 09 10:16:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=560865886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.560865886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.4060645626 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 2725270601 ps |
| CPU time | 29.33 seconds |
| Started | Sep 09 10:16:10 AM UTC 24 |
| Finished | Sep 09 10:16:41 AM UTC 24 |
| Peak memory | 227648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060645626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.4060645626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.2625196891 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 153390977 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:16:10 AM UTC 24 |
| Finished | Sep 09 10:16:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625196891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.2625196891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.588233686 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 145844046 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:16:12 AM UTC 24 |
| Finished | Sep 09 10:16:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=588233686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.588233686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.415806759 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 150143081 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:16:12 AM UTC 24 |
| Finished | Sep 09 10:16:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415806759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_out_iso.415806759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.2926057573 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 182771292 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:16:12 AM UTC 24 |
| Finished | Sep 09 10:16:15 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926057573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.2926057573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.3144213629 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 156459370 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:16:12 AM UTC 24 |
| Finished | Sep 09 10:16:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3144213629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.3144213629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.2932778282 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 157501572 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:16:13 AM UTC 24 |
| Finished | Sep 09 10:16:16 AM UTC 24 |
| Peak memory | 214800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932778282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.2932778282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.978199426 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 230636737 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:16:13 AM UTC 24 |
| Finished | Sep 09 10:16:16 AM UTC 24 |
| Peak memory | 214660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=978199426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.978199426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.1515570977 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 144487196 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:16:13 AM UTC 24 |
| Finished | Sep 09 10:16:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515570977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.1515570977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.554535835 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 61699897 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:16:15 AM UTC 24 |
| Finished | Sep 09 10:16:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=554535835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_phy_pins_sense.554535835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.2245870204 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 8056555416 ps |
| CPU time | 22.44 seconds |
| Started | Sep 09 10:16:15 AM UTC 24 |
| Finished | Sep 09 10:16:39 AM UTC 24 |
| Peak memory | 234268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245870204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.2245870204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.1944424687 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 185659725 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:16:15 AM UTC 24 |
| Finished | Sep 09 10:16:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944424687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.1944424687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.438848912 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 265040383 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:16:16 AM UTC 24 |
| Finished | Sep 09 10:16:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=438848912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_pkt_sent.438848912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.3105897985 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 214863894 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:16:16 AM UTC 24 |
| Finished | Sep 09 10:16:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105897985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_random_length_in_transaction.3105897985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.3507945017 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 199441274 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:16:16 AM UTC 24 |
| Finished | Sep 09 10:16:19 AM UTC 24 |
| Peak memory | 214860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507945017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.3507945017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.1462093046 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 213570390 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:16:16 AM UTC 24 |
| Finished | Sep 09 10:16:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1462093046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.1462093046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.1031510614 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 332925773 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:16:16 AM UTC 24 |
| Finished | Sep 09 10:16:19 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1031510614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.1031510614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.1900553850 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 194040812 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:16:16 AM UTC 24 |
| Finished | Sep 09 10:16:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1900553850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.1900553850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.2574148998 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 160576893 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:16:18 AM UTC 24 |
| Finished | Sep 09 10:16:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574148998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.2574148998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.1430175320 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 220440683 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:16:18 AM UTC 24 |
| Finished | Sep 09 10:16:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1430175320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.1430175320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.1137836640 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 1880731965 ps |
| CPU time | 15.89 seconds |
| Started | Sep 09 10:16:18 AM UTC 24 |
| Finished | Sep 09 10:16:35 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1137836640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.1137836640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.2858604664 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 172665796 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:16:19 AM UTC 24 |
| Finished | Sep 09 10:16:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2858604664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.2858604664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.272693165 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 173758497 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:16:19 AM UTC 24 |
| Finished | Sep 09 10:16:21 AM UTC 24 |
| Peak memory | 214852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272693165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_stall_trans.272693165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.1937676093 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 251345514 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:16:20 AM UTC 24 |
| Finished | Sep 09 10:16:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1937676093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.1937676093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.3571271534 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 3351937163 ps |
| CPU time | 84.18 seconds |
| Started | Sep 09 10:16:19 AM UTC 24 |
| Finished | Sep 09 10:17:45 AM UTC 24 |
| Peak memory | 227888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571271534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.3571271534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.1588670222 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 875788512 ps |
| CPU time | 20.37 seconds |
| Started | Sep 09 10:16:05 AM UTC 24 |
| Finished | Sep 09 10:16:26 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588670222 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.1588670222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.3635801771 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 494971377 ps |
| CPU time | 1.91 seconds |
| Started | Sep 09 10:16:21 AM UTC 24 |
| Finished | Sep 09 10:16:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3635801771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.3635801771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.1690817410 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 577646234 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1690817410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.1690817410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.1710939130 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 471604915 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1710939130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.1710939130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.1112034219 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 587156053 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1112034219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_ tx_rx_disruption.1112034219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.83856868 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 534402701 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=83856868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_tx _rx_disruption.83856868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.3838211931 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 541709459 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3838211931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_ tx_rx_disruption.3838211931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.3148720424 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 554741880 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3148720424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_ tx_rx_disruption.3148720424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.3642581970 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 471325554 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3642581970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.3642581970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.391985863 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 459129259 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=391985863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_t x_rx_disruption.391985863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.534046593 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 615963721 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=534046593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_t x_rx_disruption.534046593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.487972582 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 482086094 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=487972582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_t x_rx_disruption.487972582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.2749736785 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 35673723 ps |
| CPU time | 0.89 seconds |
| Started | Sep 09 10:16:38 AM UTC 24 |
| Finished | Sep 09 10:16:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2749736785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.2749736785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.2987670783 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 6037786297 ps |
| CPU time | 9.06 seconds |
| Started | Sep 09 10:16:21 AM UTC 24 |
| Finished | Sep 09 10:16:31 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987670783 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.2987670783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.4047179854 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 14415020330 ps |
| CPU time | 21.11 seconds |
| Started | Sep 09 10:16:21 AM UTC 24 |
| Finished | Sep 09 10:16:43 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4047179854 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.4047179854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.1151748673 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 24666514147 ps |
| CPU time | 39.96 seconds |
| Started | Sep 09 10:16:21 AM UTC 24 |
| Finished | Sep 09 10:17:02 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1151748673 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.1151748673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.2020209589 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 207460013 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:16:21 AM UTC 24 |
| Finished | Sep 09 10:16:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020209589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.2020209589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.1908599318 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 188117244 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:16:23 AM UTC 24 |
| Finished | Sep 09 10:16:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908599318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.1908599318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.2844472583 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 229295023 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:16:23 AM UTC 24 |
| Finished | Sep 09 10:16:26 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844472583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.2844472583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.449431990 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 1097984341 ps |
| CPU time | 4.03 seconds |
| Started | Sep 09 10:16:24 AM UTC 24 |
| Finished | Sep 09 10:16:29 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=449431990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.449431990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.1061031712 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 22785226932 ps |
| CPU time | 45.08 seconds |
| Started | Sep 09 10:16:24 AM UTC 24 |
| Finished | Sep 09 10:17:10 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061031712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_address.1061031712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.739835099 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 920406964 ps |
| CPU time | 17.28 seconds |
| Started | Sep 09 10:16:24 AM UTC 24 |
| Finished | Sep 09 10:16:42 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=739835099 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.739835099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.94405753 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 871215434 ps |
| CPU time | 3.72 seconds |
| Started | Sep 09 10:16:24 AM UTC 24 |
| Finished | Sep 09 10:16:28 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=94405753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_disable_endpoint.94405753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.53039361 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 152876856 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:16:24 AM UTC 24 |
| Finished | Sep 09 10:16:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=53039361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_disconnected.53039361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_enable.1449203137 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 37232471 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:16:25 AM UTC 24 |
| Finished | Sep 09 10:16:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449203137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_enable.1449203137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.2164422354 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 938151736 ps |
| CPU time | 3.92 seconds |
| Started | Sep 09 10:16:25 AM UTC 24 |
| Finished | Sep 09 10:16:30 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164422354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.2164422354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.1729279136 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 432384064 ps |
| CPU time | 2.48 seconds |
| Started | Sep 09 10:16:25 AM UTC 24 |
| Finished | Sep 09 10:16:29 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729279136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.1729279136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.1106051880 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 284978808 ps |
| CPU time | 2 seconds |
| Started | Sep 09 10:16:25 AM UTC 24 |
| Finished | Sep 09 10:16:29 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106051880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_fifo_levels.1106051880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.1967478586 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 288215774 ps |
| CPU time | 3.28 seconds |
| Started | Sep 09 10:16:25 AM UTC 24 |
| Finished | Sep 09 10:16:30 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967478586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.1967478586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.1822605476 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 245575279 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 10:16:27 AM UTC 24 |
| Finished | Sep 09 10:16:30 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822605476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.1822605476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.3564651968 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 176103291 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:16:27 AM UTC 24 |
| Finished | Sep 09 10:16:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564651968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.3564651968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.3739124019 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 204160100 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:16:27 AM UTC 24 |
| Finished | Sep 09 10:16:30 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739124019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.3739124019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.4128992150 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 4499479870 ps |
| CPU time | 45.78 seconds |
| Started | Sep 09 10:16:27 AM UTC 24 |
| Finished | Sep 09 10:17:14 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128992150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.4128992150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.4179290 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 7079458797 ps |
| CPU time | 87.38 seconds |
| Started | Sep 09 10:16:27 AM UTC 24 |
| Finished | Sep 09 10:17:57 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4179290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverag e/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.4179290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.2572331044 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 234782480 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:16:28 AM UTC 24 |
| Finished | Sep 09 10:16:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572331044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_in_err.2572331044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.4024756343 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 10203461722 ps |
| CPU time | 16.3 seconds |
| Started | Sep 09 10:16:30 AM UTC 24 |
| Finished | Sep 09 10:16:48 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024756343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_resume.4024756343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.2897059878 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 5356146726 ps |
| CPU time | 9.76 seconds |
| Started | Sep 09 10:16:30 AM UTC 24 |
| Finished | Sep 09 10:16:41 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2897059878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.2897059878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.3662598991 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 5193605079 ps |
| CPU time | 52.83 seconds |
| Started | Sep 09 10:16:30 AM UTC 24 |
| Finished | Sep 09 10:17:24 AM UTC 24 |
| Peak memory | 234196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3662598991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.3662598991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.3524623228 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 2567763025 ps |
| CPU time | 23.55 seconds |
| Started | Sep 09 10:16:30 AM UTC 24 |
| Finished | Sep 09 10:16:55 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524623228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.3524623228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.3656583222 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 275566078 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:16:30 AM UTC 24 |
| Finished | Sep 09 10:16:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656583222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.3656583222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.971022414 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 239278897 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:16:30 AM UTC 24 |
| Finished | Sep 09 10:16:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=971022414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.971022414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.2733858856 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 2857689695 ps |
| CPU time | 22.18 seconds |
| Started | Sep 09 10:16:32 AM UTC 24 |
| Finished | Sep 09 10:16:56 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733858856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.2733858856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.621391956 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 145742344 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:16:32 AM UTC 24 |
| Finished | Sep 09 10:16:35 AM UTC 24 |
| Peak memory | 214784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=621391956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.621391956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.870947676 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 161591846 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:16:32 AM UTC 24 |
| Finished | Sep 09 10:16:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=870947676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.870947676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.1416426316 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 208804408 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:16:32 AM UTC 24 |
| Finished | Sep 09 10:16:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1416426316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_nak_trans.1416426316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.1257004392 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 178508110 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:16:32 AM UTC 24 |
| Finished | Sep 09 10:16:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1257004392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.1257004392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.1386080632 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 197734720 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:16:32 AM UTC 24 |
| Finished | Sep 09 10:16:34 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386080632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_out_stall.1386080632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.2535810990 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 217827262 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:16:32 AM UTC 24 |
| Finished | Sep 09 10:16:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2535810990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.2535810990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.2325730233 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 161576754 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:16:32 AM UTC 24 |
| Finished | Sep 09 10:16:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325730233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.2325730233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.2876025468 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 231962207 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:16:32 AM UTC 24 |
| Finished | Sep 09 10:16:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876025468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.2876025468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.144156282 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 205209606 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:16:33 AM UTC 24 |
| Finished | Sep 09 10:16:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144156282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.144156282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.3275944848 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 49006361 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:16:35 AM UTC 24 |
| Finished | Sep 09 10:16:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275944848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.3275944848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.3643652987 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 15265527079 ps |
| CPU time | 40.23 seconds |
| Started | Sep 09 10:16:35 AM UTC 24 |
| Finished | Sep 09 10:17:17 AM UTC 24 |
| Peak memory | 234200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643652987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_pkt_buffer.3643652987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.2091684647 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 223513477 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:16:35 AM UTC 24 |
| Finished | Sep 09 10:16:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2091684647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.2091684647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.1413719948 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 170863966 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:16:35 AM UTC 24 |
| Finished | Sep 09 10:16:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1413719948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.1413719948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.1228513531 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 202695529 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:16:36 AM UTC 24 |
| Finished | Sep 09 10:16:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1228513531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_random_length_in_transaction.1228513531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.12338391 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 155323904 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:16:36 AM UTC 24 |
| Finished | Sep 09 10:16:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12338391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.12338391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.2705718776 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 133245955 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:16:36 AM UTC 24 |
| Finished | Sep 09 10:16:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2705718776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.2705718776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.2221599064 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 416732604 ps |
| CPU time | 1.88 seconds |
| Started | Sep 09 10:16:36 AM UTC 24 |
| Finished | Sep 09 10:16:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221599064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.2221599064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.1558020847 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 167099351 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:16:36 AM UTC 24 |
| Finished | Sep 09 10:16:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558020847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_setup_stage.1558020847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.2597894046 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 153515136 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:16:36 AM UTC 24 |
| Finished | Sep 09 10:16:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597894046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.2597894046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.3910385929 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 229843322 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:16:36 AM UTC 24 |
| Finished | Sep 09 10:16:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3910385929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.3910385929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.2325347771 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 3277151688 ps |
| CPU time | 32.09 seconds |
| Started | Sep 09 10:16:37 AM UTC 24 |
| Finished | Sep 09 10:17:11 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325347771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.2325347771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.799341336 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 166643709 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:16:37 AM UTC 24 |
| Finished | Sep 09 10:16:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799341336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.799341336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.4171812558 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 160285104 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:16:37 AM UTC 24 |
| Finished | Sep 09 10:16:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4171812558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_stall_trans.4171812558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.3479981498 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 454340718 ps |
| CPU time | 2.46 seconds |
| Started | Sep 09 10:16:37 AM UTC 24 |
| Finished | Sep 09 10:16:41 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479981498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.3479981498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.1239522516 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 2849332810 ps |
| CPU time | 27.48 seconds |
| Started | Sep 09 10:16:37 AM UTC 24 |
| Finished | Sep 09 10:17:06 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239522516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.1239522516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.3013399235 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 569553950 ps |
| CPU time | 11.76 seconds |
| Started | Sep 09 10:16:24 AM UTC 24 |
| Finished | Sep 09 10:16:36 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013399235 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.3013399235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.563580106 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 434630774 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:16:38 AM UTC 24 |
| Finished | Sep 09 10:16:40 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=563580106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_tx _rx_disruption.563580106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.2980732602 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 601697847 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2980732602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_ tx_rx_disruption.2980732602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.1705499106 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 454469374 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1705499106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.1705499106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.4247993588 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 526076053 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4247993588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.4247993588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.1633557695 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 598223361 ps |
| CPU time | 2.13 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1633557695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.1633557695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.3048005948 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 567498913 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:20:03 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3048005948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_ tx_rx_disruption.3048005948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.657854003 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 619239459 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:20:05 AM UTC 24 |
| Finished | Sep 09 10:20:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=657854003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_t x_rx_disruption.657854003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.2312804425 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 503866358 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:20:05 AM UTC 24 |
| Finished | Sep 09 10:20:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2312804425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_ tx_rx_disruption.2312804425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.1741170797 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 552576452 ps |
| CPU time | 1.86 seconds |
| Started | Sep 09 10:20:05 AM UTC 24 |
| Finished | Sep 09 10:20:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1741170797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.1741170797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.85949557 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 555434706 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=85949557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_tx _rx_disruption.85949557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.111078541 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 451008843 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=111078541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_t x_rx_disruption.111078541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.3557908569 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 47778025 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:16:52 AM UTC 24 |
| Finished | Sep 09 10:16:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557908569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.3557908569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.718867651 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 4372553859 ps |
| CPU time | 6.88 seconds |
| Started | Sep 09 10:16:38 AM UTC 24 |
| Finished | Sep 09 10:16:46 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=718867651 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.718867651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.4074020805 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 13713452687 ps |
| CPU time | 18.44 seconds |
| Started | Sep 09 10:16:39 AM UTC 24 |
| Finished | Sep 09 10:16:59 AM UTC 24 |
| Peak memory | 227448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074020805 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.4074020805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.3536555273 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 29526493407 ps |
| CPU time | 48.62 seconds |
| Started | Sep 09 10:16:39 AM UTC 24 |
| Finished | Sep 09 10:17:29 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3536555273 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.3536555273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.1739376318 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 161377356 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:16:39 AM UTC 24 |
| Finished | Sep 09 10:16:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1739376318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.1739376318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.3630953331 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 144057422 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:16:39 AM UTC 24 |
| Finished | Sep 09 10:16:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630953331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.3630953331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.394471012 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 246078264 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:16:39 AM UTC 24 |
| Finished | Sep 09 10:16:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=394471012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_data_toggle_clear.394471012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.2104909554 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 726220588 ps |
| CPU time | 2.47 seconds |
| Started | Sep 09 10:16:39 AM UTC 24 |
| Finished | Sep 09 10:16:43 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104909554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.2104909554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.3905255855 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 33667834303 ps |
| CPU time | 71.77 seconds |
| Started | Sep 09 10:16:39 AM UTC 24 |
| Finished | Sep 09 10:17:53 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3905255855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.3905255855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.2643433491 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 1184496225 ps |
| CPU time | 24.04 seconds |
| Started | Sep 09 10:16:39 AM UTC 24 |
| Finished | Sep 09 10:17:05 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2643433491 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.2643433491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.110514610 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 823743258 ps |
| CPU time | 2.26 seconds |
| Started | Sep 09 10:16:40 AM UTC 24 |
| Finished | Sep 09 10:16:43 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=110514610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_disable_endpoint.110514610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.2113201324 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 140268419 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 10:16:41 AM UTC 24 |
| Finished | Sep 09 10:16:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113201324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.2113201324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_enable.3321772513 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 45051741 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:16:41 AM UTC 24 |
| Finished | Sep 09 10:16:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321772513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.3321772513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.176198588 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 867142378 ps |
| CPU time | 2.54 seconds |
| Started | Sep 09 10:16:41 AM UTC 24 |
| Finished | Sep 09 10:16:45 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=176198588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.176198588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.125974068 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 246892476 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:16:41 AM UTC 24 |
| Finished | Sep 09 10:16:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=125974068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.125974068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.2651477992 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 171685197 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:16:41 AM UTC 24 |
| Finished | Sep 09 10:16:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2651477992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_fifo_levels.2651477992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.2928427594 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 273705193 ps |
| CPU time | 1.99 seconds |
| Started | Sep 09 10:16:42 AM UTC 24 |
| Finished | Sep 09 10:16:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928427594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.2928427594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.1668086928 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 189894479 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:16:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668086928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.1668086928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.426933522 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 175341331 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:16:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=426933522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_in_stall.426933522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.4228684783 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 304108259 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:16:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4228684783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.4228684783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.1848733972 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 4452710060 ps |
| CPU time | 33.77 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:17:19 AM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848733972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.1848733972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.2618309580 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 11535273024 ps |
| CPU time | 79.97 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:18:06 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2618309580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.2618309580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.1215584837 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 263522926 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:16:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215584837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.1215584837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.799625177 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 7073733007 ps |
| CPU time | 9.92 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:16:55 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799625177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_link_resume.799625177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.2506997126 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 3330114996 ps |
| CPU time | 6.21 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:16:51 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2506997126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_link_suspend.2506997126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.1571676817 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 3945958018 ps |
| CPU time | 104.43 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:18:31 AM UTC 24 |
| Peak memory | 227716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571676817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.1571676817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.2537388701 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 3840850784 ps |
| CPU time | 102.52 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:18:29 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537388701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.2537388701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.631030482 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 237133397 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:16:44 AM UTC 24 |
| Finished | Sep 09 10:16:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=631030482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.631030482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.1937826577 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 201456732 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:16:46 AM UTC 24 |
| Finished | Sep 09 10:16:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1937826577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.1937826577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.568042580 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 2569952619 ps |
| CPU time | 20.52 seconds |
| Started | Sep 09 10:16:46 AM UTC 24 |
| Finished | Sep 09 10:17:07 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=568042580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.568042580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.2271250205 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 150159998 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:16:46 AM UTC 24 |
| Finished | Sep 09 10:16:48 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2271250205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.2271250205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.813292214 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 141657275 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:16:46 AM UTC 24 |
| Finished | Sep 09 10:16:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=813292214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.813292214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.2820518400 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 194956956 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:16:46 AM UTC 24 |
| Finished | Sep 09 10:16:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820518400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.2820518400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.1316343884 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 187960277 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:16:46 AM UTC 24 |
| Finished | Sep 09 10:16:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316343884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_iso.1316343884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.2533220454 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 188131843 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:16:46 AM UTC 24 |
| Finished | Sep 09 10:16:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533220454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.2533220454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.428621933 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 176840422 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:16:46 AM UTC 24 |
| Finished | Sep 09 10:16:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=428621933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_out_trans_nak.428621933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.3980402135 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 166143059 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:16:48 AM UTC 24 |
| Finished | Sep 09 10:16:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980402135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_pending_in_trans.3980402135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.3716205944 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 202046860 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:16:48 AM UTC 24 |
| Finished | Sep 09 10:16:50 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3716205944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.3716205944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.3959674624 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 153479011 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:16:48 AM UTC 24 |
| Finished | Sep 09 10:16:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959674624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.3959674624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.722904632 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 57745019 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:16:48 AM UTC 24 |
| Finished | Sep 09 10:16:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722904632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_phy_pins_sense.722904632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.2393298541 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 11930682524 ps |
| CPU time | 28.17 seconds |
| Started | Sep 09 10:16:48 AM UTC 24 |
| Finished | Sep 09 10:17:17 AM UTC 24 |
| Peak memory | 231564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393298541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.2393298541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.1637594008 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 155549564 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:16:48 AM UTC 24 |
| Finished | Sep 09 10:16:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637594008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.1637594008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.3065895998 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 225208930 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:16:48 AM UTC 24 |
| Finished | Sep 09 10:16:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3065895998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.3065895998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.3828895705 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 176786068 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:16:48 AM UTC 24 |
| Finished | Sep 09 10:16:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3828895705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.3828895705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.4269688451 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 158858251 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:16:50 AM UTC 24 |
| Finished | Sep 09 10:16:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269688451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.4269688451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.772695918 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 136040346 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:16:50 AM UTC 24 |
| Finished | Sep 09 10:16:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=772695918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_rx_crc_err.772695918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.2332782337 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 341466281 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:16:50 AM UTC 24 |
| Finished | Sep 09 10:16:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332782337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.2332782337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.1017779989 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 210140537 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:16:50 AM UTC 24 |
| Finished | Sep 09 10:16:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017779989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.1017779989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.1770741666 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 155311470 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:16:50 AM UTC 24 |
| Finished | Sep 09 10:16:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1770741666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.1770741666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.1524971534 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 230929206 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:16:50 AM UTC 24 |
| Finished | Sep 09 10:16:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1524971534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.1524971534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.3281225362 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 3027381046 ps |
| CPU time | 21.93 seconds |
| Started | Sep 09 10:16:50 AM UTC 24 |
| Finished | Sep 09 10:17:13 AM UTC 24 |
| Peak memory | 229720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3281225362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.3281225362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.2498189364 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 155409087 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:16:50 AM UTC 24 |
| Finished | Sep 09 10:16:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2498189364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.2498189364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.953317210 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 211518172 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:16:50 AM UTC 24 |
| Finished | Sep 09 10:16:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=953317210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_stall_trans.953317210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.556933660 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 578776210 ps |
| CPU time | 2.32 seconds |
| Started | Sep 09 10:16:52 AM UTC 24 |
| Finished | Sep 09 10:16:55 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=556933660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_stream_len_max.556933660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.1812215650 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 3509185361 ps |
| CPU time | 28 seconds |
| Started | Sep 09 10:16:52 AM UTC 24 |
| Finished | Sep 09 10:17:21 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812215650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.1812215650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.3424575238 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 160914819 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:16:40 AM UTC 24 |
| Finished | Sep 09 10:16:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3424575238 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.3424575238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.30755574 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 579684790 ps |
| CPU time | 3.15 seconds |
| Started | Sep 09 10:16:52 AM UTC 24 |
| Finished | Sep 09 10:16:56 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=30755574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_tx_ rx_disruption.30755574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.4241505912 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 648579499 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4241505912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.4241505912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.2696854457 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 502948821 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2696854457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.2696854457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.311101339 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 646357548 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=311101339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_t x_rx_disruption.311101339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.1845008934 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 588066686 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1845008934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.1845008934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.1144844110 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 506037403 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:10 AM UTC 24 |
| Peak memory | 216504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1144844110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_ tx_rx_disruption.1144844110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.3108922745 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 532523747 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3108922745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_ tx_rx_disruption.3108922745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.2883798846 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 437456231 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:09 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2883798846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_ tx_rx_disruption.2883798846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.2287426374 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 467719707 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:19 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2287426374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_ tx_rx_disruption.2287426374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.2420157049 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 484910882 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:10 AM UTC 24 |
| Peak memory | 216436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2420157049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_ tx_rx_disruption.2420157049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.3275970183 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 573708640 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3275970183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.3275970183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.2150385249 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 62284273 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:17:10 AM UTC 24 |
| Finished | Sep 09 10:17:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150385249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.2150385249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.78857954 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 10454465055 ps |
| CPU time | 16.59 seconds |
| Started | Sep 09 10:16:52 AM UTC 24 |
| Finished | Sep 09 10:17:09 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=78857954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.78857954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.1488713075 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 18406590179 ps |
| CPU time | 25.11 seconds |
| Started | Sep 09 10:16:52 AM UTC 24 |
| Finished | Sep 09 10:17:18 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488713075 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.1488713075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.249057865 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 31464368424 ps |
| CPU time | 54.7 seconds |
| Started | Sep 09 10:16:52 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=249057865 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.249057865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.2917073103 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 143280037 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:16:53 AM UTC 24 |
| Finished | Sep 09 10:16:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917073103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.2917073103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.931208520 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 156806703 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:16:53 AM UTC 24 |
| Finished | Sep 09 10:16:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=931208520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_bitstuff_err.931208520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.1581198504 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 304533797 ps |
| CPU time | 1.99 seconds |
| Started | Sep 09 10:16:53 AM UTC 24 |
| Finished | Sep 09 10:16:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581198504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 47.usbdev_data_toggle_clear.1581198504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.3224751113 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 920222708 ps |
| CPU time | 3.07 seconds |
| Started | Sep 09 10:16:54 AM UTC 24 |
| Finished | Sep 09 10:16:58 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3224751113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.3224751113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.2765214792 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 37804378460 ps |
| CPU time | 70.46 seconds |
| Started | Sep 09 10:16:54 AM UTC 24 |
| Finished | Sep 09 10:18:06 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765214792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.2765214792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.543387005 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 3867548671 ps |
| CPU time | 31.89 seconds |
| Started | Sep 09 10:16:54 AM UTC 24 |
| Finished | Sep 09 10:17:27 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=543387005 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.543387005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.433261741 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 584941212 ps |
| CPU time | 2.75 seconds |
| Started | Sep 09 10:16:54 AM UTC 24 |
| Finished | Sep 09 10:16:58 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=433261741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_disable_endpoint.433261741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.819330804 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 148845462 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:16:54 AM UTC 24 |
| Finished | Sep 09 10:16:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=819330804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_disconnected.819330804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_enable.1264260148 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 77654729 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:16:55 AM UTC 24 |
| Finished | Sep 09 10:16:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1264260148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_enable.1264260148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.971824929 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 907109487 ps |
| CPU time | 4.59 seconds |
| Started | Sep 09 10:16:55 AM UTC 24 |
| Finished | Sep 09 10:17:01 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=971824929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.971824929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.2833022850 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 210375437 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:16:57 AM UTC 24 |
| Finished | Sep 09 10:16:59 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833022850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.2833022850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.1124826008 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 257187414 ps |
| CPU time | 1.88 seconds |
| Started | Sep 09 10:16:57 AM UTC 24 |
| Finished | Sep 09 10:17:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124826008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_fifo_levels.1124826008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.1070232354 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 445590194 ps |
| CPU time | 3.15 seconds |
| Started | Sep 09 10:16:57 AM UTC 24 |
| Finished | Sep 09 10:17:01 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070232354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.1070232354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.3802781370 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 166409899 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:16:57 AM UTC 24 |
| Finished | Sep 09 10:16:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802781370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.3802781370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.923038873 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 145429435 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:16:57 AM UTC 24 |
| Finished | Sep 09 10:16:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=923038873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_in_stall.923038873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.750690087 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 219550556 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:16:57 AM UTC 24 |
| Finished | Sep 09 10:17:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=750690087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_in_trans.750690087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.862473303 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 3877403354 ps |
| CPU time | 26.69 seconds |
| Started | Sep 09 10:16:57 AM UTC 24 |
| Finished | Sep 09 10:17:25 AM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=862473303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.862473303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.401384383 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 10242524237 ps |
| CPU time | 68.59 seconds |
| Started | Sep 09 10:16:57 AM UTC 24 |
| Finished | Sep 09 10:18:07 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=401384383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.401384383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.2160539636 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 291680777 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:16:58 AM UTC 24 |
| Finished | Sep 09 10:17:01 AM UTC 24 |
| Peak memory | 214788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160539636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.2160539636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.1989315165 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 31062458426 ps |
| CPU time | 53.15 seconds |
| Started | Sep 09 10:16:58 AM UTC 24 |
| Finished | Sep 09 10:17:53 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989315165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_resume.1989315165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.1315338504 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 9940513754 ps |
| CPU time | 14.38 seconds |
| Started | Sep 09 10:16:58 AM UTC 24 |
| Finished | Sep 09 10:17:14 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315338504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_link_suspend.1315338504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.3159149906 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 3474152445 ps |
| CPU time | 87.69 seconds |
| Started | Sep 09 10:16:59 AM UTC 24 |
| Finished | Sep 09 10:18:28 AM UTC 24 |
| Peak memory | 227676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159149906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.3159149906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.552116148 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 1891940348 ps |
| CPU time | 18.07 seconds |
| Started | Sep 09 10:17:00 AM UTC 24 |
| Finished | Sep 09 10:17:19 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=552116148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.552116148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.1633955463 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 241770125 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:17:00 AM UTC 24 |
| Finished | Sep 09 10:17:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633955463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.1633955463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.1313820495 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 182894617 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:17:00 AM UTC 24 |
| Finished | Sep 09 10:17:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1313820495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.1313820495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.1211738712 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 2701475745 ps |
| CPU time | 20.78 seconds |
| Started | Sep 09 10:17:01 AM UTC 24 |
| Finished | Sep 09 10:17:23 AM UTC 24 |
| Peak memory | 234180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211738712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.1211738712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.2239612894 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 149979402 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:17:01 AM UTC 24 |
| Finished | Sep 09 10:17:04 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239612894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.2239612894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.4237584611 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 152485144 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:17:01 AM UTC 24 |
| Finished | Sep 09 10:17:04 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237584611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.4237584611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.1274007067 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 209018042 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:17:01 AM UTC 24 |
| Finished | Sep 09 10:17:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274007067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.1274007067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.1326431253 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 189111491 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:17:03 AM UTC 24 |
| Finished | Sep 09 10:17:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326431253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_out_iso.1326431253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.382696907 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 172047860 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:17:03 AM UTC 24 |
| Finished | Sep 09 10:17:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=382696907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_out_stall.382696907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.2152850174 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 176708174 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:17:03 AM UTC 24 |
| Finished | Sep 09 10:17:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152850174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.2152850174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.2127472603 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 167648602 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:17:03 AM UTC 24 |
| Finished | Sep 09 10:17:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2127472603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.2127472603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.540010601 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 233720974 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:17:03 AM UTC 24 |
| Finished | Sep 09 10:17:06 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=540010601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.540010601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.277441749 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 147570777 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:17:04 AM UTC 24 |
| Finished | Sep 09 10:17:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=277441749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.277441749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.4139614536 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 35485796 ps |
| CPU time | 1.07 seconds |
| Started | Sep 09 10:17:04 AM UTC 24 |
| Finished | Sep 09 10:17:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139614536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.4139614536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.2978253026 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 19646727197 ps |
| CPU time | 54.42 seconds |
| Started | Sep 09 10:17:04 AM UTC 24 |
| Finished | Sep 09 10:18:01 AM UTC 24 |
| Peak memory | 227448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978253026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_pkt_buffer.2978253026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.669537017 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 191616807 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:17:04 AM UTC 24 |
| Finished | Sep 09 10:17:07 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669537017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_pkt_received.669537017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.3071897338 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 242435269 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:17:06 AM UTC 24 |
| Finished | Sep 09 10:17:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071897338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.3071897338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.1447306537 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 258145764 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:17:06 AM UTC 24 |
| Finished | Sep 09 10:17:09 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447306537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_random_length_in_transaction.1447306537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.2855413064 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 174558127 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:17:06 AM UTC 24 |
| Finished | Sep 09 10:17:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855413064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.2855413064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.327477677 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 171340591 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:17:06 AM UTC 24 |
| Finished | Sep 09 10:17:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327477677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_rx_crc_err.327477677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.1742966260 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 250914862 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:17:06 AM UTC 24 |
| Finished | Sep 09 10:17:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1742966260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.1742966260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.3044951647 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 156046064 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:17:06 AM UTC 24 |
| Finished | Sep 09 10:17:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044951647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_setup_stage.3044951647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.2253447477 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 164063887 ps |
| CPU time | 0.96 seconds |
| Started | Sep 09 10:17:06 AM UTC 24 |
| Finished | Sep 09 10:17:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253447477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 47.usbdev_setup_trans_ignored.2253447477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.1473505159 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 202312553 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:17:08 AM UTC 24 |
| Finished | Sep 09 10:17:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1473505159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.1473505159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.1312464310 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 3354939388 ps |
| CPU time | 83.95 seconds |
| Started | Sep 09 10:17:08 AM UTC 24 |
| Finished | Sep 09 10:18:34 AM UTC 24 |
| Peak memory | 233988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312464310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.1312464310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.1837275737 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 162828953 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:17:08 AM UTC 24 |
| Finished | Sep 09 10:17:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1837275737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.1837275737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.1145565061 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 205468492 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:17:08 AM UTC 24 |
| Finished | Sep 09 10:17:11 AM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1145565061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.1145565061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.3645376519 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 541204063 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 10:17:08 AM UTC 24 |
| Finished | Sep 09 10:17:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3645376519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.3645376519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.4229829291 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 3399798271 ps |
| CPU time | 26.96 seconds |
| Started | Sep 09 10:17:08 AM UTC 24 |
| Finished | Sep 09 10:17:37 AM UTC 24 |
| Peak memory | 227728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229829291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.4229829291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.963358289 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 2013448991 ps |
| CPU time | 16.61 seconds |
| Started | Sep 09 10:16:54 AM UTC 24 |
| Finished | Sep 09 10:17:11 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=963358289 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.963358289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.3404601544 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 474801323 ps |
| CPU time | 2.44 seconds |
| Started | Sep 09 10:17:10 AM UTC 24 |
| Finished | Sep 09 10:17:14 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3404601544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_t x_rx_disruption.3404601544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.1210637278 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 509826406 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1210637278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_ tx_rx_disruption.1210637278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.212576759 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 613049033 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=212576759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_t x_rx_disruption.212576759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.2390785836 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 531637243 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:20:07 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2390785836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_ tx_rx_disruption.2390785836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.1326722126 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 626358494 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:20:11 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 214728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1326722126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.1326722126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.36488543 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 561537098 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:20:11 AM UTC 24 |
| Finished | Sep 09 10:20:21 AM UTC 24 |
| Peak memory | 214688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=36488543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_tx _rx_disruption.36488543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.3133751294 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 561755870 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:20:11 AM UTC 24 |
| Finished | Sep 09 10:20:21 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3133751294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.3133751294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.3384943876 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 491254120 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:20:11 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3384943876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_ tx_rx_disruption.3384943876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.887719626 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 568968877 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:20:11 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=887719626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_t x_rx_disruption.887719626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.2592181406 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 709956331 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:20:11 AM UTC 24 |
| Finished | Sep 09 10:20:21 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2592181406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.2592181406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.3966010580 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 674133154 ps |
| CPU time | 1.62 seconds |
| Started | Sep 09 10:20:11 AM UTC 24 |
| Finished | Sep 09 10:20:21 AM UTC 24 |
| Peak memory | 217136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3966010580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_ tx_rx_disruption.3966010580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.883668588 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 50922552 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:17:24 AM UTC 24 |
| Finished | Sep 09 10:17:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=883668588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.883668588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.526994540 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 9559834727 ps |
| CPU time | 15.76 seconds |
| Started | Sep 09 10:17:10 AM UTC 24 |
| Finished | Sep 09 10:17:27 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=526994540 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.526994540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.3546063258 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 20531340078 ps |
| CPU time | 32.22 seconds |
| Started | Sep 09 10:17:10 AM UTC 24 |
| Finished | Sep 09 10:17:44 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546063258 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.3546063258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.640160224 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 24308872971 ps |
| CPU time | 34.14 seconds |
| Started | Sep 09 10:17:10 AM UTC 24 |
| Finished | Sep 09 10:17:46 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=640160224 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.640160224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.4153856065 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 150597782 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:17:10 AM UTC 24 |
| Finished | Sep 09 10:17:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4153856065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.4153856065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.493925043 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 167620375 ps |
| CPU time | 0.88 seconds |
| Started | Sep 09 10:17:10 AM UTC 24 |
| Finished | Sep 09 10:17:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=493925043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_bitstuff_err.493925043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.1566087159 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 287452913 ps |
| CPU time | 1.92 seconds |
| Started | Sep 09 10:17:10 AM UTC 24 |
| Finished | Sep 09 10:17:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566087159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 48.usbdev_data_toggle_clear.1566087159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.91753857 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 1039671281 ps |
| CPU time | 4.15 seconds |
| Started | Sep 09 10:17:12 AM UTC 24 |
| Finished | Sep 09 10:17:18 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=91753857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.91753857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.3572846849 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 33007586737 ps |
| CPU time | 63.92 seconds |
| Started | Sep 09 10:17:12 AM UTC 24 |
| Finished | Sep 09 10:18:18 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572846849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.3572846849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.1791757000 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 724983770 ps |
| CPU time | 13.91 seconds |
| Started | Sep 09 10:17:13 AM UTC 24 |
| Finished | Sep 09 10:17:28 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1791757000 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.1791757000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.3813571959 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 569190109 ps |
| CPU time | 2.14 seconds |
| Started | Sep 09 10:17:13 AM UTC 24 |
| Finished | Sep 09 10:17:16 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813571959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_disable_endpoint.3813571959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.199111313 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 141325065 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:17:13 AM UTC 24 |
| Finished | Sep 09 10:17:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=199111313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_disconnected.199111313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_enable.2637286469 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 39598950 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:17:13 AM UTC 24 |
| Finished | Sep 09 10:17:15 AM UTC 24 |
| Peak memory | 214816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637286469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_enable.2637286469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.1713299975 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 755312246 ps |
| CPU time | 2.87 seconds |
| Started | Sep 09 10:17:13 AM UTC 24 |
| Finished | Sep 09 10:17:17 AM UTC 24 |
| Peak memory | 216960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713299975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.1713299975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.111249098 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 295822516 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:17:13 AM UTC 24 |
| Finished | Sep 09 10:17:16 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=111249098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.111249098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.2938101434 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 295344080 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:17:15 AM UTC 24 |
| Finished | Sep 09 10:17:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938101434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_fifo_levels.2938101434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.2517190107 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 583204667 ps |
| CPU time | 4.46 seconds |
| Started | Sep 09 10:17:15 AM UTC 24 |
| Finished | Sep 09 10:17:20 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2517190107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_fifo_rst.2517190107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.3052062440 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 204905092 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:17:15 AM UTC 24 |
| Finished | Sep 09 10:17:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052062440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.3052062440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.3996914345 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 144647160 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:17:15 AM UTC 24 |
| Finished | Sep 09 10:17:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3996914345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.3996914345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.371614739 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 242834508 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:17:15 AM UTC 24 |
| Finished | Sep 09 10:17:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=371614739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_in_trans.371614739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.3270922792 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 4366643298 ps |
| CPU time | 32.85 seconds |
| Started | Sep 09 10:17:15 AM UTC 24 |
| Finished | Sep 09 10:17:49 AM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270922792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.3270922792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.3675636884 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 3909920868 ps |
| CPU time | 47.94 seconds |
| Started | Sep 09 10:17:15 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 217444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675636884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.3675636884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.3212262739 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 235708600 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:17:15 AM UTC 24 |
| Finished | Sep 09 10:17:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3212262739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_in_err.3212262739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.2177764823 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 11501538440 ps |
| CPU time | 18.54 seconds |
| Started | Sep 09 10:17:15 AM UTC 24 |
| Finished | Sep 09 10:17:35 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2177764823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_resume.2177764823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.964086878 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 8753076583 ps |
| CPU time | 15.28 seconds |
| Started | Sep 09 10:17:16 AM UTC 24 |
| Finished | Sep 09 10:17:33 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=964086878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_suspend.964086878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.4210283391 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 4150281599 ps |
| CPU time | 39.13 seconds |
| Started | Sep 09 10:17:16 AM UTC 24 |
| Finished | Sep 09 10:17:57 AM UTC 24 |
| Peak memory | 229792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210283391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.4210283391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.3963088085 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 1847736616 ps |
| CPU time | 12.92 seconds |
| Started | Sep 09 10:17:16 AM UTC 24 |
| Finished | Sep 09 10:17:31 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963088085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.3963088085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.662123750 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 295635975 ps |
| CPU time | 1.94 seconds |
| Started | Sep 09 10:17:17 AM UTC 24 |
| Finished | Sep 09 10:17:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=662123750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.662123750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.1848834225 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 190505024 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:17:17 AM UTC 24 |
| Finished | Sep 09 10:17:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848834225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.1848834225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.3002122071 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 2155900581 ps |
| CPU time | 52.81 seconds |
| Started | Sep 09 10:17:18 AM UTC 24 |
| Finished | Sep 09 10:18:13 AM UTC 24 |
| Peak memory | 234012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002122071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.3002122071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.3248323031 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 151772650 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:17:19 AM UTC 24 |
| Finished | Sep 09 10:17:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248323031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.3248323031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.2622605111 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 149750493 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:17:19 AM UTC 24 |
| Finished | Sep 09 10:17:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622605111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.2622605111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.1439124356 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 200421524 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:17:19 AM UTC 24 |
| Finished | Sep 09 10:17:21 AM UTC 24 |
| Peak memory | 214764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439124356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.1439124356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.2404107460 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 196306047 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:17:19 AM UTC 24 |
| Finished | Sep 09 10:17:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404107460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.2404107460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.727002721 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 151883241 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:17:19 AM UTC 24 |
| Finished | Sep 09 10:17:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=727002721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_out_stall.727002721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.1611825961 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 177689092 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:17:19 AM UTC 24 |
| Finished | Sep 09 10:17:21 AM UTC 24 |
| Peak memory | 214852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611825961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.1611825961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.280753312 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 164387528 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:17:19 AM UTC 24 |
| Finished | Sep 09 10:17:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280753312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pending_in_trans.280753312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.337880952 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 282025993 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:17:19 AM UTC 24 |
| Finished | Sep 09 10:17:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=337880952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.337880952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.155632976 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 149758922 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:17:20 AM UTC 24 |
| Finished | Sep 09 10:17:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=155632976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.155632976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.4014009699 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 54644089 ps |
| CPU time | 0.76 seconds |
| Started | Sep 09 10:17:20 AM UTC 24 |
| Finished | Sep 09 10:17:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4014009699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.4014009699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.2122995858 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 12796329830 ps |
| CPU time | 36.06 seconds |
| Started | Sep 09 10:17:20 AM UTC 24 |
| Finished | Sep 09 10:17:58 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122995858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.2122995858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.265534343 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 181086715 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:17:20 AM UTC 24 |
| Finished | Sep 09 10:17:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=265534343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_pkt_received.265534343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.872707288 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 256319510 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:17:21 AM UTC 24 |
| Finished | Sep 09 10:17:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=872707288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_pkt_sent.872707288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.2441885803 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 211859093 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:17:21 AM UTC 24 |
| Finished | Sep 09 10:17:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441885803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.2441885803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.2633791626 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 147259670 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:17:21 AM UTC 24 |
| Finished | Sep 09 10:17:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2633791626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.2633791626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.1521647368 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 145213777 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:17:22 AM UTC 24 |
| Finished | Sep 09 10:17:24 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521647368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_rx_crc_err.1521647368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.3951441672 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 244957226 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:17:22 AM UTC 24 |
| Finished | Sep 09 10:17:24 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3951441672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.3951441672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.3231082889 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 153087655 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:17:22 AM UTC 24 |
| Finished | Sep 09 10:17:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3231082889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_setup_stage.3231082889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.3064647047 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 149184085 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:17:22 AM UTC 24 |
| Finished | Sep 09 10:17:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3064647047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.3064647047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.2102368592 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 191349422 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:17:22 AM UTC 24 |
| Finished | Sep 09 10:17:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102368592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.2102368592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.2518426207 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 1933936480 ps |
| CPU time | 13.34 seconds |
| Started | Sep 09 10:17:22 AM UTC 24 |
| Finished | Sep 09 10:17:37 AM UTC 24 |
| Peak memory | 234116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518426207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.2518426207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.1359132821 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 163614075 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:17:22 AM UTC 24 |
| Finished | Sep 09 10:17:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359132821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.1359132821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.825090066 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 143250394 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:17:22 AM UTC 24 |
| Finished | Sep 09 10:17:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825090066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_stall_trans.825090066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.783809512 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 1082396681 ps |
| CPU time | 3.74 seconds |
| Started | Sep 09 10:17:22 AM UTC 24 |
| Finished | Sep 09 10:17:27 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=783809512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_stream_len_max.783809512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.3547952481 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 1973431186 ps |
| CPU time | 18.19 seconds |
| Started | Sep 09 10:17:22 AM UTC 24 |
| Finished | Sep 09 10:17:42 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3547952481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_streaming_out.3547952481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.3108509469 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 4393567229 ps |
| CPU time | 36.37 seconds |
| Started | Sep 09 10:17:13 AM UTC 24 |
| Finished | Sep 09 10:17:50 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108509469 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.3108509469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.3792211472 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 565216432 ps |
| CPU time | 2.35 seconds |
| Started | Sep 09 10:17:24 AM UTC 24 |
| Finished | Sep 09 10:17:27 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3792211472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.3792211472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.112926160 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 439815544 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:20:11 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=112926160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_t x_rx_disruption.112926160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.2172545794 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 593095801 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:20:11 AM UTC 24 |
| Finished | Sep 09 10:20:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2172545794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.2172545794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.1102761369 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 664018835 ps |
| CPU time | 1.98 seconds |
| Started | Sep 09 10:20:16 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1102761369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.1102761369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.3474053693 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 674175105 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:20:16 AM UTC 24 |
| Finished | Sep 09 10:20:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3474053693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.3474053693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.3548128704 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 516070983 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:20:18 AM UTC 24 |
| Finished | Sep 09 10:20:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3548128704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.3548128704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.1019859735 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 459579897 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:20:21 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1019859735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.1019859735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.3210371018 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 529459971 ps |
| CPU time | 2.12 seconds |
| Started | Sep 09 10:20:21 AM UTC 24 |
| Finished | Sep 09 10:20:24 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3210371018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_ tx_rx_disruption.3210371018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.514039541 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 509136345 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:20:21 AM UTC 24 |
| Finished | Sep 09 10:20:24 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=514039541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_t x_rx_disruption.514039541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.3767219573 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 423658003 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:20:21 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3767219573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.3767219573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.18336653 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 537126510 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:20:21 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=18336653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_tx _rx_disruption.18336653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.1913015064 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 74052653 ps |
| CPU time | 0.95 seconds |
| Started | Sep 09 10:17:38 AM UTC 24 |
| Finished | Sep 09 10:17:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913015064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.1913015064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.2526809569 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 5575319784 ps |
| CPU time | 8.37 seconds |
| Started | Sep 09 10:17:24 AM UTC 24 |
| Finished | Sep 09 10:17:33 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2526809569 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.2526809569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3713028282 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 19888782290 ps |
| CPU time | 24.09 seconds |
| Started | Sep 09 10:17:24 AM UTC 24 |
| Finished | Sep 09 10:17:49 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713028282 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.3713028282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.1827956680 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 28788082177 ps |
| CPU time | 40.91 seconds |
| Started | Sep 09 10:17:24 AM UTC 24 |
| Finished | Sep 09 10:18:06 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827956680 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.1827956680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.3745541975 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 168021386 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:17:24 AM UTC 24 |
| Finished | Sep 09 10:17:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3745541975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_av_buffer.3745541975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.459438559 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 194323866 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:17:24 AM UTC 24 |
| Finished | Sep 09 10:17:26 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=459438559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_bitstuff_err.459438559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.2625352469 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 180733761 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:17:26 AM UTC 24 |
| Finished | Sep 09 10:17:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625352469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 49.usbdev_data_toggle_clear.2625352469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.484069978 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 1211987432 ps |
| CPU time | 3.67 seconds |
| Started | Sep 09 10:17:26 AM UTC 24 |
| Finished | Sep 09 10:17:30 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=484069978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.484069978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.3885734527 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 45146121640 ps |
| CPU time | 72.3 seconds |
| Started | Sep 09 10:17:26 AM UTC 24 |
| Finished | Sep 09 10:18:40 AM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3885734527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.3885734527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.3992548453 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 460729580 ps |
| CPU time | 7.63 seconds |
| Started | Sep 09 10:17:26 AM UTC 24 |
| Finished | Sep 09 10:17:35 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992548453 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.3992548453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.2799292425 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 655850677 ps |
| CPU time | 2.58 seconds |
| Started | Sep 09 10:17:26 AM UTC 24 |
| Finished | Sep 09 10:17:30 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2799292425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.2799292425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.96620414 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 137464729 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:17:26 AM UTC 24 |
| Finished | Sep 09 10:17:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=96620414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_disconnected.96620414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_enable.2960869123 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 64183688 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:17:26 AM UTC 24 |
| Finished | Sep 09 10:17:28 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960869123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.2960869123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.1584388698 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 826832381 ps |
| CPU time | 2.85 seconds |
| Started | Sep 09 10:17:26 AM UTC 24 |
| Finished | Sep 09 10:17:30 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584388698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.1584388698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.3689161796 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 535311284 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:17:26 AM UTC 24 |
| Finished | Sep 09 10:17:29 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689161796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.3689161796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.3681142464 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 199475085 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:17:27 AM UTC 24 |
| Finished | Sep 09 10:17:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681142464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_fifo_levels.3681142464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.4190396221 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 305493836 ps |
| CPU time | 3.3 seconds |
| Started | Sep 09 10:17:28 AM UTC 24 |
| Finished | Sep 09 10:17:32 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4190396221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.4190396221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.372476933 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 197033433 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:17:28 AM UTC 24 |
| Finished | Sep 09 10:17:30 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=372476933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.372476933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.3890134913 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 166187519 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:17:28 AM UTC 24 |
| Finished | Sep 09 10:17:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890134913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.3890134913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.222497087 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 195062554 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:17:29 AM UTC 24 |
| Finished | Sep 09 10:17:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=222497087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_in_trans.222497087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.453975706 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 4748694696 ps |
| CPU time | 120.89 seconds |
| Started | Sep 09 10:17:28 AM UTC 24 |
| Finished | Sep 09 10:19:31 AM UTC 24 |
| Peak memory | 229104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=453975706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.453975706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.1112068630 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 11676344456 ps |
| CPU time | 135.2 seconds |
| Started | Sep 09 10:17:29 AM UTC 24 |
| Finished | Sep 09 10:19:47 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112068630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.1112068630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.3715538922 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 176345927 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:17:29 AM UTC 24 |
| Finished | Sep 09 10:17:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715538922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.3715538922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.4253030906 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 10254649622 ps |
| CPU time | 15.73 seconds |
| Started | Sep 09 10:17:29 AM UTC 24 |
| Finished | Sep 09 10:17:46 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253030906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_resume.4253030906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.3505775707 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 4784631247 ps |
| CPU time | 8.67 seconds |
| Started | Sep 09 10:17:29 AM UTC 24 |
| Finished | Sep 09 10:17:39 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505775707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.3505775707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.1101553296 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 6124838156 ps |
| CPU time | 157.8 seconds |
| Started | Sep 09 10:17:30 AM UTC 24 |
| Finished | Sep 09 10:20:10 AM UTC 24 |
| Peak memory | 229764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101553296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.1101553296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.1599878236 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 1636527603 ps |
| CPU time | 12.31 seconds |
| Started | Sep 09 10:17:30 AM UTC 24 |
| Finished | Sep 09 10:17:43 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599878236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.1599878236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.154482426 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 262919595 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:17:30 AM UTC 24 |
| Finished | Sep 09 10:17:32 AM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=154482426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.154482426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.1445898865 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 189405910 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:17:30 AM UTC 24 |
| Finished | Sep 09 10:17:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445898865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.1445898865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.902590113 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 2411357126 ps |
| CPU time | 17.47 seconds |
| Started | Sep 09 10:17:31 AM UTC 24 |
| Finished | Sep 09 10:17:50 AM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=902590113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.902590113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.424881872 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 147721596 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:17:31 AM UTC 24 |
| Finished | Sep 09 10:17:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=424881872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.424881872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.1729956596 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 149734093 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:17:31 AM UTC 24 |
| Finished | Sep 09 10:17:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729956596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.1729956596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.413146354 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 210869805 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:17:31 AM UTC 24 |
| Finished | Sep 09 10:17:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=413146354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_nak_trans.413146354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.3003942271 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 197594582 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:17:31 AM UTC 24 |
| Finished | Sep 09 10:17:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003942271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.3003942271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.578850185 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 188544545 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:17:31 AM UTC 24 |
| Finished | Sep 09 10:17:34 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=578850185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_out_stall.578850185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.3310188023 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 191021067 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:17:31 AM UTC 24 |
| Finished | Sep 09 10:17:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3310188023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.3310188023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.1596503834 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 164118200 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:17:34 AM UTC 24 |
| Finished | Sep 09 10:17:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1596503834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.1596503834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.220046500 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 190547812 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:17:34 AM UTC 24 |
| Finished | Sep 09 10:17:36 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=220046500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.220046500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.1390411915 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 209373756 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:17:34 AM UTC 24 |
| Finished | Sep 09 10:17:36 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390411915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.1390411915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.1102321084 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 35513877 ps |
| CPU time | 1.05 seconds |
| Started | Sep 09 10:17:34 AM UTC 24 |
| Finished | Sep 09 10:17:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102321084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.1102321084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.1896480881 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 23352376217 ps |
| CPU time | 57.87 seconds |
| Started | Sep 09 10:17:34 AM UTC 24 |
| Finished | Sep 09 10:18:33 AM UTC 24 |
| Peak memory | 231720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896480881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.1896480881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.2477846358 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 210112469 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:17:34 AM UTC 24 |
| Finished | Sep 09 10:17:36 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477846358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.2477846358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.2754087343 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 229213644 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:17:34 AM UTC 24 |
| Finished | Sep 09 10:17:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754087343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.2754087343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.3757717733 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 157418253 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:17:34 AM UTC 24 |
| Finished | Sep 09 10:17:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757717733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.3757717733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.3865956043 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 164932241 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:17:34 AM UTC 24 |
| Finished | Sep 09 10:17:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865956043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.3865956043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.2490060784 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 149805969 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:17:35 AM UTC 24 |
| Finished | Sep 09 10:17:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490060784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.2490060784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.1786285607 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 270822892 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:17:35 AM UTC 24 |
| Finished | Sep 09 10:17:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786285607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.1786285607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.1463963978 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 146377046 ps |
| CPU time | 1.02 seconds |
| Started | Sep 09 10:17:36 AM UTC 24 |
| Finished | Sep 09 10:17:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463963978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.1463963978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.2710581458 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 146620735 ps |
| CPU time | 0.98 seconds |
| Started | Sep 09 10:17:36 AM UTC 24 |
| Finished | Sep 09 10:17:37 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710581458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.2710581458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.2408551528 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 234474954 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:17:36 AM UTC 24 |
| Finished | Sep 09 10:17:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408551528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.2408551528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.1467035159 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 2010883042 ps |
| CPU time | 18.31 seconds |
| Started | Sep 09 10:17:36 AM UTC 24 |
| Finished | Sep 09 10:17:55 AM UTC 24 |
| Peak memory | 233860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467035159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.1467035159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.546752645 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 173431080 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:17:36 AM UTC 24 |
| Finished | Sep 09 10:17:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=546752645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.546752645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.1386158379 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 177721929 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:17:36 AM UTC 24 |
| Finished | Sep 09 10:17:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386158379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.1386158379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.2028876204 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 866097611 ps |
| CPU time | 2.77 seconds |
| Started | Sep 09 10:17:38 AM UTC 24 |
| Finished | Sep 09 10:17:41 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028876204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.2028876204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.2795605708 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 2262114664 ps |
| CPU time | 54.79 seconds |
| Started | Sep 09 10:17:38 AM UTC 24 |
| Finished | Sep 09 10:18:34 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2795605708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.2795605708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.1153120646 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 839023275 ps |
| CPU time | 7.09 seconds |
| Started | Sep 09 10:17:26 AM UTC 24 |
| Finished | Sep 09 10:17:34 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153120646 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.1153120646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.63032248 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 535003608 ps |
| CPU time | 1.8 seconds |
| Started | Sep 09 10:17:38 AM UTC 24 |
| Finished | Sep 09 10:17:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=63032248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_tx_ rx_disruption.63032248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.1675591884 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 545231048 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:20:21 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1675591884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.1675591884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.2775471842 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 612421382 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:20:21 AM UTC 24 |
| Finished | Sep 09 10:20:24 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2775471842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.2775471842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.4278887089 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 613355176 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:20:21 AM UTC 24 |
| Finished | Sep 09 10:20:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4278887089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.4278887089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.3607049638 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 596054145 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:20:22 AM UTC 24 |
| Finished | Sep 09 10:20:35 AM UTC 24 |
| Peak memory | 216588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3607049638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.3607049638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.3490816384 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 452473716 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:35 AM UTC 24 |
| Peak memory | 214476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3490816384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.3490816384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.3348267129 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 667721025 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:35 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3348267129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.3348267129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.4204877467 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 622498620 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 216588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4204877467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_ tx_rx_disruption.4204877467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.2267308390 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 457296147 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2267308390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.2267308390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.529687036 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 514299844 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=529687036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_t x_rx_disruption.529687036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.1038146568 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 614016804 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:20:23 AM UTC 24 |
| Finished | Sep 09 10:20:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1038146568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.1038146568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.2925353241 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 60881046 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:00:59 AM UTC 24 |
| Finished | Sep 09 10:01:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925353241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.2925353241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.2776381618 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 4924434036 ps |
| CPU time | 12.43 seconds |
| Started | Sep 09 10:00:06 AM UTC 24 |
| Finished | Sep 09 10:00:19 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776381618 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.2776381618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.3847186393 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 20619872645 ps |
| CPU time | 37.88 seconds |
| Started | Sep 09 10:00:06 AM UTC 24 |
| Finished | Sep 09 10:00:45 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847186393 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.3847186393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.3240733943 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 29006598508 ps |
| CPU time | 55.47 seconds |
| Started | Sep 09 10:00:07 AM UTC 24 |
| Finished | Sep 09 10:01:04 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240733943 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.3240733943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.4134470695 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 147941102 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:00:07 AM UTC 24 |
| Finished | Sep 09 10:00:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134470695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_av_buffer.4134470695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.1274671338 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 160291195 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:00:08 AM UTC 24 |
| Finished | Sep 09 10:00:11 AM UTC 24 |
| Peak memory | 214812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274671338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_bitstuff_err.1274671338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.3963814400 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 368192175 ps |
| CPU time | 2.4 seconds |
| Started | Sep 09 10:00:08 AM UTC 24 |
| Finished | Sep 09 10:00:12 AM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963814400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.3963814400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.1385193855 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 802815431 ps |
| CPU time | 2.98 seconds |
| Started | Sep 09 10:00:11 AM UTC 24 |
| Finished | Sep 09 10:00:14 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385193855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.1385193855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.3610858275 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 28735147386 ps |
| CPU time | 64.99 seconds |
| Started | Sep 09 10:00:12 AM UTC 24 |
| Finished | Sep 09 10:01:18 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3610858275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.3610858275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.71817388 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 547349564 ps |
| CPU time | 10.41 seconds |
| Started | Sep 09 10:00:13 AM UTC 24 |
| Finished | Sep 09 10:00:24 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=71817388 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.71817388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.2230296600 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 524686724 ps |
| CPU time | 3.13 seconds |
| Started | Sep 09 10:00:17 AM UTC 24 |
| Finished | Sep 09 10:00:21 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2230296600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.2230296600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.2224771148 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 135015758 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:00:19 AM UTC 24 |
| Finished | Sep 09 10:00:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224771148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.2224771148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_enable.2686992938 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 30082889 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:00:20 AM UTC 24 |
| Finished | Sep 09 10:00:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686992938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_enable.2686992938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.2844976308 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 835008859 ps |
| CPU time | 3.7 seconds |
| Started | Sep 09 10:00:22 AM UTC 24 |
| Finished | Sep 09 10:00:26 AM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844976308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.2844976308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.2993703079 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 546842274 ps |
| CPU time | 2.74 seconds |
| Started | Sep 09 10:00:23 AM UTC 24 |
| Finished | Sep 09 10:00:27 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993703079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.2993703079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.1420965324 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 275044025 ps |
| CPU time | 1.88 seconds |
| Started | Sep 09 10:00:23 AM UTC 24 |
| Finished | Sep 09 10:00:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1420965324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_fifo_levels.1420965324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.3809308361 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 521373085 ps |
| CPU time | 4.13 seconds |
| Started | Sep 09 10:00:25 AM UTC 24 |
| Finished | Sep 09 10:00:31 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3809308361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_fifo_rst.3809308361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.3864411047 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 259241514 ps |
| CPU time | 2.33 seconds |
| Started | Sep 09 10:00:25 AM UTC 24 |
| Finished | Sep 09 10:00:29 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864411047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.3864411047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.2115714187 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 149261830 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:00:26 AM UTC 24 |
| Finished | Sep 09 10:00:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2115714187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_stall.2115714187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.1576187345 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 183062058 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:00:27 AM UTC 24 |
| Finished | Sep 09 10:00:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1576187345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.1576187345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.2001482892 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 2370327434 ps |
| CPU time | 21.56 seconds |
| Started | Sep 09 10:00:25 AM UTC 24 |
| Finished | Sep 09 10:00:48 AM UTC 24 |
| Peak memory | 234200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2001482892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.2001482892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.1021638433 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 5624523917 ps |
| CPU time | 66.85 seconds |
| Started | Sep 09 10:00:27 AM UTC 24 |
| Finished | Sep 09 10:01:36 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021638433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.1021638433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.4246426440 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 288613575 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 10:00:28 AM UTC 24 |
| Finished | Sep 09 10:00:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246426440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.4246426440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.3827320995 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 23818724370 ps |
| CPU time | 52.32 seconds |
| Started | Sep 09 10:00:28 AM UTC 24 |
| Finished | Sep 09 10:01:22 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827320995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.3827320995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.3051781100 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 3659532921 ps |
| CPU time | 9.94 seconds |
| Started | Sep 09 10:00:28 AM UTC 24 |
| Finished | Sep 09 10:00:40 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051781100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.3051781100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.2519970761 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 4700190441 ps |
| CPU time | 133.96 seconds |
| Started | Sep 09 10:00:30 AM UTC 24 |
| Finished | Sep 09 10:02:46 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519970761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.2519970761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.2083446618 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 3410595250 ps |
| CPU time | 32.36 seconds |
| Started | Sep 09 10:00:30 AM UTC 24 |
| Finished | Sep 09 10:01:03 AM UTC 24 |
| Peak memory | 227652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2083446618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.2083446618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.3758737233 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 239352186 ps |
| CPU time | 1.8 seconds |
| Started | Sep 09 10:00:31 AM UTC 24 |
| Finished | Sep 09 10:00:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758737233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.3758737233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.1752505871 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 195088292 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:00:31 AM UTC 24 |
| Finished | Sep 09 10:00:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752505871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.1752505871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.2040813047 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 2087442244 ps |
| CPU time | 59.99 seconds |
| Started | Sep 09 10:00:31 AM UTC 24 |
| Finished | Sep 09 10:01:33 AM UTC 24 |
| Peak memory | 227496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040813047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.2040813047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.2455881499 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 2847604026 ps |
| CPU time | 29.58 seconds |
| Started | Sep 09 10:00:32 AM UTC 24 |
| Finished | Sep 09 10:01:04 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455881499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.2455881499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.2356699302 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 1777009193 ps |
| CPU time | 20.1 seconds |
| Started | Sep 09 10:00:33 AM UTC 24 |
| Finished | Sep 09 10:00:54 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356699302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.2356699302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.3400926233 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 162575461 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:00:34 AM UTC 24 |
| Finished | Sep 09 10:00:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400926233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.3400926233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.74043 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 138092691 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:00:35 AM UTC 24 |
| Finished | Sep 09 10:00:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=74043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.74043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.1484900415 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 262331193 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:00:35 AM UTC 24 |
| Finished | Sep 09 10:00:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1484900415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_nak_trans.1484900415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.3390854154 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 169283823 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:00:37 AM UTC 24 |
| Finished | Sep 09 10:00:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390854154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.3390854154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.703084230 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 197683030 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:00:38 AM UTC 24 |
| Finished | Sep 09 10:00:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=703084230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_out_stall.703084230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.3038409835 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 171074891 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:00:39 AM UTC 24 |
| Finished | Sep 09 10:00:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3038409835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.3038409835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.1378144535 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 198325159 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:00:41 AM UTC 24 |
| Finished | Sep 09 10:00:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378144535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.1378144535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.101809056 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 236274249 ps |
| CPU time | 1.82 seconds |
| Started | Sep 09 10:00:41 AM UTC 24 |
| Finished | Sep 09 10:00:44 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=101809056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.101809056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.2412498801 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 146673800 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:00:43 AM UTC 24 |
| Finished | Sep 09 10:00:45 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2412498801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.2412498801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.1152440371 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 77680064 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:00:43 AM UTC 24 |
| Finished | Sep 09 10:00:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152440371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.1152440371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.3350841898 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 8375310191 ps |
| CPU time | 28.45 seconds |
| Started | Sep 09 10:00:43 AM UTC 24 |
| Finished | Sep 09 10:01:13 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3350841898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_pkt_buffer.3350841898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.2373518834 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 164413405 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:00:43 AM UTC 24 |
| Finished | Sep 09 10:00:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373518834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.2373518834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.97120353 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 165756768 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:00:44 AM UTC 24 |
| Finished | Sep 09 10:00:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=97120353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_pkt_sent.97120353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.3585240434 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 5799099517 ps |
| CPU time | 27.46 seconds |
| Started | Sep 09 10:00:46 AM UTC 24 |
| Finished | Sep 09 10:01:15 AM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3585240434 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.3585240434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.1785808390 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 10012147699 ps |
| CPU time | 65.37 seconds |
| Started | Sep 09 10:00:46 AM UTC 24 |
| Finished | Sep 09 10:01:54 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785808390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.1785808390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.82747912 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 11343436958 ps |
| CPU time | 82.59 seconds |
| Started | Sep 09 10:00:46 AM UTC 24 |
| Finished | Sep 09 10:02:11 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=82747912 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.82747912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.1724993075 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 221596948 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:00:44 AM UTC 24 |
| Finished | Sep 09 10:00:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724993075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.1724993075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.903306003 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 188659525 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:00:46 AM UTC 24 |
| Finished | Sep 09 10:00:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=903306003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.903306003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.1796264882 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 20150999406 ps |
| CPU time | 53.68 seconds |
| Started | Sep 09 10:00:48 AM UTC 24 |
| Finished | Sep 09 10:01:43 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796264882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.1796264882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.2797486669 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 184269073 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:00:48 AM UTC 24 |
| Finished | Sep 09 10:00:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797486669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.2797486669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.2235734761 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 396333517 ps |
| CPU time | 1.97 seconds |
| Started | Sep 09 10:00:49 AM UTC 24 |
| Finished | Sep 09 10:00:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235734761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.2235734761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.1143129434 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 156696706 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:00:50 AM UTC 24 |
| Finished | Sep 09 10:00:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143129434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.1143129434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.1203057828 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 153452566 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:00:50 AM UTC 24 |
| Finished | Sep 09 10:00:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1203057828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 5.usbdev_setup_trans_ignored.1203057828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.2619488139 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 226581553 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:00:50 AM UTC 24 |
| Finished | Sep 09 10:00:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2619488139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.2619488139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.3527617114 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 2929490539 ps |
| CPU time | 87.33 seconds |
| Started | Sep 09 10:00:51 AM UTC 24 |
| Finished | Sep 09 10:02:21 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527617114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.3527617114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.2490121328 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 151315921 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:00:52 AM UTC 24 |
| Finished | Sep 09 10:00:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490121328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.2490121328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.3091274685 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 166117263 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:00:54 AM UTC 24 |
| Finished | Sep 09 10:00:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091274685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.3091274685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.1558247532 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 657965307 ps |
| CPU time | 2.64 seconds |
| Started | Sep 09 10:00:54 AM UTC 24 |
| Finished | Sep 09 10:00:57 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558247532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.1558247532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.3709246529 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 1885276517 ps |
| CPU time | 14.54 seconds |
| Started | Sep 09 10:00:54 AM UTC 24 |
| Finished | Sep 09 10:01:09 AM UTC 24 |
| Peak memory | 229464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709246529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.3709246529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.3303487686 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 7341472196 ps |
| CPU time | 92.69 seconds |
| Started | Sep 09 10:00:55 AM UTC 24 |
| Finished | Sep 09 10:02:30 AM UTC 24 |
| Peak memory | 234268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3303487686 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.3303487686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.419238876 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 1361763342 ps |
| CPU time | 11.67 seconds |
| Started | Sep 09 10:00:15 AM UTC 24 |
| Finished | Sep 09 10:00:28 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=419238876 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.419238876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.1365651285 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 437991429 ps |
| CPU time | 1.91 seconds |
| Started | Sep 09 10:00:55 AM UTC 24 |
| Finished | Sep 09 10:00:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1365651285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.1365651285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.1284015282 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 545832173 ps |
| CPU time | 2.1 seconds |
| Started | Sep 09 10:17:38 AM UTC 24 |
| Finished | Sep 09 10:17:41 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1284015282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.1284015282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.3523753175 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 285088012 ps |
| CPU time | 1.91 seconds |
| Started | Sep 09 10:17:38 AM UTC 24 |
| Finished | Sep 09 10:17:41 AM UTC 24 |
| Peak memory | 214512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523753175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 50.usbdev_fifo_levels.3523753175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.2434821345 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 711892060 ps |
| CPU time | 2.12 seconds |
| Started | Sep 09 10:17:38 AM UTC 24 |
| Finished | Sep 09 10:17:41 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2434821345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.2434821345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.635120142 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 208606525 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:17:38 AM UTC 24 |
| Finished | Sep 09 10:17:40 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=635120142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.635120142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1477186320 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 633644568 ps |
| CPU time | 2.2 seconds |
| Started | Sep 09 10:17:40 AM UTC 24 |
| Finished | Sep 09 10:17:43 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1477186320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.1477186320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.2536071609 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 249858121 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:17:40 AM UTC 24 |
| Finished | Sep 09 10:17:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536071609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.2536071609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.2353463189 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 429716790 ps |
| CPU time | 1.88 seconds |
| Started | Sep 09 10:17:40 AM UTC 24 |
| Finished | Sep 09 10:17:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2353463189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.2353463189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.560736756 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 275551665 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:17:40 AM UTC 24 |
| Finished | Sep 09 10:17:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=560736756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 53.usbdev_fifo_levels.560736756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.429110907 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 620325185 ps |
| CPU time | 1.87 seconds |
| Started | Sep 09 10:17:40 AM UTC 24 |
| Finished | Sep 09 10:17:43 AM UTC 24 |
| Peak memory | 214736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=429110907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_tx _rx_disruption.429110907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.2927067362 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 230604987 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:17:40 AM UTC 24 |
| Finished | Sep 09 10:17:42 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2927067362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.2927067362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.1615476681 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 250082691 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:17:41 AM UTC 24 |
| Finished | Sep 09 10:17:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615476681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 54.usbdev_fifo_levels.1615476681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.2527525334 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 591436012 ps |
| CPU time | 2.19 seconds |
| Started | Sep 09 10:17:41 AM UTC 24 |
| Finished | Sep 09 10:17:44 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2527525334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.2527525334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.2187072130 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 301470529 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:17:41 AM UTC 24 |
| Finished | Sep 09 10:17:44 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2187072130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.2187072130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.172020255 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 251820318 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:17:41 AM UTC 24 |
| Finished | Sep 09 10:17:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172020255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 55.usbdev_fifo_levels.172020255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.1474089652 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 550824830 ps |
| CPU time | 1.89 seconds |
| Started | Sep 09 10:17:41 AM UTC 24 |
| Finished | Sep 09 10:17:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1474089652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_t x_rx_disruption.1474089652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.2667409908 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 482114558 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:17:41 AM UTC 24 |
| Finished | Sep 09 10:17:44 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667409908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.2667409908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.1248248031 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 188222129 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:17:41 AM UTC 24 |
| Finished | Sep 09 10:17:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248248031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 56.usbdev_fifo_levels.1248248031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.4152713335 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 619426418 ps |
| CPU time | 2.01 seconds |
| Started | Sep 09 10:17:43 AM UTC 24 |
| Finished | Sep 09 10:17:46 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4152713335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_t x_rx_disruption.4152713335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.2303757322 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 164049289 ps |
| CPU time | 1.34 seconds |
| Started | Sep 09 10:17:43 AM UTC 24 |
| Finished | Sep 09 10:17:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2303757322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 57.usbdev_fifo_levels.2303757322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.1884659689 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 501046202 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:17:43 AM UTC 24 |
| Finished | Sep 09 10:17:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1884659689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.1884659689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.3489865198 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 523504306 ps |
| CPU time | 1.76 seconds |
| Started | Sep 09 10:17:43 AM UTC 24 |
| Finished | Sep 09 10:17:46 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489865198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.3489865198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.2969237919 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 171783036 ps |
| CPU time | 0.96 seconds |
| Started | Sep 09 10:17:43 AM UTC 24 |
| Finished | Sep 09 10:17:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2969237919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 58.usbdev_fifo_levels.2969237919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.3830971145 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 573357696 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:17:43 AM UTC 24 |
| Finished | Sep 09 10:17:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3830971145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_t x_rx_disruption.3830971145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.579181896 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 179554964 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:17:43 AM UTC 24 |
| Finished | Sep 09 10:17:46 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579181896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.579181896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.2062976297 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 172783128 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:17:45 AM UTC 24 |
| Finished | Sep 09 10:17:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2062976297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 59.usbdev_fifo_levels.2062976297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.3352903661 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 469821168 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:17:45 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3352903661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.3352903661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.1197300225 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 34796427 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:01:50 AM UTC 24 |
| Finished | Sep 09 10:01:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197300225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.1197300225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.3230825599 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 10619915051 ps |
| CPU time | 23.43 seconds |
| Started | Sep 09 10:00:59 AM UTC 24 |
| Finished | Sep 09 10:01:23 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230825599 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.3230825599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.2487970722 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 15598752306 ps |
| CPU time | 29.23 seconds |
| Started | Sep 09 10:00:59 AM UTC 24 |
| Finished | Sep 09 10:01:29 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2487970722 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.2487970722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.211306180 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 24238858409 ps |
| CPU time | 42.07 seconds |
| Started | Sep 09 10:01:00 AM UTC 24 |
| Finished | Sep 09 10:01:43 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=211306180 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.211306180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.2658463023 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 183010917 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:01:00 AM UTC 24 |
| Finished | Sep 09 10:01:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2658463023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.2658463023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.1767956690 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 162258321 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:01:01 AM UTC 24 |
| Finished | Sep 09 10:01:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767956690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.1767956690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.2302293116 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 217163631 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:01:03 AM UTC 24 |
| Finished | Sep 09 10:01:06 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302293116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_data_toggle_clear.2302293116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.1676211273 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 872579018 ps |
| CPU time | 4.03 seconds |
| Started | Sep 09 10:01:05 AM UTC 24 |
| Finished | Sep 09 10:01:10 AM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1676211273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.1676211273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.3664752281 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 15324241884 ps |
| CPU time | 33.94 seconds |
| Started | Sep 09 10:01:05 AM UTC 24 |
| Finished | Sep 09 10:01:40 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664752281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.3664752281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.4240978875 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 323973591 ps |
| CPU time | 5.04 seconds |
| Started | Sep 09 10:01:05 AM UTC 24 |
| Finished | Sep 09 10:01:11 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4240978875 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.4240978875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.3685826257 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 605569775 ps |
| CPU time | 3.15 seconds |
| Started | Sep 09 10:01:07 AM UTC 24 |
| Finished | Sep 09 10:01:11 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685826257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_disable_endpoint.3685826257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.3908478782 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 181563267 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:01:07 AM UTC 24 |
| Finished | Sep 09 10:01:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908478782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.3908478782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_enable.2648536415 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 36017051 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:01:10 AM UTC 24 |
| Finished | Sep 09 10:01:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648536415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.2648536415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.1387802162 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 947832781 ps |
| CPU time | 4.64 seconds |
| Started | Sep 09 10:01:11 AM UTC 24 |
| Finished | Sep 09 10:01:16 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387802162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.1387802162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.882386372 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 274755570 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:01:11 AM UTC 24 |
| Finished | Sep 09 10:01:13 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=882386372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.882386372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.1736743456 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 280410926 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:01:12 AM UTC 24 |
| Finished | Sep 09 10:01:14 AM UTC 24 |
| Peak memory | 214784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736743456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_fifo_levels.1736743456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.552520171 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 509615579 ps |
| CPU time | 3.98 seconds |
| Started | Sep 09 10:01:12 AM UTC 24 |
| Finished | Sep 09 10:01:17 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=552520171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_fifo_rst.552520171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.3968209403 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 207681445 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 10:01:14 AM UTC 24 |
| Finished | Sep 09 10:01:17 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968209403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.3968209403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.1141999787 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 156776852 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:01:14 AM UTC 24 |
| Finished | Sep 09 10:01:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1141999787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.1141999787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.1541615011 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 215460034 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:01:15 AM UTC 24 |
| Finished | Sep 09 10:01:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541615011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_trans.1541615011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.2740352552 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 4480334735 ps |
| CPU time | 124.63 seconds |
| Started | Sep 09 10:01:13 AM UTC 24 |
| Finished | Sep 09 10:03:20 AM UTC 24 |
| Peak memory | 234196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740352552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.2740352552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.255074656 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 10260869503 ps |
| CPU time | 138.45 seconds |
| Started | Sep 09 10:01:17 AM UTC 24 |
| Finished | Sep 09 10:03:38 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=255074656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.255074656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.1713391834 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 253497928 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:01:17 AM UTC 24 |
| Finished | Sep 09 10:01:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713391834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_in_err.1713391834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.2195762401 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 22486094060 ps |
| CPU time | 65.83 seconds |
| Started | Sep 09 10:01:18 AM UTC 24 |
| Finished | Sep 09 10:02:25 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2195762401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.2195762401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.1529327891 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 9886997526 ps |
| CPU time | 24.77 seconds |
| Started | Sep 09 10:01:18 AM UTC 24 |
| Finished | Sep 09 10:01:44 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1529327891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.1529327891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.2953464102 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 4029053714 ps |
| CPU time | 35.8 seconds |
| Started | Sep 09 10:01:18 AM UTC 24 |
| Finished | Sep 09 10:01:55 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953464102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.2953464102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.1060214100 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 2813365397 ps |
| CPU time | 27.45 seconds |
| Started | Sep 09 10:01:20 AM UTC 24 |
| Finished | Sep 09 10:01:49 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1060214100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.1060214100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.4106725813 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 264388388 ps |
| CPU time | 1.64 seconds |
| Started | Sep 09 10:01:20 AM UTC 24 |
| Finished | Sep 09 10:01:22 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106725813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.4106725813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.260156746 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 199397572 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:01:20 AM UTC 24 |
| Finished | Sep 09 10:01:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=260156746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.260156746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.1226896055 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 2907074864 ps |
| CPU time | 38.86 seconds |
| Started | Sep 09 10:01:23 AM UTC 24 |
| Finished | Sep 09 10:02:04 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226896055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.1226896055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.3858217964 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 3381284510 ps |
| CPU time | 34.31 seconds |
| Started | Sep 09 10:01:23 AM UTC 24 |
| Finished | Sep 09 10:01:59 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858217964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.3858217964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.2070811493 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 2328313388 ps |
| CPU time | 16.21 seconds |
| Started | Sep 09 10:01:23 AM UTC 24 |
| Finished | Sep 09 10:01:41 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2070811493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.2070811493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.3901329188 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 186729910 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:01:23 AM UTC 24 |
| Finished | Sep 09 10:01:26 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901329188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.3901329188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.2641714037 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 154837759 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:01:25 AM UTC 24 |
| Finished | Sep 09 10:01:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641714037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.2641714037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.687306872 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 201360518 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:01:27 AM UTC 24 |
| Finished | Sep 09 10:01:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=687306872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_nak_trans.687306872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.3003492309 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 190386816 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:01:29 AM UTC 24 |
| Finished | Sep 09 10:01:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003492309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.3003492309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.2505812358 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 168323886 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:01:29 AM UTC 24 |
| Finished | Sep 09 10:01:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505812358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.2505812358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.2922525525 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 176658743 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:01:30 AM UTC 24 |
| Finished | Sep 09 10:01:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2922525525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.2922525525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.610117427 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 169501585 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:01:31 AM UTC 24 |
| Finished | Sep 09 10:01:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=610117427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pending_in_trans.610117427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.449576360 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 218299290 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:01:32 AM UTC 24 |
| Finished | Sep 09 10:01:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=449576360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.449576360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.1034747873 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 154340494 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:01:32 AM UTC 24 |
| Finished | Sep 09 10:01:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1034747873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.1034747873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.831853494 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 41999423 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:01:33 AM UTC 24 |
| Finished | Sep 09 10:01:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=831853494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_phy_pins_sense.831853494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.569512651 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 14652183987 ps |
| CPU time | 41.21 seconds |
| Started | Sep 09 10:01:34 AM UTC 24 |
| Finished | Sep 09 10:02:17 AM UTC 24 |
| Peak memory | 227248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=569512651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_pkt_buffer.569512651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.3509526781 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 187414265 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:01:34 AM UTC 24 |
| Finished | Sep 09 10:01:37 AM UTC 24 |
| Peak memory | 214836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509526781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_pkt_received.3509526781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.1508480278 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 264931044 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:01:36 AM UTC 24 |
| Finished | Sep 09 10:01:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508480278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_pkt_sent.1508480278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.917686456 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 11690647612 ps |
| CPU time | 226.11 seconds |
| Started | Sep 09 10:01:37 AM UTC 24 |
| Finished | Sep 09 10:05:27 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=917686456 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.917686456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.3721675743 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 2890977453 ps |
| CPU time | 25.42 seconds |
| Started | Sep 09 10:01:38 AM UTC 24 |
| Finished | Sep 09 10:02:05 AM UTC 24 |
| Peak memory | 234180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3721675743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.3721675743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.3984405737 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 7007505686 ps |
| CPU time | 102.15 seconds |
| Started | Sep 09 10:01:39 AM UTC 24 |
| Finished | Sep 09 10:03:24 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3984405737 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.3984405737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.2444820513 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 195236240 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:01:36 AM UTC 24 |
| Finished | Sep 09 10:01:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2444820513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_random_length_in_transaction.2444820513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.2069561153 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 155420998 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:01:36 AM UTC 24 |
| Finished | Sep 09 10:01:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069561153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.2069561153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.76467246 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 20167534623 ps |
| CPU time | 36.73 seconds |
| Started | Sep 09 10:01:39 AM UTC 24 |
| Finished | Sep 09 10:02:18 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=76467246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_resume_link_active.76467246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.2292434140 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 172262725 ps |
| CPU time | 1.26 seconds |
| Started | Sep 09 10:01:39 AM UTC 24 |
| Finished | Sep 09 10:01:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292434140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_rx_crc_err.2292434140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.2219804061 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 250776437 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:01:41 AM UTC 24 |
| Finished | Sep 09 10:01:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219804061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.2219804061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.3935413917 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 198995263 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:01:42 AM UTC 24 |
| Finished | Sep 09 10:01:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935413917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_setup_stage.3935413917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.3503460793 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 170569439 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:01:43 AM UTC 24 |
| Finished | Sep 09 10:01:46 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3503460793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.3503460793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.1442189747 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 214215590 ps |
| CPU time | 1.75 seconds |
| Started | Sep 09 10:01:43 AM UTC 24 |
| Finished | Sep 09 10:01:46 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442189747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.1442189747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.4191814336 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 1865981918 ps |
| CPU time | 58.46 seconds |
| Started | Sep 09 10:01:45 AM UTC 24 |
| Finished | Sep 09 10:02:45 AM UTC 24 |
| Peak memory | 227432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4191814336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.4191814336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.1418717752 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 182165204 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:01:45 AM UTC 24 |
| Finished | Sep 09 10:01:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1418717752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.1418717752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.736679684 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 148980624 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:01:45 AM UTC 24 |
| Finished | Sep 09 10:01:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=736679684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_stall_trans.736679684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.3610787626 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 1076176181 ps |
| CPU time | 4.28 seconds |
| Started | Sep 09 10:01:45 AM UTC 24 |
| Finished | Sep 09 10:01:51 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3610787626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.3610787626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.2821469214 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 2020791139 ps |
| CPU time | 15.36 seconds |
| Started | Sep 09 10:01:45 AM UTC 24 |
| Finished | Sep 09 10:02:02 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2821469214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.2821469214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.2078467334 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 7008911810 ps |
| CPU time | 107.49 seconds |
| Started | Sep 09 10:01:48 AM UTC 24 |
| Finished | Sep 09 10:03:38 AM UTC 24 |
| Peak memory | 229748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078467334 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.2078467334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.86068479 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 589262117 ps |
| CPU time | 14.75 seconds |
| Started | Sep 09 10:01:06 AM UTC 24 |
| Finished | Sep 09 10:01:22 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=86068479 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.86068479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.92067359 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 450021708 ps |
| CPU time | 2.31 seconds |
| Started | Sep 09 10:01:50 AM UTC 24 |
| Finished | Sep 09 10:01:54 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=92067359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx_r x_disruption.92067359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.1964586339 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 327061198 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:17:45 AM UTC 24 |
| Finished | Sep 09 10:17:47 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1964586339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.1964586339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2670206902 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 168756280 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:17:45 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670206902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.2670206902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.2745389651 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 550013909 ps |
| CPU time | 1.97 seconds |
| Started | Sep 09 10:17:45 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2745389651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.2745389651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.745024072 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 304838790 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:17:46 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=745024072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.745024072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.1999007347 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 271175270 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:17:46 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999007347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 61.usbdev_fifo_levels.1999007347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.1033916597 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 609538823 ps |
| CPU time | 2.39 seconds |
| Started | Sep 09 10:17:46 AM UTC 24 |
| Finished | Sep 09 10:17:49 AM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1033916597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_t x_rx_disruption.1033916597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.1991207256 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 265093442 ps |
| CPU time | 1.11 seconds |
| Started | Sep 09 10:17:46 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991207256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 62.usbdev_fifo_levels.1991207256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.10947065 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 583581561 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:17:46 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=10947065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_tx_ rx_disruption.10947065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.2453938319 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 453975316 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:17:46 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2453938319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.2453938319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.4133785665 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 276304336 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:17:46 AM UTC 24 |
| Finished | Sep 09 10:17:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133785665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 63.usbdev_fifo_levels.4133785665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1177683398 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 696744890 ps |
| CPU time | 1.97 seconds |
| Started | Sep 09 10:17:47 AM UTC 24 |
| Finished | Sep 09 10:17:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1177683398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.1177683398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.1159373729 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 183126202 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:17:47 AM UTC 24 |
| Finished | Sep 09 10:17:49 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159373729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.1159373729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.1751812115 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 186672499 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:17:47 AM UTC 24 |
| Finished | Sep 09 10:17:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751812115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 64.usbdev_fifo_levels.1751812115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.1706502337 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 577638220 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:17:47 AM UTC 24 |
| Finished | Sep 09 10:17:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1706502337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_t x_rx_disruption.1706502337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.698404559 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 714909676 ps |
| CPU time | 2.02 seconds |
| Started | Sep 09 10:17:48 AM UTC 24 |
| Finished | Sep 09 10:17:51 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=698404559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.698404559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.2591562778 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 157705707 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:17:48 AM UTC 24 |
| Finished | Sep 09 10:17:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591562778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.2591562778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.2943859536 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 460175820 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:17:48 AM UTC 24 |
| Finished | Sep 09 10:17:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2943859536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_t x_rx_disruption.2943859536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.2316290737 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 368828760 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:17:48 AM UTC 24 |
| Finished | Sep 09 10:17:50 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2316290737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.2316290737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2211168344 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 261532055 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:17:48 AM UTC 24 |
| Finished | Sep 09 10:17:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211168344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 66.usbdev_fifo_levels.2211168344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.3669886178 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 649433928 ps |
| CPU time | 2 seconds |
| Started | Sep 09 10:17:48 AM UTC 24 |
| Finished | Sep 09 10:17:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3669886178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.3669886178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.2175990391 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 337730188 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:17:48 AM UTC 24 |
| Finished | Sep 09 10:17:50 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175990391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.2175990391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.553639848 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 334159679 ps |
| CPU time | 1.4 seconds |
| Started | Sep 09 10:17:49 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=553639848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 67.usbdev_fifo_levels.553639848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.773390318 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 558568451 ps |
| CPU time | 1.92 seconds |
| Started | Sep 09 10:17:49 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=773390318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_tx _rx_disruption.773390318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.1541136287 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 582772644 ps |
| CPU time | 1.92 seconds |
| Started | Sep 09 10:17:49 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541136287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.1541136287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.2533805194 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 253792393 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:17:49 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533805194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 68.usbdev_fifo_levels.2533805194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.608926856 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 640340062 ps |
| CPU time | 1.81 seconds |
| Started | Sep 09 10:17:50 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=608926856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_tx _rx_disruption.608926856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.3873499747 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 383346961 ps |
| CPU time | 1.21 seconds |
| Started | Sep 09 10:17:50 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873499747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.3873499747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.3347009701 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 253052493 ps |
| CPU time | 1.15 seconds |
| Started | Sep 09 10:17:50 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347009701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 69.usbdev_fifo_levels.3347009701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.529818487 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 615118225 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:17:50 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=529818487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_tx _rx_disruption.529818487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.1118661164 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 43896092 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:02:30 AM UTC 24 |
| Finished | Sep 09 10:02:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118661164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.1118661164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.3171161225 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 4404786301 ps |
| CPU time | 13.69 seconds |
| Started | Sep 09 10:01:50 AM UTC 24 |
| Finished | Sep 09 10:02:05 AM UTC 24 |
| Peak memory | 227504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171161225 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.3171161225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.2961611161 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 15127898390 ps |
| CPU time | 27.02 seconds |
| Started | Sep 09 10:01:50 AM UTC 24 |
| Finished | Sep 09 10:02:19 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961611161 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.2961611161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.3679461522 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 25921229500 ps |
| CPU time | 53.65 seconds |
| Started | Sep 09 10:01:51 AM UTC 24 |
| Finished | Sep 09 10:02:47 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679461522 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.3679461522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.1903492320 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 165149708 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:01:52 AM UTC 24 |
| Finished | Sep 09 10:01:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1903492320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.1903492320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.3321772294 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 155325595 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:01:53 AM UTC 24 |
| Finished | Sep 09 10:01:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321772294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.3321772294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.1485371271 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 466848211 ps |
| CPU time | 2.95 seconds |
| Started | Sep 09 10:01:54 AM UTC 24 |
| Finished | Sep 09 10:01:58 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485371271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_data_toggle_clear.1485371271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.3353881489 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 1072610492 ps |
| CPU time | 5.49 seconds |
| Started | Sep 09 10:01:55 AM UTC 24 |
| Finished | Sep 09 10:02:02 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3353881489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.3353881489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.3006657801 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 33293199274 ps |
| CPU time | 80.77 seconds |
| Started | Sep 09 10:01:55 AM UTC 24 |
| Finished | Sep 09 10:03:18 AM UTC 24 |
| Peak memory | 217136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3006657801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.3006657801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.1571387949 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 1267834954 ps |
| CPU time | 29.09 seconds |
| Started | Sep 09 10:01:55 AM UTC 24 |
| Finished | Sep 09 10:02:26 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571387949 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.1571387949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.1248063440 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 449165365 ps |
| CPU time | 2.52 seconds |
| Started | Sep 09 10:01:57 AM UTC 24 |
| Finished | Sep 09 10:02:00 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248063440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.1248063440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.4028428054 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 198721199 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:01:57 AM UTC 24 |
| Finished | Sep 09 10:02:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028428054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.4028428054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_enable.3769308941 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 87290636 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:01:59 AM UTC 24 |
| Finished | Sep 09 10:02:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769308941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_enable.3769308941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.4106087632 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 866569937 ps |
| CPU time | 3.97 seconds |
| Started | Sep 09 10:02:01 AM UTC 24 |
| Finished | Sep 09 10:02:06 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106087632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.4106087632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.358661886 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 349637351 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:02:01 AM UTC 24 |
| Finished | Sep 09 10:02:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=358661886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.358661886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.3620336090 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 432527501 ps |
| CPU time | 3.96 seconds |
| Started | Sep 09 10:02:03 AM UTC 24 |
| Finished | Sep 09 10:02:08 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620336090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_fifo_rst.3620336090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.494038101 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 249697129 ps |
| CPU time | 2.16 seconds |
| Started | Sep 09 10:02:03 AM UTC 24 |
| Finished | Sep 09 10:02:07 AM UTC 24 |
| Peak memory | 227344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=494038101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.494038101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.3216061896 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 170858866 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:02:04 AM UTC 24 |
| Finished | Sep 09 10:02:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216061896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.3216061896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.150869473 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 155921970 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:02:04 AM UTC 24 |
| Finished | Sep 09 10:02:07 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=150869473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_in_trans.150869473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.3809981130 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 2674075756 ps |
| CPU time | 27.65 seconds |
| Started | Sep 09 10:02:03 AM UTC 24 |
| Finished | Sep 09 10:02:32 AM UTC 24 |
| Peak memory | 227632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3809981130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.3809981130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.143917860 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 10275185883 ps |
| CPU time | 116.03 seconds |
| Started | Sep 09 10:02:06 AM UTC 24 |
| Finished | Sep 09 10:04:04 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=143917860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.143917860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.1216214764 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 252623948 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:02:06 AM UTC 24 |
| Finished | Sep 09 10:02:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216214764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.1216214764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.775155875 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 5286559274 ps |
| CPU time | 9.15 seconds |
| Started | Sep 09 10:02:08 AM UTC 24 |
| Finished | Sep 09 10:02:18 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=775155875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_suspend.775155875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.239120920 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 5483140640 ps |
| CPU time | 143.37 seconds |
| Started | Sep 09 10:02:08 AM UTC 24 |
| Finished | Sep 09 10:04:34 AM UTC 24 |
| Peak memory | 234316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=239120920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.239120920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.1051103891 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 2700241116 ps |
| CPU time | 26.14 seconds |
| Started | Sep 09 10:02:08 AM UTC 24 |
| Finished | Sep 09 10:02:35 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051103891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.1051103891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.4283739508 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 236065656 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:02:08 AM UTC 24 |
| Finished | Sep 09 10:02:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283739508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.4283739508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.866636691 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 211721036 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:02:08 AM UTC 24 |
| Finished | Sep 09 10:02:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866636691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.866636691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.4219337855 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 3856342115 ps |
| CPU time | 52.65 seconds |
| Started | Sep 09 10:02:08 AM UTC 24 |
| Finished | Sep 09 10:03:03 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4219337855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.4219337855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.729995398 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 3213049132 ps |
| CPU time | 37.1 seconds |
| Started | Sep 09 10:02:09 AM UTC 24 |
| Finished | Sep 09 10:02:48 AM UTC 24 |
| Peak memory | 229624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=729995398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.729995398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.591533199 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 2492095844 ps |
| CPU time | 26.92 seconds |
| Started | Sep 09 10:02:10 AM UTC 24 |
| Finished | Sep 09 10:02:39 AM UTC 24 |
| Peak memory | 227652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=591533199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.591533199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.920496728 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 236686739 ps |
| CPU time | 1.79 seconds |
| Started | Sep 09 10:02:11 AM UTC 24 |
| Finished | Sep 09 10:02:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=920496728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.920496728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.3377346900 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 140407959 ps |
| CPU time | 0.99 seconds |
| Started | Sep 09 10:02:12 AM UTC 24 |
| Finished | Sep 09 10:02:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377346900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.3377346900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.229003640 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 237103535 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:02:13 AM UTC 24 |
| Finished | Sep 09 10:02:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=229003640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_nak_trans.229003640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.2923018879 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 193085078 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:02:14 AM UTC 24 |
| Finished | Sep 09 10:02:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923018879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.2923018879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.657760647 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 154499827 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:02:15 AM UTC 24 |
| Finished | Sep 09 10:02:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=657760647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_out_stall.657760647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.1078120824 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 165775534 ps |
| CPU time | 1.58 seconds |
| Started | Sep 09 10:02:16 AM UTC 24 |
| Finished | Sep 09 10:02:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078120824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.1078120824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.2760302824 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 154269227 ps |
| CPU time | 1.45 seconds |
| Started | Sep 09 10:02:17 AM UTC 24 |
| Finished | Sep 09 10:02:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760302824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.2760302824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.4235216414 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 181348918 ps |
| CPU time | 1.65 seconds |
| Started | Sep 09 10:02:19 AM UTC 24 |
| Finished | Sep 09 10:02:22 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4235216414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.4235216414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.1249660786 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 147703077 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:02:19 AM UTC 24 |
| Finished | Sep 09 10:02:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249660786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.1249660786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.4276244422 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 62937253 ps |
| CPU time | 1.08 seconds |
| Started | Sep 09 10:02:19 AM UTC 24 |
| Finished | Sep 09 10:02:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276244422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.4276244422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.3722464813 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 8550041270 ps |
| CPU time | 31.25 seconds |
| Started | Sep 09 10:02:19 AM UTC 24 |
| Finished | Sep 09 10:02:52 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3722464813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.3722464813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.1252403696 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 226572974 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:02:19 AM UTC 24 |
| Finished | Sep 09 10:02:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252403696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_pkt_received.1252403696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.3891175164 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 194264375 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:02:21 AM UTC 24 |
| Finished | Sep 09 10:02:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891175164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.3891175164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.979200474 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 6247202781 ps |
| CPU time | 36.12 seconds |
| Started | Sep 09 10:02:21 AM UTC 24 |
| Finished | Sep 09 10:02:59 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=979200474 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.979200474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.2929157224 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 3019756711 ps |
| CPU time | 25.36 seconds |
| Started | Sep 09 10:02:23 AM UTC 24 |
| Finished | Sep 09 10:02:49 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2929157224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.2929157224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.3236374072 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 11183523117 ps |
| CPU time | 59.76 seconds |
| Started | Sep 09 10:02:23 AM UTC 24 |
| Finished | Sep 09 10:03:24 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236374072 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.3236374072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.3731555459 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 226271531 ps |
| CPU time | 1.52 seconds |
| Started | Sep 09 10:02:21 AM UTC 24 |
| Finished | Sep 09 10:02:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731555459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_random_length_in_transaction.3731555459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.3606478665 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 188507770 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:02:21 AM UTC 24 |
| Finished | Sep 09 10:02:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3606478665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.3606478665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.3166926178 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 20153352760 ps |
| CPU time | 24.16 seconds |
| Started | Sep 09 10:02:23 AM UTC 24 |
| Finished | Sep 09 10:02:48 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166926178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.3166926178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.3249763778 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 143022900 ps |
| CPU time | 1.33 seconds |
| Started | Sep 09 10:02:23 AM UTC 24 |
| Finished | Sep 09 10:02:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249763778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_rx_crc_err.3249763778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.4015503342 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 343808758 ps |
| CPU time | 2.06 seconds |
| Started | Sep 09 10:02:24 AM UTC 24 |
| Finished | Sep 09 10:02:27 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015503342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_rx_full.4015503342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.1182700800 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 176203708 ps |
| CPU time | 1.37 seconds |
| Started | Sep 09 10:02:24 AM UTC 24 |
| Finished | Sep 09 10:02:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182700800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.1182700800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.3617292393 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 155190388 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:02:25 AM UTC 24 |
| Finished | Sep 09 10:02:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617292393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.3617292393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.3990659011 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 194909980 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:02:25 AM UTC 24 |
| Finished | Sep 09 10:02:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3990659011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.3990659011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.470724964 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 1718214765 ps |
| CPU time | 47.12 seconds |
| Started | Sep 09 10:02:27 AM UTC 24 |
| Finished | Sep 09 10:03:15 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=470724964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.470724964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.1269541134 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 191747193 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:02:27 AM UTC 24 |
| Finished | Sep 09 10:02:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1269541134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.1269541134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.1657000743 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 176156071 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:02:27 AM UTC 24 |
| Finished | Sep 09 10:02:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657000743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_stall_trans.1657000743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.2437213580 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 511877873 ps |
| CPU time | 2.56 seconds |
| Started | Sep 09 10:02:29 AM UTC 24 |
| Finished | Sep 09 10:02:32 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437213580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.2437213580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.950617308 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 3039842276 ps |
| CPU time | 27.58 seconds |
| Started | Sep 09 10:02:29 AM UTC 24 |
| Finished | Sep 09 10:02:57 AM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=950617308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_streaming_out.950617308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.2617481842 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 5055002169 ps |
| CPU time | 34.6 seconds |
| Started | Sep 09 10:01:57 AM UTC 24 |
| Finished | Sep 09 10:02:33 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2617481842 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.2617481842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.3068820801 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 464649567 ps |
| CPU time | 2.89 seconds |
| Started | Sep 09 10:02:29 AM UTC 24 |
| Finished | Sep 09 10:02:33 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3068820801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx _rx_disruption.3068820801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.3279571560 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 276694394 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:17:50 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 214216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3279571560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.3279571560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.1960007181 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 249234964 ps |
| CPU time | 1.12 seconds |
| Started | Sep 09 10:17:50 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1960007181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 70.usbdev_fifo_levels.1960007181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.639914237 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 421574002 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:17:50 AM UTC 24 |
| Finished | Sep 09 10:17:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=639914237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_tx _rx_disruption.639914237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.2475676894 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 401940347 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:17:50 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 214324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475676894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.2475676894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.1301499088 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 264862464 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:17:50 AM UTC 24 |
| Finished | Sep 09 10:17:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301499088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 71.usbdev_fifo_levels.1301499088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.2465302031 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 535478808 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2465302031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_t x_rx_disruption.2465302031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.1748232923 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 602162840 ps |
| CPU time | 1.61 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:54 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748232923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.1748232923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.1630838891 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 201338837 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1630838891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.1630838891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.496319300 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 473173687 ps |
| CPU time | 1.56 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:54 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=496319300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_tx _rx_disruption.496319300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.2815815972 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 539616775 ps |
| CPU time | 1.66 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:54 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815815972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.2815815972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.2940708630 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 318337217 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940708630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 73.usbdev_fifo_levels.2940708630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.1202695996 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 520543900 ps |
| CPU time | 2.14 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:55 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1202695996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.1202695996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.3191467839 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 472195075 ps |
| CPU time | 1.77 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:55 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3191467839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.3191467839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.4000717182 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 528564427 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:55 AM UTC 24 |
| Peak memory | 214704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4000717182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.4000717182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.3709497212 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 152297217 ps |
| CPU time | 0.81 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709497212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 75.usbdev_fifo_levels.3709497212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.273868824 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 557661249 ps |
| CPU time | 2.2 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:55 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=273868824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_tx _rx_disruption.273868824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.1628521989 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 336517447 ps |
| CPU time | 1.31 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:54 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628521989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.1628521989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.3564258004 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 249551524 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564258004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 76.usbdev_fifo_levels.3564258004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.826118968 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 467312278 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:17:52 AM UTC 24 |
| Finished | Sep 09 10:17:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=826118968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_tx _rx_disruption.826118968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.1279404579 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 208383268 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:56 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279404579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.1279404579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.3861842953 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 195168388 ps |
| CPU time | 0.96 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861842953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 77.usbdev_fifo_levels.3861842953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.899347944 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 527397431 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=899347944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_tx _rx_disruption.899347944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.1780458012 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 490974478 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:57 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1780458012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.1780458012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.646131788 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 270002268 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=646131788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 78.usbdev_fifo_levels.646131788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.1373060318 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 583456774 ps |
| CPU time | 1.74 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1373060318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_t x_rx_disruption.1373060318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.713446279 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 260496951 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:56 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=713446279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.713446279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.3154047471 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 151474321 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154047471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 79.usbdev_fifo_levels.3154047471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.832883838 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 600904193 ps |
| CPU time | 1.99 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=832883838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_tx _rx_disruption.832883838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.518748051 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 59853709 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:03:10 AM UTC 24 |
| Finished | Sep 09 10:03:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=518748051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.518748051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.2769971381 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 5321004161 ps |
| CPU time | 14.17 seconds |
| Started | Sep 09 10:02:31 AM UTC 24 |
| Finished | Sep 09 10:02:47 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769971381 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.2769971381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.1115170491 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 20795240739 ps |
| CPU time | 35.56 seconds |
| Started | Sep 09 10:02:31 AM UTC 24 |
| Finished | Sep 09 10:03:08 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1115170491 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.1115170491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.1357216635 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 23819407932 ps |
| CPU time | 36.03 seconds |
| Started | Sep 09 10:02:33 AM UTC 24 |
| Finished | Sep 09 10:03:10 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1357216635 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.1357216635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.2010299629 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 221536817 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:02:33 AM UTC 24 |
| Finished | Sep 09 10:02:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010299629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.2010299629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.1245152985 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 177560589 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:02:34 AM UTC 24 |
| Finished | Sep 09 10:02:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245152985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.1245152985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.4184883612 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 300569409 ps |
| CPU time | 2.05 seconds |
| Started | Sep 09 10:02:34 AM UTC 24 |
| Finished | Sep 09 10:02:37 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4184883612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.4184883612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.600734483 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 552478835 ps |
| CPU time | 2.65 seconds |
| Started | Sep 09 10:02:34 AM UTC 24 |
| Finished | Sep 09 10:02:38 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=600734483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.600734483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.1288029520 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 18948354325 ps |
| CPU time | 50.19 seconds |
| Started | Sep 09 10:02:34 AM UTC 24 |
| Finished | Sep 09 10:03:26 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288029520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.1288029520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.3549548691 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 685481896 ps |
| CPU time | 17.19 seconds |
| Started | Sep 09 10:02:36 AM UTC 24 |
| Finished | Sep 09 10:02:55 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549548691 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.3549548691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.2356814209 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 1146692778 ps |
| CPU time | 2.74 seconds |
| Started | Sep 09 10:02:36 AM UTC 24 |
| Finished | Sep 09 10:02:40 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356814209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.2356814209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.2528100114 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 162798934 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:02:38 AM UTC 24 |
| Finished | Sep 09 10:02:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528100114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_disconnected.2528100114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_enable.1671388883 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 36123440 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:02:39 AM UTC 24 |
| Finished | Sep 09 10:02:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671388883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.1671388883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.2360092574 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 925780677 ps |
| CPU time | 4.82 seconds |
| Started | Sep 09 10:02:40 AM UTC 24 |
| Finished | Sep 09 10:02:46 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360092574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.2360092574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.277295457 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 274452435 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:02:41 AM UTC 24 |
| Finished | Sep 09 10:02:43 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=277295457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.277295457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.1613108276 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 270673024 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:02:41 AM UTC 24 |
| Finished | Sep 09 10:02:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613108276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_fifo_levels.1613108276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.846874512 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 429938649 ps |
| CPU time | 3.2 seconds |
| Started | Sep 09 10:02:42 AM UTC 24 |
| Finished | Sep 09 10:02:46 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=846874512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_fifo_rst.846874512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.1896363239 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 218047332 ps |
| CPU time | 2.03 seconds |
| Started | Sep 09 10:02:44 AM UTC 24 |
| Finished | Sep 09 10:02:47 AM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896363239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.1896363239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.2928964059 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 142727210 ps |
| CPU time | 1.32 seconds |
| Started | Sep 09 10:02:44 AM UTC 24 |
| Finished | Sep 09 10:02:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928964059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.2928964059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.866585270 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 208755557 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:02:46 AM UTC 24 |
| Finished | Sep 09 10:02:48 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866585270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_in_trans.866585270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.1922841404 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 3419501747 ps |
| CPU time | 88.24 seconds |
| Started | Sep 09 10:02:44 AM UTC 24 |
| Finished | Sep 09 10:04:14 AM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922841404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.1922841404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.3496351284 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 4141358669 ps |
| CPU time | 49.99 seconds |
| Started | Sep 09 10:02:46 AM UTC 24 |
| Finished | Sep 09 10:03:38 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3496351284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.3496351284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.3069881173 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 227561976 ps |
| CPU time | 1.25 seconds |
| Started | Sep 09 10:02:47 AM UTC 24 |
| Finished | Sep 09 10:02:50 AM UTC 24 |
| Peak memory | 214584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069881173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_in_err.3069881173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.3538309090 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 21928052761 ps |
| CPU time | 58.4 seconds |
| Started | Sep 09 10:02:47 AM UTC 24 |
| Finished | Sep 09 10:03:47 AM UTC 24 |
| Peak memory | 227016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3538309090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.3538309090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.2713501423 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 9576843211 ps |
| CPU time | 15.02 seconds |
| Started | Sep 09 10:02:47 AM UTC 24 |
| Finished | Sep 09 10:03:04 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713501423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_link_suspend.2713501423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.3176261723 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 3599551100 ps |
| CPU time | 101.26 seconds |
| Started | Sep 09 10:02:48 AM UTC 24 |
| Finished | Sep 09 10:04:31 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3176261723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.3176261723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.1947340606 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 2802013633 ps |
| CPU time | 75.83 seconds |
| Started | Sep 09 10:02:48 AM UTC 24 |
| Finished | Sep 09 10:04:05 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947340606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.1947340606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.3590841283 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 263025809 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:02:49 AM UTC 24 |
| Finished | Sep 09 10:02:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590841283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.3590841283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.437867941 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 185135880 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:02:49 AM UTC 24 |
| Finished | Sep 09 10:02:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=437867941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.437867941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.3037191659 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 1885104689 ps |
| CPU time | 18.99 seconds |
| Started | Sep 09 10:02:49 AM UTC 24 |
| Finished | Sep 09 10:03:09 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037191659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.3037191659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.66470002 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 3275442261 ps |
| CPU time | 28.01 seconds |
| Started | Sep 09 10:02:49 AM UTC 24 |
| Finished | Sep 09 10:03:18 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=66470002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.66470002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.1383091245 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 1582900705 ps |
| CPU time | 55.39 seconds |
| Started | Sep 09 10:02:50 AM UTC 24 |
| Finished | Sep 09 10:03:47 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1383091245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.1383091245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.4284356833 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 154690652 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:02:50 AM UTC 24 |
| Finished | Sep 09 10:02:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284356833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.4284356833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.13670302 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 175937971 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:02:53 AM UTC 24 |
| Finished | Sep 09 10:02:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=13670302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.13670302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.3417498755 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 222532229 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:02:53 AM UTC 24 |
| Finished | Sep 09 10:02:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3417498755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_nak_trans.3417498755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.2133187017 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 181642857 ps |
| CPU time | 1.41 seconds |
| Started | Sep 09 10:02:53 AM UTC 24 |
| Finished | Sep 09 10:02:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133187017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.2133187017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.3696431772 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 167561445 ps |
| CPU time | 1.1 seconds |
| Started | Sep 09 10:02:53 AM UTC 24 |
| Finished | Sep 09 10:02:55 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3696431772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_out_stall.3696431772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.1399115602 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 156604518 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:02:53 AM UTC 24 |
| Finished | Sep 09 10:02:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399115602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.1399115602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.4136226166 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 155603814 ps |
| CPU time | 1.49 seconds |
| Started | Sep 09 10:02:55 AM UTC 24 |
| Finished | Sep 09 10:02:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4136226166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.4136226166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.2132729549 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 188643970 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:02:57 AM UTC 24 |
| Finished | Sep 09 10:02:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132729549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.2132729549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.202604945 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 175778510 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:02:57 AM UTC 24 |
| Finished | Sep 09 10:02:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=202604945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.202604945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.3164054138 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 33407833 ps |
| CPU time | 1.13 seconds |
| Started | Sep 09 10:02:57 AM UTC 24 |
| Finished | Sep 09 10:02:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164054138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.3164054138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.2949433085 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 20506849582 ps |
| CPU time | 67.82 seconds |
| Started | Sep 09 10:02:57 AM UTC 24 |
| Finished | Sep 09 10:04:06 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949433085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_pkt_buffer.2949433085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.4161781370 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 212967260 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:02:57 AM UTC 24 |
| Finished | Sep 09 10:02:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161781370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_pkt_received.4161781370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.3228915222 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 184073505 ps |
| CPU time | 1.27 seconds |
| Started | Sep 09 10:02:59 AM UTC 24 |
| Finished | Sep 09 10:03:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228915222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.3228915222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.1349039883 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 5722041275 ps |
| CPU time | 67.2 seconds |
| Started | Sep 09 10:03:00 AM UTC 24 |
| Finished | Sep 09 10:04:09 AM UTC 24 |
| Peak memory | 234260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1349039883 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.1349039883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.1717429258 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 3763766697 ps |
| CPU time | 81.46 seconds |
| Started | Sep 09 10:03:00 AM UTC 24 |
| Finished | Sep 09 10:04:23 AM UTC 24 |
| Peak memory | 234128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717429258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.1717429258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.331315425 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 10925710336 ps |
| CPU time | 81.31 seconds |
| Started | Sep 09 10:03:00 AM UTC 24 |
| Finished | Sep 09 10:04:23 AM UTC 24 |
| Peak memory | 234180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=331315425 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.331315425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.3808160754 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 172424957 ps |
| CPU time | 1.44 seconds |
| Started | Sep 09 10:02:59 AM UTC 24 |
| Finished | Sep 09 10:03:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808160754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.3808160754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.2220081515 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 148312226 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:03:00 AM UTC 24 |
| Finished | Sep 09 10:03:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220081515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.2220081515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.3912340272 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 20178895153 ps |
| CPU time | 32.91 seconds |
| Started | Sep 09 10:03:00 AM UTC 24 |
| Finished | Sep 09 10:03:34 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912340272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.3912340272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.4289322775 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 143061889 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:03:01 AM UTC 24 |
| Finished | Sep 09 10:03:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4289322775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.4289322775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.1431681011 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 261016921 ps |
| CPU time | 1.88 seconds |
| Started | Sep 09 10:03:01 AM UTC 24 |
| Finished | Sep 09 10:03:04 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431681011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_rx_full.1431681011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.3200059356 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 147033587 ps |
| CPU time | 1.3 seconds |
| Started | Sep 09 10:03:04 AM UTC 24 |
| Finished | Sep 09 10:03:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3200059356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.3200059356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.3287754087 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 150849264 ps |
| CPU time | 1.24 seconds |
| Started | Sep 09 10:03:04 AM UTC 24 |
| Finished | Sep 09 10:03:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3287754087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.3287754087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.3324598094 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 256320988 ps |
| CPU time | 1.83 seconds |
| Started | Sep 09 10:03:05 AM UTC 24 |
| Finished | Sep 09 10:03:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324598094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.3324598094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.2101108073 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 2567061500 ps |
| CPU time | 62.93 seconds |
| Started | Sep 09 10:03:05 AM UTC 24 |
| Finished | Sep 09 10:04:10 AM UTC 24 |
| Peak memory | 234180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101108073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.2101108073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.2507110415 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 152272166 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:03:05 AM UTC 24 |
| Finished | Sep 09 10:03:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507110415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.2507110415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.367510980 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 182063227 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:03:06 AM UTC 24 |
| Finished | Sep 09 10:03:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=367510980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_stall_trans.367510980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.259286279 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 885667892 ps |
| CPU time | 3.53 seconds |
| Started | Sep 09 10:03:07 AM UTC 24 |
| Finished | Sep 09 10:03:12 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259286279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_stream_len_max.259286279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.1645608688 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 1731536422 ps |
| CPU time | 15.04 seconds |
| Started | Sep 09 10:03:07 AM UTC 24 |
| Finished | Sep 09 10:03:24 AM UTC 24 |
| Peak memory | 234160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1645608688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.1645608688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.2086458266 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 7647480954 ps |
| CPU time | 129.06 seconds |
| Started | Sep 09 10:03:09 AM UTC 24 |
| Finished | Sep 09 10:05:21 AM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086458266 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.2086458266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.2944255668 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 1169727146 ps |
| CPU time | 29.24 seconds |
| Started | Sep 09 10:02:36 AM UTC 24 |
| Finished | Sep 09 10:03:07 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2944255668 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.2944255668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.3605588281 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 569439996 ps |
| CPU time | 2.8 seconds |
| Started | Sep 09 10:03:09 AM UTC 24 |
| Finished | Sep 09 10:03:13 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3605588281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.3605588281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.1316932222 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 372807688 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:56 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316932222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.1316932222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.3092211966 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 250843336 ps |
| CPU time | 1.01 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3092211966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 80.usbdev_fifo_levels.3092211966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.553275954 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 472255353 ps |
| CPU time | 1.54 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=553275954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_tx _rx_disruption.553275954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.3468243931 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 220672257 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:17:54 AM UTC 24 |
| Finished | Sep 09 10:17:56 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468243931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.3468243931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.3090364181 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 312079532 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:17:56 AM UTC 24 |
| Finished | Sep 09 10:17:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3090364181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 81.usbdev_fifo_levels.3090364181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/81.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.12059122 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 509205389 ps |
| CPU time | 1.7 seconds |
| Started | Sep 09 10:17:56 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=12059122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_tx_ rx_disruption.12059122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.1958249900 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 759367415 ps |
| CPU time | 1.96 seconds |
| Started | Sep 09 10:17:56 AM UTC 24 |
| Finished | Sep 09 10:18:00 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1958249900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.1958249900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.2409780032 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 266773369 ps |
| CPU time | 1.04 seconds |
| Started | Sep 09 10:17:56 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409780032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 82.usbdev_fifo_levels.2409780032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/82.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.429361371 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 576746495 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=429361371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_tx _rx_disruption.429361371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.3705054434 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 838095519 ps |
| CPU time | 1.88 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705054434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.3705054434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.2727394972 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 294560733 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2727394972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 83.usbdev_fifo_levels.2727394972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.3647901855 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 468788133 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3647901855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.3647901855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.4013922413 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 305440012 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4013922413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 84.usbdev_fifo_levels.4013922413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.2709976046 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 566929711 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:18:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2709976046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_t x_rx_disruption.2709976046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.2404719641 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 251188583 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404719641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 85.usbdev_fifo_levels.2404719641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.253387349 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 487780738 ps |
| CPU time | 1.48 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=253387349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_tx _rx_disruption.253387349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.3394356275 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 276558040 ps |
| CPU time | 1.28 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394356275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 86.usbdev_fifo_levels.3394356275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.1994786232 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 599475115 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:18:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1994786232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_t x_rx_disruption.1994786232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.584067509 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 279832365 ps |
| CPU time | 1.05 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=584067509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.584067509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.3854919889 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 337154888 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854919889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 87.usbdev_fifo_levels.3854919889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.4284279884 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 448892099 ps |
| CPU time | 1.35 seconds |
| Started | Sep 09 10:17:57 AM UTC 24 |
| Finished | Sep 09 10:17:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4284279884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.4284279884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.207020220 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 495492849 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=207020220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.207020220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.2843544882 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 260207970 ps |
| CPU time | 1 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843544882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 88.usbdev_fifo_levels.2843544882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.2927221081 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 475470192 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2927221081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_t x_rx_disruption.2927221081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2635444880 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 532752751 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635444880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.2635444880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.31072482 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 297732218 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=31072482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 89.usbdev_fifo_levels.31072482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.281314623 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 510494743 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=281314623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_tx _rx_disruption.281314623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.2912347689 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 46542429 ps |
| CPU time | 0.92 seconds |
| Started | Sep 09 10:03:52 AM UTC 24 |
| Finished | Sep 09 10:03:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912347689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.2912347689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.3370804250 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 4291717519 ps |
| CPU time | 10.25 seconds |
| Started | Sep 09 10:03:11 AM UTC 24 |
| Finished | Sep 09 10:03:23 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3370804250 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.3370804250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.2333495824 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 18408366933 ps |
| CPU time | 51.6 seconds |
| Started | Sep 09 10:03:12 AM UTC 24 |
| Finished | Sep 09 10:04:06 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2333495824 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.2333495824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.1426663829 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 26364316751 ps |
| CPU time | 43.87 seconds |
| Started | Sep 09 10:03:12 AM UTC 24 |
| Finished | Sep 09 10:03:58 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426663829 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.1426663829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.1532040841 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 190403847 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:03:14 AM UTC 24 |
| Finished | Sep 09 10:03:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532040841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.1532040841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.2816193240 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 137444934 ps |
| CPU time | 1.39 seconds |
| Started | Sep 09 10:03:14 AM UTC 24 |
| Finished | Sep 09 10:03:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816193240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.2816193240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.3440874901 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 377615301 ps |
| CPU time | 2.52 seconds |
| Started | Sep 09 10:03:14 AM UTC 24 |
| Finished | Sep 09 10:03:18 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440874901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.3440874901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.2381757684 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 1243163264 ps |
| CPU time | 3.47 seconds |
| Started | Sep 09 10:03:16 AM UTC 24 |
| Finished | Sep 09 10:03:21 AM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381757684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.2381757684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.3977716901 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 13643400107 ps |
| CPU time | 30.55 seconds |
| Started | Sep 09 10:03:17 AM UTC 24 |
| Finished | Sep 09 10:03:49 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977716901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.3977716901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.21862393 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 7337964924 ps |
| CPU time | 55.55 seconds |
| Started | Sep 09 10:03:19 AM UTC 24 |
| Finished | Sep 09 10:04:16 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=21862393 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.21862393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.1881714422 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 610431440 ps |
| CPU time | 3.09 seconds |
| Started | Sep 09 10:03:19 AM UTC 24 |
| Finished | Sep 09 10:03:24 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881714422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.1881714422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.38484377 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 159755220 ps |
| CPU time | 1.43 seconds |
| Started | Sep 09 10:03:19 AM UTC 24 |
| Finished | Sep 09 10:03:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=38484377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_disconnected.38484377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_enable.3631723730 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 37778407 ps |
| CPU time | 1.05 seconds |
| Started | Sep 09 10:03:22 AM UTC 24 |
| Finished | Sep 09 10:03:24 AM UTC 24 |
| Peak memory | 214648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3631723730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_enable.3631723730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.4144107402 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 800564710 ps |
| CPU time | 3.95 seconds |
| Started | Sep 09 10:03:22 AM UTC 24 |
| Finished | Sep 09 10:03:27 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144107402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.4144107402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.1603250303 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 340690627 ps |
| CPU time | 2.03 seconds |
| Started | Sep 09 10:03:23 AM UTC 24 |
| Finished | Sep 09 10:03:27 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1603250303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.1603250303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.3862490837 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 260199987 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:03:24 AM UTC 24 |
| Finished | Sep 09 10:03:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862490837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_fifo_levels.3862490837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.167287363 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 483912650 ps |
| CPU time | 3.25 seconds |
| Started | Sep 09 10:03:24 AM UTC 24 |
| Finished | Sep 09 10:03:28 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=167287363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_fifo_rst.167287363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.936119201 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 197151149 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:03:25 AM UTC 24 |
| Finished | Sep 09 10:03:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=936119201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.936119201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.2264884353 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 143733901 ps |
| CPU time | 1.2 seconds |
| Started | Sep 09 10:03:25 AM UTC 24 |
| Finished | Sep 09 10:03:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264884353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_stall.2264884353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.4049379599 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 191979067 ps |
| CPU time | 1.53 seconds |
| Started | Sep 09 10:03:25 AM UTC 24 |
| Finished | Sep 09 10:03:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049379599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_trans.4049379599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.3357367843 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 4866419146 ps |
| CPU time | 48.05 seconds |
| Started | Sep 09 10:03:25 AM UTC 24 |
| Finished | Sep 09 10:04:15 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357367843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.3357367843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.845094525 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 10610352326 ps |
| CPU time | 78.86 seconds |
| Started | Sep 09 10:03:25 AM UTC 24 |
| Finished | Sep 09 10:04:46 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=845094525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.845094525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.467474038 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 309813968 ps |
| CPU time | 1.98 seconds |
| Started | Sep 09 10:03:27 AM UTC 24 |
| Finished | Sep 09 10:03:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=467474038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_link_in_err.467474038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.1115966824 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 31224604789 ps |
| CPU time | 74.01 seconds |
| Started | Sep 09 10:03:27 AM UTC 24 |
| Finished | Sep 09 10:04:43 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1115966824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.1115966824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.4031032140 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 4662278896 ps |
| CPU time | 11.05 seconds |
| Started | Sep 09 10:03:27 AM UTC 24 |
| Finished | Sep 09 10:03:39 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031032140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.4031032140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.4148627300 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 2724185971 ps |
| CPU time | 37.22 seconds |
| Started | Sep 09 10:03:29 AM UTC 24 |
| Finished | Sep 09 10:04:08 AM UTC 24 |
| Peak memory | 233984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4148627300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.4148627300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.1459103703 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 2521908993 ps |
| CPU time | 70.27 seconds |
| Started | Sep 09 10:03:29 AM UTC 24 |
| Finished | Sep 09 10:04:41 AM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459103703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.1459103703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.1114255371 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 248008702 ps |
| CPU time | 1.85 seconds |
| Started | Sep 09 10:03:29 AM UTC 24 |
| Finished | Sep 09 10:03:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114255371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.1114255371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.3646015108 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 225936755 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:03:29 AM UTC 24 |
| Finished | Sep 09 10:03:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3646015108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.3646015108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.2452678583 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 2390170012 ps |
| CPU time | 20.5 seconds |
| Started | Sep 09 10:03:29 AM UTC 24 |
| Finished | Sep 09 10:03:51 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452678583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.2452678583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.2152912901 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 1741283720 ps |
| CPU time | 16.04 seconds |
| Started | Sep 09 10:03:31 AM UTC 24 |
| Finished | Sep 09 10:03:48 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152912901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.2152912901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.3171672920 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 2777536614 ps |
| CPU time | 73.37 seconds |
| Started | Sep 09 10:03:33 AM UTC 24 |
| Finished | Sep 09 10:04:49 AM UTC 24 |
| Peak memory | 226968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171672920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.3171672920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.3005194943 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 168632016 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:03:33 AM UTC 24 |
| Finished | Sep 09 10:03:36 AM UTC 24 |
| Peak memory | 214772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005194943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.3005194943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.3818851568 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 145680209 ps |
| CPU time | 1.22 seconds |
| Started | Sep 09 10:03:33 AM UTC 24 |
| Finished | Sep 09 10:03:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818851568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.3818851568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.3793012664 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 184886333 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:03:34 AM UTC 24 |
| Finished | Sep 09 10:03:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793012664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.3793012664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.729478922 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 185552803 ps |
| CPU time | 1.6 seconds |
| Started | Sep 09 10:03:35 AM UTC 24 |
| Finished | Sep 09 10:03:38 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=729478922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_out_iso.729478922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.1867922301 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 188628207 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:03:37 AM UTC 24 |
| Finished | Sep 09 10:03:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867922301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.1867922301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.143433288 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 174882131 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:03:37 AM UTC 24 |
| Finished | Sep 09 10:03:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=143433288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_out_trans_nak.143433288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.290817855 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 147613605 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:03:38 AM UTC 24 |
| Finished | Sep 09 10:03:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=290817855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pending_in_trans.290817855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.1672536115 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 311398713 ps |
| CPU time | 1.99 seconds |
| Started | Sep 09 10:03:40 AM UTC 24 |
| Finished | Sep 09 10:03:43 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1672536115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.1672536115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.2936247323 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 146949358 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:03:40 AM UTC 24 |
| Finished | Sep 09 10:03:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936247323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.2936247323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.1698810151 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 33436192 ps |
| CPU time | 1.09 seconds |
| Started | Sep 09 10:03:40 AM UTC 24 |
| Finished | Sep 09 10:03:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698810151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.1698810151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.3798664312 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 6461880400 ps |
| CPU time | 24.61 seconds |
| Started | Sep 09 10:03:40 AM UTC 24 |
| Finished | Sep 09 10:04:06 AM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798664312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.3798664312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.1077899651 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 162917625 ps |
| CPU time | 1.38 seconds |
| Started | Sep 09 10:03:41 AM UTC 24 |
| Finished | Sep 09 10:03:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1077899651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.1077899651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.1292408871 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 229523236 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:03:41 AM UTC 24 |
| Finished | Sep 09 10:03:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292408871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_pkt_sent.1292408871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.1444286378 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 6404601327 ps |
| CPU time | 81.8 seconds |
| Started | Sep 09 10:03:42 AM UTC 24 |
| Finished | Sep 09 10:05:06 AM UTC 24 |
| Peak memory | 234416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444286378 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.1444286378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.468721169 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 7022594318 ps |
| CPU time | 79.61 seconds |
| Started | Sep 09 10:03:44 AM UTC 24 |
| Finished | Sep 09 10:05:05 AM UTC 24 |
| Peak memory | 234180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=468721169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.468721169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.3778126015 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 10568929563 ps |
| CPU time | 194.88 seconds |
| Started | Sep 09 10:03:44 AM UTC 24 |
| Finished | Sep 09 10:07:02 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778126015 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.3778126015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.664475277 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 221748236 ps |
| CPU time | 1.14 seconds |
| Started | Sep 09 10:03:41 AM UTC 24 |
| Finished | Sep 09 10:03:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=664475277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_random_length_in_transaction.664475277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.3227301947 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 204544216 ps |
| CPU time | 1.57 seconds |
| Started | Sep 09 10:03:41 AM UTC 24 |
| Finished | Sep 09 10:03:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3227301947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.3227301947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.3212692078 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 20193316514 ps |
| CPU time | 30.73 seconds |
| Started | Sep 09 10:03:44 AM UTC 24 |
| Finished | Sep 09 10:04:16 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3212692078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_resume_link_active.3212692078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.870335878 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 159720025 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:03:45 AM UTC 24 |
| Finished | Sep 09 10:03:47 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=870335878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_rx_crc_err.870335878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.4123867734 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 328857812 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:03:45 AM UTC 24 |
| Finished | Sep 09 10:03:48 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123867734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.4123867734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.2068876873 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 175028343 ps |
| CPU time | 1.55 seconds |
| Started | Sep 09 10:03:45 AM UTC 24 |
| Finished | Sep 09 10:03:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068876873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.2068876873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.3056174485 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 146134852 ps |
| CPU time | 1.42 seconds |
| Started | Sep 09 10:03:45 AM UTC 24 |
| Finished | Sep 09 10:03:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3056174485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 9.usbdev_setup_trans_ignored.3056174485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.705496090 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 227861817 ps |
| CPU time | 1.51 seconds |
| Started | Sep 09 10:03:49 AM UTC 24 |
| Finished | Sep 09 10:03:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=705496090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.705496090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.1856233039 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 1745350424 ps |
| CPU time | 20.26 seconds |
| Started | Sep 09 10:03:49 AM UTC 24 |
| Finished | Sep 09 10:04:10 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856233039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.1856233039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.2882285438 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 215339609 ps |
| CPU time | 1.63 seconds |
| Started | Sep 09 10:03:49 AM UTC 24 |
| Finished | Sep 09 10:03:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2882285438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.2882285438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.793377799 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 153768722 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:03:49 AM UTC 24 |
| Finished | Sep 09 10:03:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=793377799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_stall_trans.793377799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.860122668 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 760444358 ps |
| CPU time | 3.41 seconds |
| Started | Sep 09 10:03:49 AM UTC 24 |
| Finished | Sep 09 10:03:53 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=860122668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_stream_len_max.860122668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1403036362 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 3177377799 ps |
| CPU time | 28.49 seconds |
| Started | Sep 09 10:03:49 AM UTC 24 |
| Finished | Sep 09 10:04:19 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1403036362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.1403036362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.2216198473 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 6643828190 ps |
| CPU time | 114.81 seconds |
| Started | Sep 09 10:03:50 AM UTC 24 |
| Finished | Sep 09 10:05:48 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2216198473 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.2216198473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3506591647 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 3597090350 ps |
| CPU time | 23.55 seconds |
| Started | Sep 09 10:03:19 AM UTC 24 |
| Finished | Sep 09 10:03:44 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506591647 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.3506591647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.2135947074 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 534617074 ps |
| CPU time | 1.68 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135947074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.2135947074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.969215541 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 294708831 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=969215541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 90.usbdev_fifo_levels.969215541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/90.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3222406372 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 513605932 ps |
| CPU time | 1.71 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3222406372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.3222406372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.2361803526 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 596979198 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:03 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361803526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.2361803526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.12252352 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 196014887 ps |
| CPU time | 0.97 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12252352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 91.usbdev_fifo_levels.12252352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/91.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.2689662889 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 511596075 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2689662889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_t x_rx_disruption.2689662889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.4197006157 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 162581784 ps |
| CPU time | 0.94 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197006157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.4197006157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.2474410768 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 265745194 ps |
| CPU time | 1.18 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:03 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2474410768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 92.usbdev_fifo_levels.2474410768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/92.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1717772930 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 483580308 ps |
| CPU time | 1.59 seconds |
| Started | Sep 09 10:17:59 AM UTC 24 |
| Finished | Sep 09 10:18:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1717772930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.1717772930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.2839895268 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 499232414 ps |
| CPU time | 1.46 seconds |
| Started | Sep 09 10:18:00 AM UTC 24 |
| Finished | Sep 09 10:18:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839895268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.2839895268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.1746825094 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 158726312 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:18:00 AM UTC 24 |
| Finished | Sep 09 10:18:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1746825094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 93.usbdev_fifo_levels.1746825094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/93.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1805982871 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 659124890 ps |
| CPU time | 1.72 seconds |
| Started | Sep 09 10:18:00 AM UTC 24 |
| Finished | Sep 09 10:18:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1805982871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.1805982871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.235830318 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 197342859 ps |
| CPU time | 1.03 seconds |
| Started | Sep 09 10:18:01 AM UTC 24 |
| Finished | Sep 09 10:18:04 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=235830318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.235830318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.3332561678 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 249636270 ps |
| CPU time | 1.06 seconds |
| Started | Sep 09 10:18:01 AM UTC 24 |
| Finished | Sep 09 10:18:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332561678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 94.usbdev_fifo_levels.3332561678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/94.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.1538649999 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 594240261 ps |
| CPU time | 1.73 seconds |
| Started | Sep 09 10:18:01 AM UTC 24 |
| Finished | Sep 09 10:18:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1538649999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_t x_rx_disruption.1538649999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.3308477303 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 453654958 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:18:01 AM UTC 24 |
| Finished | Sep 09 10:18:04 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308477303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.3308477303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.4083553079 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 151304172 ps |
| CPU time | 0.79 seconds |
| Started | Sep 09 10:18:01 AM UTC 24 |
| Finished | Sep 09 10:18:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083553079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 95.usbdev_fifo_levels.4083553079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1008294782 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 452819512 ps |
| CPU time | 1.29 seconds |
| Started | Sep 09 10:18:01 AM UTC 24 |
| Finished | Sep 09 10:18:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1008294782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.1008294782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.2236603689 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 291378015 ps |
| CPU time | 1.17 seconds |
| Started | Sep 09 10:18:01 AM UTC 24 |
| Finished | Sep 09 10:18:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2236603689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 96.usbdev_fifo_levels.2236603689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.993663911 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 502327964 ps |
| CPU time | 1.67 seconds |
| Started | Sep 09 10:18:01 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=993663911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_tx _rx_disruption.993663911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2405561085 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 498156789 ps |
| CPU time | 1.5 seconds |
| Started | Sep 09 10:18:02 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2405561085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.2405561085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.1922445937 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 317988947 ps |
| CPU time | 1.23 seconds |
| Started | Sep 09 10:18:02 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922445937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 97.usbdev_fifo_levels.1922445937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.1108239645 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 510825403 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:18:02 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1108239645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_t x_rx_disruption.1108239645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.2213816527 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 331741137 ps |
| CPU time | 1.16 seconds |
| Started | Sep 09 10:18:02 AM UTC 24 |
| Finished | Sep 09 10:18:04 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213816527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.2213816527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.1586564007 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 282389268 ps |
| CPU time | 1.47 seconds |
| Started | Sep 09 10:18:02 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586564007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 98.usbdev_fifo_levels.1586564007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.2748380844 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 538703227 ps |
| CPU time | 1.78 seconds |
| Started | Sep 09 10:18:02 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2748380844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.2748380844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.68797885 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 426356734 ps |
| CPU time | 1.36 seconds |
| Started | Sep 09 10:18:02 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=68797885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.68797885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.3021941776 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 261446505 ps |
| CPU time | 1.19 seconds |
| Started | Sep 09 10:18:02 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021941776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 99.usbdev_fifo_levels.3021941776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.1703575298 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 615175709 ps |
| CPU time | 1.69 seconds |
| Started | Sep 09 10:18:02 AM UTC 24 |
| Finished | Sep 09 10:18:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1703575298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_t x_rx_disruption.1703575298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_08/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |