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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.64 98.22 96.10 97.44 96.61 98.38 98.17 98.55


Total test records in report: 3830
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T450 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.505523672 Sep 11 08:35:19 AM UTC 24 Sep 11 08:35:22 AM UTC 24 497856802 ps
T3209 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.1470829302 Sep 11 08:35:19 AM UTC 24 Sep 11 08:35:23 AM UTC 24 632360062 ps
T413 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.3935920193 Sep 11 08:35:19 AM UTC 24 Sep 11 08:35:23 AM UTC 24 454468664 ps
T3210 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.230158150 Sep 11 08:35:05 AM UTC 24 Sep 11 08:35:23 AM UTC 24 2004171405 ps
T3211 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.3109358359 Sep 11 08:35:03 AM UTC 24 Sep 11 08:35:23 AM UTC 24 2509959585 ps
T3212 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.2550686194 Sep 11 08:35:21 AM UTC 24 Sep 11 08:35:24 AM UTC 24 147766755 ps
T3213 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.3502097097 Sep 11 08:34:52 AM UTC 24 Sep 11 08:35:24 AM UTC 24 3534436309 ps
T334 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.2393845137 Sep 11 08:35:21 AM UTC 24 Sep 11 08:35:24 AM UTC 24 275533006 ps
T471 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.2592511881 Sep 11 08:35:21 AM UTC 24 Sep 11 08:35:24 AM UTC 24 242755358 ps
T3214 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1436755080 Sep 11 08:35:21 AM UTC 24 Sep 11 08:35:24 AM UTC 24 589759196 ps
T3215 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.270875336 Sep 11 08:35:21 AM UTC 24 Sep 11 08:35:24 AM UTC 24 594716334 ps
T3216 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.3104016727 Sep 11 08:35:21 AM UTC 24 Sep 11 08:35:24 AM UTC 24 604762404 ps
T453 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.3987069844 Sep 11 08:35:21 AM UTC 24 Sep 11 08:35:25 AM UTC 24 588630305 ps
T3217 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.79513750 Sep 11 08:35:09 AM UTC 24 Sep 11 08:35:25 AM UTC 24 7713286360 ps
T385 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.1036019241 Sep 11 08:35:23 AM UTC 24 Sep 11 08:35:25 AM UTC 24 157726135 ps
T3218 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.945098376 Sep 11 08:34:09 AM UTC 24 Sep 11 08:35:26 AM UTC 24 2785259326 ps
T392 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.3163268403 Sep 11 08:35:23 AM UTC 24 Sep 11 08:35:26 AM UTC 24 254310491 ps
T3219 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.1980794448 Sep 11 08:35:24 AM UTC 24 Sep 11 08:35:26 AM UTC 24 342791727 ps
T469 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.3514906801 Sep 11 08:35:23 AM UTC 24 Sep 11 08:35:26 AM UTC 24 293247018 ps
T424 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.3079216391 Sep 11 08:35:23 AM UTC 24 Sep 11 08:35:26 AM UTC 24 425673422 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.1828186042 Sep 11 08:35:24 AM UTC 24 Sep 11 08:35:26 AM UTC 24 261487134 ps
T3220 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.3028201072 Sep 11 08:35:23 AM UTC 24 Sep 11 08:35:27 AM UTC 24 554928335 ps
T3221 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.1779048313 Sep 11 08:35:23 AM UTC 24 Sep 11 08:35:27 AM UTC 24 589451328 ps
T3222 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.343224010 Sep 11 08:35:24 AM UTC 24 Sep 11 08:35:27 AM UTC 24 551228259 ps
T3223 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.3173464202 Sep 11 08:34:55 AM UTC 24 Sep 11 08:35:27 AM UTC 24 3213244138 ps
T3224 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.2932613922 Sep 11 08:35:25 AM UTC 24 Sep 11 08:35:28 AM UTC 24 144681383 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.1211328802 Sep 11 08:35:25 AM UTC 24 Sep 11 08:35:28 AM UTC 24 515753404 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.1482683155 Sep 11 08:35:25 AM UTC 24 Sep 11 08:35:28 AM UTC 24 251642259 ps
T366 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.3084453026 Sep 11 08:35:26 AM UTC 24 Sep 11 08:35:28 AM UTC 24 275587664 ps
T3225 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.4212021363 Sep 11 08:35:25 AM UTC 24 Sep 11 08:35:28 AM UTC 24 346394054 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.381141442 Sep 11 08:35:26 AM UTC 24 Sep 11 08:35:28 AM UTC 24 261731305 ps
T3226 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.2849628137 Sep 11 08:35:10 AM UTC 24 Sep 11 08:35:28 AM UTC 24 11135753736 ps
T3227 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3151787128 Sep 11 08:34:48 AM UTC 24 Sep 11 08:35:28 AM UTC 24 24054696677 ps
T3228 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.1663563422 Sep 11 08:35:25 AM UTC 24 Sep 11 08:35:28 AM UTC 24 556325828 ps
T3229 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.511366112 Sep 11 08:35:26 AM UTC 24 Sep 11 08:35:28 AM UTC 24 507214667 ps
T476 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.2750312924 Sep 11 08:35:25 AM UTC 24 Sep 11 08:35:29 AM UTC 24 634603332 ps
T487 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.2026317089 Sep 11 08:35:26 AM UTC 24 Sep 11 08:35:29 AM UTC 24 485581547 ps
T3230 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.107524857 Sep 11 08:35:27 AM UTC 24 Sep 11 08:35:29 AM UTC 24 152483269 ps
T3231 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.289363759 Sep 11 08:35:25 AM UTC 24 Sep 11 08:35:29 AM UTC 24 697304800 ps
T490 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.4197480335 Sep 11 08:35:27 AM UTC 24 Sep 11 08:35:30 AM UTC 24 448893994 ps
T359 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.1110478831 Sep 11 08:35:27 AM UTC 24 Sep 11 08:35:30 AM UTC 24 308579311 ps
T355 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.1404436291 Sep 11 08:35:27 AM UTC 24 Sep 11 08:35:30 AM UTC 24 264676916 ps
T3232 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.1304487680 Sep 11 08:35:27 AM UTC 24 Sep 11 08:35:30 AM UTC 24 651825356 ps
T542 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.951325775 Sep 11 08:35:27 AM UTC 24 Sep 11 08:35:30 AM UTC 24 388492448 ps
T3233 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.443003532 Sep 11 08:35:27 AM UTC 24 Sep 11 08:35:30 AM UTC 24 563465305 ps
T3234 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.2800824728 Sep 11 08:35:05 AM UTC 24 Sep 11 08:35:30 AM UTC 24 15303824649 ps
T415 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.328397751 Sep 11 08:35:27 AM UTC 24 Sep 11 08:35:30 AM UTC 24 509685549 ps
T3235 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.2116303623 Sep 11 08:35:27 AM UTC 24 Sep 11 08:35:30 AM UTC 24 494907667 ps
T3236 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.1876918634 Sep 11 08:35:27 AM UTC 24 Sep 11 08:35:31 AM UTC 24 565416927 ps
T3237 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.2982906245 Sep 11 08:34:42 AM UTC 24 Sep 11 08:35:31 AM UTC 24 15735365850 ps
T3238 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.3771094677 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:31 AM UTC 24 263018184 ps
T3239 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.1289173020 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:31 AM UTC 24 268077003 ps
T3240 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.1794299032 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:31 AM UTC 24 193747083 ps
T343 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2567285673 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:32 AM UTC 24 187477284 ps
T516 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.218289938 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:32 AM UTC 24 438797465 ps
T544 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.1903862739 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:32 AM UTC 24 530511744 ps
T306 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.3744412976 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:32 AM UTC 24 264238745 ps
T3241 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.4033589450 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:32 AM UTC 24 507120455 ps
T3242 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.2997685567 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:32 AM UTC 24 538216846 ps
T451 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.776451843 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:32 AM UTC 24 523691055 ps
T3243 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.2563505238 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:32 AM UTC 24 626388716 ps
T3244 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.805154622 Sep 11 08:35:29 AM UTC 24 Sep 11 08:35:32 AM UTC 24 597523325 ps
T3245 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.3768130027 Sep 11 08:35:31 AM UTC 24 Sep 11 08:35:33 AM UTC 24 206485631 ps
T3246 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.2979201585 Sep 11 08:35:31 AM UTC 24 Sep 11 08:35:34 AM UTC 24 495204261 ps
T3247 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.1071027319 Sep 11 08:35:31 AM UTC 24 Sep 11 08:35:34 AM UTC 24 557051485 ps
T3248 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.620437159 Sep 11 08:35:31 AM UTC 24 Sep 11 08:35:34 AM UTC 24 641898252 ps
T3249 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3433396327 Sep 11 08:34:49 AM UTC 24 Sep 11 08:35:34 AM UTC 24 7029712640 ps
T3250 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.3516523107 Sep 11 08:35:31 AM UTC 24 Sep 11 08:35:35 AM UTC 24 529990735 ps
T444 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.3897836499 Sep 11 08:35:31 AM UTC 24 Sep 11 08:35:35 AM UTC 24 707681574 ps
T3251 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.1924081937 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:35 AM UTC 24 159996418 ps
T362 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.3737272453 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:35 AM UTC 24 269447016 ps
T3252 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.2253654979 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:35 AM UTC 24 166601920 ps
T3253 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.3240761725 Sep 11 08:33:57 AM UTC 24 Sep 11 08:35:36 AM UTC 24 46352815817 ps
T3254 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.4193305780 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:36 AM UTC 24 263346132 ps
T3255 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.3254093994 Sep 11 08:34:35 AM UTC 24 Sep 11 08:35:36 AM UTC 24 32038106526 ps
T500 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.3445290986 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:36 AM UTC 24 382664935 ps
T414 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.3651975670 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:36 AM UTC 24 329979975 ps
T400 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.3466580717 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:36 AM UTC 24 256484647 ps
T533 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.241291873 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:36 AM UTC 24 585617168 ps
T367 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.2102568130 Sep 11 08:35:34 AM UTC 24 Sep 11 08:35:36 AM UTC 24 292974997 ps
T443 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.379284420 Sep 11 08:35:34 AM UTC 24 Sep 11 08:35:36 AM UTC 24 533167347 ps
T421 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.916056788 Sep 11 08:35:34 AM UTC 24 Sep 11 08:35:36 AM UTC 24 490357140 ps
T3256 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.4050783685 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:36 AM UTC 24 579196634 ps
T3257 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.2497883419 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:36 AM UTC 24 665090764 ps
T3258 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.2676913631 Sep 11 08:35:33 AM UTC 24 Sep 11 08:35:37 AM UTC 24 537548008 ps
T3259 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.2806609464 Sep 11 08:35:34 AM UTC 24 Sep 11 08:35:37 AM UTC 24 538362545 ps
T3260 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.3140146021 Sep 11 08:35:34 AM UTC 24 Sep 11 08:35:37 AM UTC 24 661028436 ps
T3261 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.3470190479 Sep 11 08:35:35 AM UTC 24 Sep 11 08:35:38 AM UTC 24 186291187 ps
T399 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.3873051923 Sep 11 08:35:35 AM UTC 24 Sep 11 08:35:38 AM UTC 24 268034107 ps
T455 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.1913586584 Sep 11 08:35:35 AM UTC 24 Sep 11 08:35:38 AM UTC 24 397124583 ps
T349 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.887445534 Sep 11 08:35:36 AM UTC 24 Sep 11 08:35:38 AM UTC 24 270218619 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.4201190127 Sep 11 08:35:36 AM UTC 24 Sep 11 08:35:38 AM UTC 24 252779417 ps
T505 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.3891064260 Sep 11 08:35:36 AM UTC 24 Sep 11 08:35:38 AM UTC 24 468234577 ps
T3262 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.3832567006 Sep 11 08:35:36 AM UTC 24 Sep 11 08:35:38 AM UTC 24 294956170 ps
T3263 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.2218047739 Sep 11 08:35:09 AM UTC 24 Sep 11 08:35:38 AM UTC 24 3576474136 ps
T3264 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.2144273090 Sep 11 08:35:36 AM UTC 24 Sep 11 08:35:38 AM UTC 24 520304991 ps
T438 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.3408931506 Sep 11 08:35:36 AM UTC 24 Sep 11 08:35:38 AM UTC 24 396787311 ps
T339 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.776217019 Sep 11 08:35:36 AM UTC 24 Sep 11 08:35:38 AM UTC 24 268682775 ps
T3265 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.2021177392 Sep 11 08:35:35 AM UTC 24 Sep 11 08:35:38 AM UTC 24 673454017 ps
T3266 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.1910680647 Sep 11 08:35:36 AM UTC 24 Sep 11 08:35:38 AM UTC 24 483160820 ps
T3267 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.198748491 Sep 11 08:35:36 AM UTC 24 Sep 11 08:35:38 AM UTC 24 525751146 ps
T3268 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.1315453358 Sep 11 08:33:42 AM UTC 24 Sep 11 08:35:39 AM UTC 24 4115679501 ps
T3269 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.464835358 Sep 11 08:35:10 AM UTC 24 Sep 11 08:35:39 AM UTC 24 3656227466 ps
T3270 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.4218811837 Sep 11 08:35:38 AM UTC 24 Sep 11 08:35:40 AM UTC 24 152811957 ps
T395 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.599135534 Sep 11 08:35:38 AM UTC 24 Sep 11 08:35:40 AM UTC 24 250598053 ps
T396 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.1706918650 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:45 AM UTC 24 255804452 ps
T3271 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.404750751 Sep 11 08:34:55 AM UTC 24 Sep 11 08:35:40 AM UTC 24 1751957702 ps
T520 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.2651793223 Sep 11 08:35:38 AM UTC 24 Sep 11 08:35:40 AM UTC 24 229669076 ps
T360 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.432393114 Sep 11 08:35:38 AM UTC 24 Sep 11 08:35:41 AM UTC 24 284284460 ps
T393 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.1860215467 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:41 AM UTC 24 285537027 ps
T3272 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.3864464544 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:41 AM UTC 24 147259807 ps
T537 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.1024086873 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:41 AM UTC 24 265787561 ps
T510 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.234235746 Sep 11 08:35:38 AM UTC 24 Sep 11 08:35:41 AM UTC 24 459294527 ps
T3273 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.1243114933 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:41 AM UTC 24 204171241 ps
T307 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.4120017525 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:41 AM UTC 24 269445342 ps
T477 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.416044211 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:41 AM UTC 24 462450603 ps
T3274 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.1339904962 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:41 AM UTC 24 314787248 ps
T3275 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.1487995429 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:41 AM UTC 24 245579908 ps
T3276 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.3449288714 Sep 11 08:35:38 AM UTC 24 Sep 11 08:35:41 AM UTC 24 635383979 ps
T3277 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.2310580835 Sep 11 08:35:38 AM UTC 24 Sep 11 08:35:41 AM UTC 24 451863192 ps
T3278 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.346100782 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:41 AM UTC 24 279126826 ps
T3279 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.1406522712 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:41 AM UTC 24 525703395 ps
T130 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.2615973467 Sep 11 08:35:38 AM UTC 24 Sep 11 08:35:41 AM UTC 24 687544797 ps
T3280 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.534718750 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:42 AM UTC 24 540361643 ps
T3281 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.356021889 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:42 AM UTC 24 626872807 ps
T3282 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.1696791197 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:42 AM UTC 24 628465881 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.2600448697 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:42 AM UTC 24 534611910 ps
T3283 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.691291875 Sep 11 08:35:39 AM UTC 24 Sep 11 08:35:42 AM UTC 24 519594267 ps
T394 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.4288873999 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:43 AM UTC 24 246425157 ps
T403 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.1938898090 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:43 AM UTC 24 249289685 ps
T3284 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.1320391092 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:43 AM UTC 24 291295349 ps
T3285 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.2514177467 Sep 11 08:35:01 AM UTC 24 Sep 11 08:35:43 AM UTC 24 14569093269 ps
T3286 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.3324088539 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:43 AM UTC 24 288646020 ps
T3287 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.3169832663 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:43 AM UTC 24 293445400 ps
T124 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.412414161 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:43 AM UTC 24 461756401 ps
T488 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.3250639931 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:43 AM UTC 24 532485454 ps
T3288 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.1210610953 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:43 AM UTC 24 486439383 ps
T3289 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.2290764520 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:43 AM UTC 24 489327903 ps
T3290 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.3806759977 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:44 AM UTC 24 497075035 ps
T3291 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.441792183 Sep 11 08:35:41 AM UTC 24 Sep 11 08:35:44 AM UTC 24 545581962 ps
T3292 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.1613231511 Sep 11 08:34:12 AM UTC 24 Sep 11 08:35:44 AM UTC 24 48616349751 ps
T3293 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.308966101 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:45 AM UTC 24 267112635 ps
T358 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.4037294561 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:45 AM UTC 24 193422791 ps
T3294 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.2458081927 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 490366912 ps
T404 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.20107160 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 246972599 ps
T3295 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.3146031929 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 304923432 ps
T3296 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.1102257812 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 483650932 ps
T3297 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.1745647064 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 654514879 ps
T3298 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.1899937901 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 626518352 ps
T511 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.1050455517 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 572466810 ps
T350 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.2879413207 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 257820351 ps
T3299 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.2127059666 Sep 11 08:35:44 AM UTC 24 Sep 11 08:35:46 AM UTC 24 258792854 ps
T430 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.1912505331 Sep 11 08:35:44 AM UTC 24 Sep 11 08:35:46 AM UTC 24 369274291 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2268533918 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 525981196 ps
T3300 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1980682886 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 610584314 ps
T434 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.589367658 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 650544005 ps
T449 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.1442573484 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 631022052 ps
T3301 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.3924029964 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 493666067 ps
T3302 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.1749438193 Sep 11 08:35:43 AM UTC 24 Sep 11 08:35:46 AM UTC 24 501089368 ps
T3303 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.3781663654 Sep 11 08:35:05 AM UTC 24 Sep 11 08:35:47 AM UTC 24 20765769811 ps
T3304 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.2325288622 Sep 11 08:35:44 AM UTC 24 Sep 11 08:35:47 AM UTC 24 601745718 ps
T3305 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.2789540643 Sep 11 08:36:18 AM UTC 24 Sep 11 08:36:20 AM UTC 24 381401486 ps
T3306 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.2771670328 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:49 AM UTC 24 193327789 ps
T3307 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.1752597904 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:49 AM UTC 24 229193405 ps
T3308 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.4159618011 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:49 AM UTC 24 271740977 ps
T540 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.2342798753 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:49 AM UTC 24 163568223 ps
T378 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.3676653906 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 241633194 ps
T319 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.3537014350 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 261381093 ps
T363 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.3582986549 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 266687365 ps
T457 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.863051678 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 505412649 ps
T470 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1156473221 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 610176889 ps
T3309 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.1278806018 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 540304380 ps
T456 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.518102321 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 464020029 ps
T3310 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.4249990106 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 532189104 ps
T3311 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.513785600 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 612721909 ps
T3312 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.493359231 Sep 11 08:34:25 AM UTC 24 Sep 11 08:35:50 AM UTC 24 3156678114 ps
T3313 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.2246867856 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 648480309 ps
T458 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.3960122686 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 519269815 ps
T3314 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.1937231794 Sep 11 08:35:46 AM UTC 24 Sep 11 08:35:50 AM UTC 24 572148710 ps
T3315 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.832873721 Sep 11 08:34:19 AM UTC 24 Sep 11 08:35:53 AM UTC 24 3473806244 ps
T344 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.2031713925 Sep 11 08:35:52 AM UTC 24 Sep 11 08:35:55 AM UTC 24 185078618 ps
T3316 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.1187504988 Sep 11 08:35:52 AM UTC 24 Sep 11 08:35:55 AM UTC 24 208972349 ps
T3317 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.459767450 Sep 11 08:34:48 AM UTC 24 Sep 11 08:35:55 AM UTC 24 32695684619 ps
T325 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.3968404914 Sep 11 08:35:52 AM UTC 24 Sep 11 08:35:55 AM UTC 24 248700060 ps
T3318 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.2640486646 Sep 11 08:35:52 AM UTC 24 Sep 11 08:35:55 AM UTC 24 257729722 ps
T512 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.3734582433 Sep 11 08:35:52 AM UTC 24 Sep 11 08:35:55 AM UTC 24 267753448 ps
T3319 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.3576908718 Sep 11 08:35:05 AM UTC 24 Sep 11 08:35:55 AM UTC 24 29134082223 ps
T3320 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.1376695153 Sep 11 08:35:50 AM UTC 24 Sep 11 08:35:55 AM UTC 24 173268815 ps
T513 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.2036651540 Sep 11 08:35:52 AM UTC 24 Sep 11 08:35:55 AM UTC 24 387977329 ps
T3321 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.4086104892 Sep 11 08:35:52 AM UTC 24 Sep 11 08:35:55 AM UTC 24 508493981 ps
T536 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.2458763367 Sep 11 08:35:50 AM UTC 24 Sep 11 08:35:56 AM UTC 24 434014390 ps
T3322 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.1246710209 Sep 11 08:35:18 AM UTC 24 Sep 11 08:35:56 AM UTC 24 3946921380 ps
T3323 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.1355448659 Sep 11 08:35:52 AM UTC 24 Sep 11 08:35:56 AM UTC 24 588414736 ps
T3324 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.3744263514 Sep 11 08:35:52 AM UTC 24 Sep 11 08:35:56 AM UTC 24 491165913 ps
T375 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.794703279 Sep 11 08:35:50 AM UTC 24 Sep 11 08:35:56 AM UTC 24 268924526 ps
T234 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.801383290 Sep 11 08:35:50 AM UTC 24 Sep 11 08:35:56 AM UTC 24 462343170 ps
T3325 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.4009912014 Sep 11 08:35:50 AM UTC 24 Sep 11 08:35:56 AM UTC 24 613495001 ps
T3326 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.4088766431 Sep 11 08:34:46 AM UTC 24 Sep 11 08:35:56 AM UTC 24 2541053426 ps
T538 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.854962658 Sep 11 08:35:50 AM UTC 24 Sep 11 08:35:56 AM UTC 24 749825985 ps
T3327 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.2360329544 Sep 11 08:35:58 AM UTC 24 Sep 11 08:35:59 AM UTC 24 163047214 ps
T3328 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.1981838674 Sep 11 08:35:58 AM UTC 24 Sep 11 08:35:59 AM UTC 24 200550392 ps
T3329 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.1605762862 Sep 11 08:35:47 AM UTC 24 Sep 11 08:36:00 AM UTC 24 176206068 ps
T3330 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.878427462 Sep 11 08:35:46 AM UTC 24 Sep 11 08:36:00 AM UTC 24 257150535 ps
T3331 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.2493749001 Sep 11 08:35:58 AM UTC 24 Sep 11 08:36:00 AM UTC 24 273380371 ps
T311 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.1649048221 Sep 11 08:35:57 AM UTC 24 Sep 11 08:36:00 AM UTC 24 327399326 ps
T308 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.963463203 Sep 11 08:35:58 AM UTC 24 Sep 11 08:36:00 AM UTC 24 266560628 ps
T416 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.4169141583 Sep 11 08:35:47 AM UTC 24 Sep 11 08:36:00 AM UTC 24 393063706 ps
T3332 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.3664673678 Sep 11 08:35:58 AM UTC 24 Sep 11 08:36:00 AM UTC 24 282339089 ps
T3333 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.890237943 Sep 11 08:35:58 AM UTC 24 Sep 11 08:36:00 AM UTC 24 513299468 ps
T3334 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.2366321198 Sep 11 08:34:30 AM UTC 24 Sep 11 08:36:00 AM UTC 24 46939983200 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.3079739254 Sep 11 08:35:47 AM UTC 24 Sep 11 08:36:00 AM UTC 24 499106614 ps
T3335 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.2730645103 Sep 11 08:35:58 AM UTC 24 Sep 11 08:36:00 AM UTC 24 586559551 ps
T3336 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.2302498124 Sep 11 08:35:46 AM UTC 24 Sep 11 08:36:00 AM UTC 24 622410107 ps
T3337 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3866425989 Sep 11 08:35:47 AM UTC 24 Sep 11 08:36:00 AM UTC 24 559402780 ps
T425 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.1980402787 Sep 11 08:35:58 AM UTC 24 Sep 11 08:36:00 AM UTC 24 513377773 ps
T3338 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.3189803244 Sep 11 08:35:58 AM UTC 24 Sep 11 08:36:00 AM UTC 24 524038373 ps
T3339 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.2627342889 Sep 11 08:35:58 AM UTC 24 Sep 11 08:36:00 AM UTC 24 569217409 ps
T514 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.2963041242 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:01 AM UTC 24 441315145 ps
T3340 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3852893785 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:04 AM UTC 24 154618484 ps
T474 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.1626944774 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:04 AM UTC 24 415176062 ps
T361 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.2838082806 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:04 AM UTC 24 282190985 ps
T3341 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.3966453917 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:04 AM UTC 24 294397142 ps
T3342 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.261431881 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:04 AM UTC 24 553058937 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.2440522539 Sep 11 08:36:02 AM UTC 24 Sep 11 08:36:04 AM UTC 24 250160968 ps
T3343 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.2591117945 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:04 AM UTC 24 528813076 ps
T417 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.2845309365 Sep 11 08:36:02 AM UTC 24 Sep 11 08:36:05 AM UTC 24 542678983 ps
T3344 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.3069315926 Sep 11 08:36:02 AM UTC 24 Sep 11 08:36:05 AM UTC 24 536118965 ps
T3345 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.3483848305 Sep 11 08:36:02 AM UTC 24 Sep 11 08:36:05 AM UTC 24 558589604 ps
T556 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.2944228505 Sep 11 08:36:00 AM UTC 24 Sep 11 08:36:05 AM UTC 24 236163598 ps
T418 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.2556079643 Sep 11 08:35:56 AM UTC 24 Sep 11 08:36:05 AM UTC 24 569477423 ps
T484 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.2462894448 Sep 11 08:35:56 AM UTC 24 Sep 11 08:36:05 AM UTC 24 429824728 ps
T3346 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.3594021379 Sep 11 08:35:11 AM UTC 24 Sep 11 08:36:09 AM UTC 24 2281377844 ps
T3347 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.3518620046 Sep 11 08:36:05 AM UTC 24 Sep 11 08:36:09 AM UTC 24 190126609 ps
T3348 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.2224845318 Sep 11 08:36:00 AM UTC 24 Sep 11 08:36:10 AM UTC 24 537453798 ps
T368 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.2703877744 Sep 11 08:36:05 AM UTC 24 Sep 11 08:36:10 AM UTC 24 293091454 ps
T3349 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.977870496 Sep 11 08:36:05 AM UTC 24 Sep 11 08:36:10 AM UTC 24 299349702 ps
T3350 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.497767991 Sep 11 08:36:05 AM UTC 24 Sep 11 08:36:10 AM UTC 24 569765834 ps
T312 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.1635330686 Sep 11 08:35:48 AM UTC 24 Sep 11 08:36:11 AM UTC 24 259030749 ps
T3351 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.1773661107 Sep 11 08:35:48 AM UTC 24 Sep 11 08:36:11 AM UTC 24 353455674 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.328424201 Sep 11 08:36:18 AM UTC 24 Sep 11 08:36:20 AM UTC 24 262621838 ps
T3352 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.3965801352 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:11 AM UTC 24 159976234 ps
T3353 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.2239249199 Sep 11 08:36:18 AM UTC 24 Sep 11 08:36:20 AM UTC 24 240444580 ps
T543 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.2393329593 Sep 11 08:35:48 AM UTC 24 Sep 11 08:36:11 AM UTC 24 377527717 ps
T435 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.2366693078 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:11 AM UTC 24 388551092 ps
T365 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.1907551840 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:11 AM UTC 24 292232851 ps
T3354 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.3129259767 Sep 11 08:36:06 AM UTC 24 Sep 11 08:36:11 AM UTC 24 166782778 ps
T3355 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.1741245585 Sep 11 08:35:48 AM UTC 24 Sep 11 08:36:11 AM UTC 24 688296162 ps
T3356 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.4190640798 Sep 11 08:35:49 AM UTC 24 Sep 11 08:36:11 AM UTC 24 491065702 ps
T3357 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.81489988 Sep 11 08:36:06 AM UTC 24 Sep 11 08:36:11 AM UTC 24 179467650 ps
T491 /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.281750609 Sep 11 08:36:06 AM UTC 24 Sep 11 08:36:11 AM UTC 24 269282919 ps
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