| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 97.64 | 98.22 | 96.10 | 97.44 | 96.61 | 98.38 | 98.17 | 98.55 |
| T303 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.644135287 | Sep 11 08:38:30 AM UTC 24 | Sep 11 08:38:39 AM UTC 24 | 81237407 ps | ||
| T3765 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.1990044316 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:39 AM UTC 24 | 55809508 ps | ||
| T3766 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.2973674264 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:40 AM UTC 24 | 66777792 ps | ||
| T300 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.872081836 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:40 AM UTC 24 | 55618672 ps | ||
| T3767 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.1349327140 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:40 AM UTC 24 | 99424366 ps | ||
| T3768 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.1922689021 | Sep 11 08:38:35 AM UTC 24 | Sep 11 08:38:40 AM UTC 24 | 49731310 ps | ||
| T3769 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.2445353795 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:40 AM UTC 24 | 253640317 ps | ||
| T3770 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.2701484547 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:40 AM UTC 24 | 153815011 ps | ||
| T3771 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1700814487 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:40 AM UTC 24 | 99528064 ps | ||
| T3772 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.2981738559 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:41 AM UTC 24 | 113729165 ps | ||
| T3773 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.2670646713 | Sep 11 08:38:35 AM UTC 24 | Sep 11 08:38:41 AM UTC 24 | 125757517 ps | ||
| T3774 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3028608725 | Sep 11 08:38:35 AM UTC 24 | Sep 11 08:38:41 AM UTC 24 | 165051874 ps | ||
| T3775 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.2256739956 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:41 AM UTC 24 | 166566614 ps | ||
| T3776 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2001394017 | Sep 11 08:38:36 AM UTC 24 | Sep 11 08:38:41 AM UTC 24 | 264402597 ps | ||
| T3777 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.2736830955 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:41 AM UTC 24 | 89474576 ps | ||
| T564 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2341484138 | Sep 11 08:38:27 AM UTC 24 | Sep 11 08:38:44 AM UTC 24 | 1372563948 ps | ||
| T304 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.1685257003 | Sep 11 08:38:22 AM UTC 24 | Sep 11 08:38:44 AM UTC 24 | 33558283 ps | ||
| T3778 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.3328738912 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 40180547 ps | ||
| T295 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.4141818594 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 36369177 ps | ||
| T296 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3082302185 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 38777800 ps | ||
| T3779 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.1392267394 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 99534273 ps | ||
| T3780 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2470983442 | Sep 11 08:38:22 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 178986187 ps | ||
| T3781 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2022875809 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 117593945 ps | ||
| T3782 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.2070710229 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 59200648 ps | ||
| T3783 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3367989844 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 73662129 ps | ||
| T3784 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2244199330 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 68037470 ps | ||
| T297 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.1418522748 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:11 AM UTC 24 | 32255844 ps | ||
| T302 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.3384276391 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 49127918 ps | ||
| T3785 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.3042979466 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:45 AM UTC 24 | 92360931 ps | ||
| T3786 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.1644889412 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 128256529 ps | ||
| T3787 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.816294286 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 64294130 ps | ||
| T3788 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.2021721835 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 80977436 ps | ||
| T3789 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.491365922 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 178773283 ps | ||
| T3790 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.870956471 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 60318532 ps | ||
| T3791 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.3502260548 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 222978017 ps | ||
| T3792 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1899786155 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 88920637 ps | ||
| T3793 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.3148688665 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 129991119 ps | ||
| T3794 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.3336378116 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 73354691 ps | ||
| T3795 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.742401652 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 205104695 ps | ||
| T3796 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1759901066 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:46 AM UTC 24 | 114460490 ps | ||
| T3797 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3655102171 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:47 AM UTC 24 | 219368469 ps | ||
| T3798 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.174054747 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:47 AM UTC 24 | 379263426 ps | ||
| T567 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2615658976 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:47 AM UTC 24 | 404426716 ps | ||
| T566 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.735841387 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:49 AM UTC 24 | 1080963812 ps | ||
| T559 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.2938106895 | Sep 11 08:38:23 AM UTC 24 | Sep 11 08:38:49 AM UTC 24 | 2035246960 ps | ||
| T298 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.1597188797 | Sep 11 08:38:44 AM UTC 24 | Sep 11 08:38:49 AM UTC 24 | 106181094 ps | ||
| T3799 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.752151538 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:11 AM UTC 24 | 33580734 ps | ||
| T3800 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.111281784 | Sep 11 08:38:44 AM UTC 24 | Sep 11 08:38:49 AM UTC 24 | 56766303 ps | ||
| T3801 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.1040777438 | Sep 11 08:38:44 AM UTC 24 | Sep 11 08:38:49 AM UTC 24 | 54420780 ps | ||
| T3802 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.812551909 | Sep 11 08:38:44 AM UTC 24 | Sep 11 08:38:49 AM UTC 24 | 77457576 ps | ||
| T3803 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.4020518306 | Sep 11 08:38:44 AM UTC 24 | Sep 11 08:38:49 AM UTC 24 | 35450473 ps | ||
| T3804 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.4223431358 | Sep 11 08:38:45 AM UTC 24 | Sep 11 08:38:49 AM UTC 24 | 52589339 ps | ||
| T3805 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.1802839013 | Sep 11 08:38:44 AM UTC 24 | Sep 11 08:38:49 AM UTC 24 | 114346662 ps | ||
| T3806 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1756006138 | Sep 11 08:38:45 AM UTC 24 | Sep 11 08:38:49 AM UTC 24 | 119874677 ps | ||
| T3807 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.3525670110 | Sep 11 08:38:45 AM UTC 24 | Sep 11 08:38:50 AM UTC 24 | 49632610 ps | ||
| T3808 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.88854692 | Sep 11 08:38:45 AM UTC 24 | Sep 11 08:38:50 AM UTC 24 | 35119208 ps | ||
| T3809 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.4081577359 | Sep 11 08:38:45 AM UTC 24 | Sep 11 08:38:50 AM UTC 24 | 40078262 ps | ||
| T3810 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.614282504 | Sep 11 08:38:45 AM UTC 24 | Sep 11 08:38:50 AM UTC 24 | 31002883 ps | ||
| T3811 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.2286186387 | Sep 11 08:38:45 AM UTC 24 | Sep 11 08:38:50 AM UTC 24 | 45990553 ps | ||
| T3812 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.3099950705 | Sep 11 08:38:45 AM UTC 24 | Sep 11 08:38:50 AM UTC 24 | 53916598 ps | ||
| T3813 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.1442020384 | Sep 11 08:38:44 AM UTC 24 | Sep 11 08:38:50 AM UTC 24 | 245626927 ps | ||
| T3814 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.565486072 | Sep 11 08:38:44 AM UTC 24 | Sep 11 08:38:50 AM UTC 24 | 169601218 ps | ||
| T560 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.2609326846 | Sep 11 08:38:44 AM UTC 24 | Sep 11 08:38:51 AM UTC 24 | 588017058 ps | ||
| T255 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2425842531 | Sep 11 08:38:29 AM UTC 24 | Sep 11 08:38:54 AM UTC 24 | 472572567 ps | ||
| T3815 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3730193499 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 44520754 ps | ||
| T3816 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.3041275308 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 53676680 ps | ||
| T3817 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.2075132569 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 36547225 ps | ||
| T3818 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1497399455 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 72966972 ps | ||
| T3819 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.636067139 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 44896408 ps | ||
| T3820 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1794031107 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 61571838 ps | ||
| T3821 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.465614358 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 42922163 ps | ||
| T3822 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3599166445 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 65044542 ps | ||
| T3823 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.3754849341 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 39991795 ps | ||
| T3824 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.3166597400 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 34816574 ps | ||
| T3825 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.3226771106 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 87671531 ps | ||
| T3826 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.2852205060 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:04 AM UTC 24 | 41338793 ps | ||
| T3827 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.1118682813 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:11 AM UTC 24 | 39510299 ps | ||
| T3828 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.23321043 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:11 AM UTC 24 | 36308774 ps | ||
| T3829 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.55960146 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:11 AM UTC 24 | 49642561 ps | ||
| T3830 | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.1247159279 | Sep 11 08:39:02 AM UTC 24 | Sep 11 08:39:11 AM UTC 24 | 52704956 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.3874915453 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 493528939 ps |
| CPU time | 2.39 seconds |
| Started | Sep 11 08:17:24 AM UTC 24 |
| Finished | Sep 11 08:17:27 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874915453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_data_toggle_clear.3874915453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.3984897757 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 719833990 ps |
| CPU time | 2.24 seconds |
| Started | Sep 11 08:17:27 AM UTC 24 |
| Finished | Sep 11 08:17:30 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3984897757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.3984897757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.2144901785 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 1109985982 ps |
| CPU time | 2.51 seconds |
| Started | Sep 11 08:17:25 AM UTC 24 |
| Finished | Sep 11 08:17:29 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2144901785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_disable_endpoint.2144901785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.2891612743 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 28655788646 ps |
| CPU time | 40.02 seconds |
| Started | Sep 11 08:17:24 AM UTC 24 |
| Finished | Sep 11 08:18:05 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2891612743 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.2891612743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.1689509230 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 45170658 ps |
| CPU time | 0.68 seconds |
| Started | Sep 11 08:38:03 AM UTC 24 |
| Finished | Sep 11 08:38:14 AM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689509230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.1689509230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.3679156574 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 2676305492 ps |
| CPU time | 23.89 seconds |
| Started | Sep 11 08:17:31 AM UTC 24 |
| Finished | Sep 11 08:17:56 AM UTC 24 |
| Peak memory | 234232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679156574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.3679156574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.3184401902 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 99293068 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:38:02 AM UTC 24 |
| Finished | Sep 11 08:38:05 AM UTC 24 |
| Peak memory | 226808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184401902 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.3184401902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.2373826704 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 5215439043 ps |
| CPU time | 38.29 seconds |
| Started | Sep 11 08:17:44 AM UTC 24 |
| Finished | Sep 11 08:18:24 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373826704 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.2373826704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.1878175566 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 7610370173 ps |
| CPU time | 12.94 seconds |
| Started | Sep 11 08:23:40 AM UTC 24 |
| Finished | Sep 11 08:23:54 AM UTC 24 |
| Peak memory | 227452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878175566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.1878175566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.1510238044 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 10721343639 ps |
| CPU time | 16.09 seconds |
| Started | Sep 11 08:17:22 AM UTC 24 |
| Finished | Sep 11 08:17:40 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1510238044 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.1510238044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.2327695372 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 43624934205 ps |
| CPU time | 101 seconds |
| Started | Sep 11 08:17:25 AM UTC 24 |
| Finished | Sep 11 08:19:08 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327695372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.2327695372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.903105015 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 373643805 ps |
| CPU time | 2.19 seconds |
| Started | Sep 11 08:17:44 AM UTC 24 |
| Finished | Sep 11 08:17:47 AM UTC 24 |
| Peak memory | 251536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903105015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.903105015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.1478135593 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 713076220 ps |
| CPU time | 3.23 seconds |
| Started | Sep 11 08:17:25 AM UTC 24 |
| Finished | Sep 11 08:17:29 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478135593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.1478135593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.1102950437 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 307577211 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:17:35 AM UTC 24 |
| Finished | Sep 11 08:17:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102950437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test _mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.1102950437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.2952915467 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 552351962 ps |
| CPU time | 2.52 seconds |
| Started | Sep 11 08:24:37 AM UTC 24 |
| Finished | Sep 11 08:24:41 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2952915467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_t x_rx_disruption.2952915467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.622171856 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 39209640 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:18:16 AM UTC 24 |
| Finished | Sep 11 08:18:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=622171856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_phy_pins_sense.622171856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.4017205296 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 75959167 ps |
| CPU time | 0.78 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:18 AM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4017205296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.4017205296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.3785157156 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 19373383732 ps |
| CPU time | 27.98 seconds |
| Started | Sep 11 08:22:26 AM UTC 24 |
| Finished | Sep 11 08:22:55 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785157156 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.3785157156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.2812728978 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 198240899 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:17:34 AM UTC 24 |
| Finished | Sep 11 08:17:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812728978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.2812728978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.3600610405 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 796891939 ps |
| CPU time | 4.23 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:18 AM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600610405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.3600610405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.801383290 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 462343170 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:35:50 AM UTC 24 |
| Finished | Sep 11 08:35:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=801383290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_t x_rx_disruption.801383290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.4043321305 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 3461918147 ps |
| CPU time | 8.06 seconds |
| Started | Sep 11 08:26:45 AM UTC 24 |
| Finished | Sep 11 08:26:54 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043321305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.4043321305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.1978063630 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 497090150 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:37:13 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1978063630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_ tx_rx_disruption.1978063630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.3691999277 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 540214527 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3691999277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.3691999277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.844719863 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 34864709437 ps |
| CPU time | 68.35 seconds |
| Started | Sep 11 08:21:50 AM UTC 24 |
| Finished | Sep 11 08:23:00 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=844719863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_device_address.844719863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.2193237437 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 129919275 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:38:05 AM UTC 24 |
| Finished | Sep 11 08:38:10 AM UTC 24 |
| Peak memory | 226760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2193237437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.2193237437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.222089450 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 413999859 ps |
| CPU time | 2.48 seconds |
| Started | Sep 11 08:17:40 AM UTC 24 |
| Finished | Sep 11 08:17:44 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=222089450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_setup_priority.222089450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.4196250727 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 244632332 ps |
| CPU time | 2.64 seconds |
| Started | Sep 11 08:38:02 AM UTC 24 |
| Finished | Sep 11 08:38:06 AM UTC 24 |
| Peak memory | 233784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4196250727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.4196250727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.3641972352 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 3747324257 ps |
| CPU time | 38.92 seconds |
| Started | Sep 11 08:17:31 AM UTC 24 |
| Finished | Sep 11 08:18:11 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641972352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.3641972352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.1282778971 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 911331820 ps |
| CPU time | 3.23 seconds |
| Started | Sep 11 08:27:01 AM UTC 24 |
| Finished | Sep 11 08:27:06 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282778971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.1282778971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.2963041242 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 441315145 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963041242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.2963041242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.2522592985 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 251667874 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:22:51 AM UTC 24 |
| Finished | Sep 11 08:22:54 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522592985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_rx_full.2522592985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.2614239796 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 593084193 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:36:41 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614239796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.2614239796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.301616175 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 674580629 ps |
| CPU time | 2.84 seconds |
| Started | Sep 11 08:28:25 AM UTC 24 |
| Finished | Sep 11 08:28:29 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=301616175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.301616175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.903824404 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 523149133 ps |
| CPU time | 1.95 seconds |
| Started | Sep 11 08:19:30 AM UTC 24 |
| Finished | Sep 11 08:19:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903824404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.903824404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.3897836499 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 707681574 ps |
| CPU time | 2.31 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:35 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897836499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.3897836499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.1592844972 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 173736921 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:17:24 AM UTC 24 |
| Finished | Sep 11 08:17:26 AM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1592844972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.1592844972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.3565999984 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 136888199 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:17:25 AM UTC 24 |
| Finished | Sep 11 08:17:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3565999984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_disconnected.3565999984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.2836566347 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 151708948 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:17:39 AM UTC 24 |
| Finished | Sep 11 08:17:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836566347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_crc_err.2836566347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.3806186847 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 3828986679 ps |
| CPU time | 35.08 seconds |
| Started | Sep 11 08:17:54 AM UTC 24 |
| Finished | Sep 11 08:18:30 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806186847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.3806186847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.534085081 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 487521704 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:36:06 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=534085081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.534085081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.4124835572 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 754429539 ps |
| CPU time | 2.61 seconds |
| Started | Sep 11 08:25:58 AM UTC 24 |
| Finished | Sep 11 08:26:01 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124835572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.4124835572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.1903862739 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 530511744 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:32 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1903862739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.1903862739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.3649234734 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 75400226 ps |
| CPU time | 0.74 seconds |
| Started | Sep 11 08:38:18 AM UTC 24 |
| Finished | Sep 11 08:38:20 AM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649234734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.3649234734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.3533192668 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 44257412565 ps |
| CPU time | 82.28 seconds |
| Started | Sep 11 08:26:22 AM UTC 24 |
| Finished | Sep 11 08:27:47 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533192668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.3533192668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.1684052069 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 507889299 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:36:37 AM UTC 24 |
| Finished | Sep 11 08:36:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684052069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.1684052069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.1913586584 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 397124583 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:35:35 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913586584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.1913586584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.2898119648 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 211752397 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:17:32 AM UTC 24 |
| Finished | Sep 11 08:17:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898119648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.2898119648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.1985470480 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 257703150 ps |
| CPU time | 1.85 seconds |
| Started | Sep 11 08:19:32 AM UTC 24 |
| Finished | Sep 11 08:19:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985470480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_fifo_levels.1985470480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.3183708630 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 474006900 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:17:28 AM UTC 24 |
| Finished | Sep 11 08:17:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183708630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.3183708630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.1980402787 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 513377773 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:35:58 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980402787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.1980402787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.3669262913 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 554448253 ps |
| CPU time | 2.81 seconds |
| Started | Sep 11 08:32:40 AM UTC 24 |
| Finished | Sep 11 08:32:44 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3669262913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.3669262913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.1756440508 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 475566229 ps |
| CPU time | 2.35 seconds |
| Started | Sep 11 08:18:32 AM UTC 24 |
| Finished | Sep 11 08:18:36 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1756440508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.1756440508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.941796489 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 12588392464 ps |
| CPU time | 244.6 seconds |
| Started | Sep 11 08:18:32 AM UTC 24 |
| Finished | Sep 11 08:22:41 AM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=941796489 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_1 0/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.941796489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.162402348 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 31685064 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:17:44 AM UTC 24 |
| Finished | Sep 11 08:17:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=162402348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.162402348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.3327440680 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 582255451 ps |
| CPU time | 2.15 seconds |
| Started | Sep 11 08:20:23 AM UTC 24 |
| Finished | Sep 11 08:20:26 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3327440680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.3327440680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3032218873 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 424959396 ps |
| CPU time | 2.42 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:19 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032218873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.3032218873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.2961957910 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 182938315 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:17:36 AM UTC 24 |
| Finished | Sep 11 08:17:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961957910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.2961957910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.3079739254 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 499106614 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:35:47 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3079739254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.3079739254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.2458763367 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 434014390 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:35:50 AM UTC 24 |
| Finished | Sep 11 08:35:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2458763367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.2458763367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.854962658 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 749825985 ps |
| CPU time | 1.82 seconds |
| Started | Sep 11 08:35:50 AM UTC 24 |
| Finished | Sep 11 08:35:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=854962658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.854962658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.2556079643 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 569477423 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:35:56 AM UTC 24 |
| Finished | Sep 11 08:36:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556079643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.2556079643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.1769974768 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 715150656 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769974768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.1769974768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.4024584164 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 444331230 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:36:10 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024584164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.4024584164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.171910539 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 667466184 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=171910539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.171910539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.911382050 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 22905473434 ps |
| CPU time | 41.76 seconds |
| Started | Sep 11 08:25:39 AM UTC 24 |
| Finished | Sep 11 08:26:23 AM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911382050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_device_address.911382050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.4175548769 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 1257161291 ps |
| CPU time | 3.75 seconds |
| Started | Sep 11 08:27:18 AM UTC 24 |
| Finished | Sep 11 08:27:22 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175548769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.4175548769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.2619903686 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 545554205 ps |
| CPU time | 2.18 seconds |
| Started | Sep 11 08:33:26 AM UTC 24 |
| Finished | Sep 11 08:33:29 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2619903686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.2619903686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.589367658 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 650544005 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=589367658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.589367658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.1004613004 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 4283498779 ps |
| CPU time | 36.72 seconds |
| Started | Sep 11 08:23:18 AM UTC 24 |
| Finished | Sep 11 08:23:56 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004613004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.1004613004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.4272267332 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 141484027 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:17:24 AM UTC 24 |
| Finished | Sep 11 08:17:26 AM UTC 24 |
| Peak memory | 216424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272267332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.4272267332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.1269882339 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 1055005121 ps |
| CPU time | 4.46 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:22 AM UTC 24 |
| Peak memory | 217504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1269882339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.1269882339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2830942445 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 5104817630 ps |
| CPU time | 147.45 seconds |
| Started | Sep 11 08:17:26 AM UTC 24 |
| Finished | Sep 11 08:19:57 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2830942445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.2830942445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.3437418552 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 171701211 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:17:32 AM UTC 24 |
| Finished | Sep 11 08:17:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3437418552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_out_stall.3437418552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.3617330796 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 21566451307 ps |
| CPU time | 45.42 seconds |
| Started | Sep 11 08:23:55 AM UTC 24 |
| Finished | Sep 11 08:24:42 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617330796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.3617330796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.4169141583 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 393063706 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:35:47 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169141583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.4169141583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.2036651540 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 387977329 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:35:52 AM UTC 24 |
| Finished | Sep 11 08:35:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2036651540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.2036651540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.2462894448 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 429824728 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:35:56 AM UTC 24 |
| Finished | Sep 11 08:36:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2462894448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.2462894448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.3032834964 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 359419615 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:36:46 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032834964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.3032834964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.3846139750 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 354932914 ps |
| CPU time | 2.11 seconds |
| Started | Sep 11 08:32:21 AM UTC 24 |
| Finished | Sep 11 08:32:24 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846139750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.3846139750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.2096798981 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 232894962 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:34:32 AM UTC 24 |
| Finished | Sep 11 08:34:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096798981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.2096798981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.3445290986 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 382664935 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445290986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.3445290986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.3268216197 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 164235905 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:17:51 AM UTC 24 |
| Finished | Sep 11 08:17:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3268216197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_fifo_levels.3268216197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.3897931032 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 296285518 ps |
| CPU time | 2 seconds |
| Started | Sep 11 08:25:00 AM UTC 24 |
| Finished | Sep 11 08:25:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897931032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_fifo_levels.3897931032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.3111959028 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 4166857150 ps |
| CPU time | 32.17 seconds |
| Started | Sep 11 08:18:28 AM UTC 24 |
| Finished | Sep 11 08:19:02 AM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3111959028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.3111959028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.629852507 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 161271085 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:38:03 AM UTC 24 |
| Finished | Sep 11 08:38:15 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=629852507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.629852507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.1751427294 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 733005139 ps |
| CPU time | 2.56 seconds |
| Started | Sep 11 08:38:07 AM UTC 24 |
| Finished | Sep 11 08:38:11 AM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751427294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.1751427294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.2902329166 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 535997577 ps |
| CPU time | 3.55 seconds |
| Started | Sep 11 08:38:18 AM UTC 24 |
| Finished | Sep 11 08:38:23 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902329166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.2902329166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.2820974690 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 205404937 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:17:40 AM UTC 24 |
| Finished | Sep 11 08:17:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820974690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_setup_trans_ignored.2820974690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.3595962023 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 245269980 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:17:41 AM UTC 24 |
| Finished | Sep 11 08:17:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595962023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.3595962023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2378342030 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 3302085228 ps |
| CPU time | 109.96 seconds |
| Started | Sep 11 08:18:00 AM UTC 24 |
| Finished | Sep 11 08:19:52 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378342030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.2378342030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.4060467326 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 154796278 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:24:00 AM UTC 24 |
| Finished | Sep 11 08:24:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060467326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_fifo_levels.4060467326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.2127059666 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 258792854 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:35:44 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2127059666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 100.usbdev_fifo_levels.2127059666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.3676653906 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 241633194 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676653906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 103.usbdev_fifo_levels.3676653906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.3582986549 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 266687365 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582986549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 104.usbdev_fifo_levels.3582986549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.3537014350 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 261381093 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537014350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 105.usbdev_fifo_levels.3537014350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.1773661107 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 353455674 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:35:48 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773661107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 108.usbdev_fifo_levels.1773661107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.2393329593 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 377527717 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:35:48 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393329593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.2393329593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.1635330686 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 259030749 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:35:48 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1635330686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 109.usbdev_fifo_levels.1635330686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.1907551840 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 292232851 ps |
| CPU time | 1.2 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907551840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 110.usbdev_fifo_levels.1907551840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/110.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.1626944774 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 415176062 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:04 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626944774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.1626944774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.3965801352 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 159976234 ps |
| CPU time | 0.86 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3965801352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.3965801352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.2838082806 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 282190985 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838082806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 112.usbdev_fifo_levels.2838082806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.1376695153 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 173268815 ps |
| CPU time | 0.94 seconds |
| Started | Sep 11 08:35:50 AM UTC 24 |
| Finished | Sep 11 08:35:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376695153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 114.usbdev_fifo_levels.1376695153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.794703279 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 268924526 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:35:50 AM UTC 24 |
| Finished | Sep 11 08:35:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=794703279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 115.usbdev_fifo_levels.794703279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/115.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.2031713925 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 185078618 ps |
| CPU time | 0.88 seconds |
| Started | Sep 11 08:35:52 AM UTC 24 |
| Finished | Sep 11 08:35:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031713925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 116.usbdev_fifo_levels.2031713925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.3968404914 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 248700060 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:35:52 AM UTC 24 |
| Finished | Sep 11 08:35:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968404914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 118.usbdev_fifo_levels.3968404914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.1051464065 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 291756767 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:35:54 AM UTC 24 |
| Finished | Sep 11 08:36:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051464065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 119.usbdev_fifo_levels.1051464065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.4105963385 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 239439116 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:35:56 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105963385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 120.usbdev_fifo_levels.4105963385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/120.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.963463203 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 266560628 ps |
| CPU time | 1 seconds |
| Started | Sep 11 08:35:58 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=963463203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 125.usbdev_fifo_levels.963463203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.393943603 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 283763606 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:36:00 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=393943603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 126.usbdev_fifo_levels.393943603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.3647904028 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 277954901 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3647904028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.3647904028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.2703877744 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 293091454 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:36:05 AM UTC 24 |
| Finished | Sep 11 08:36:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2703877744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.2703877744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.977870496 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 299349702 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:36:05 AM UTC 24 |
| Finished | Sep 11 08:36:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=977870496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 133.usbdev_fifo_levels.977870496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.3674788853 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 296418694 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:36:06 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674788853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 135.usbdev_fifo_levels.3674788853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/135.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.2198314899 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 181980618 ps |
| CPU time | 0.81 seconds |
| Started | Sep 11 08:36:11 AM UTC 24 |
| Finished | Sep 11 08:36:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198314899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 137.usbdev_fifo_levels.2198314899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.620992557 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 297935116 ps |
| CPU time | 1.8 seconds |
| Started | Sep 11 08:25:21 AM UTC 24 |
| Finished | Sep 11 08:25:24 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=620992557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_fifo_levels.620992557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.3664676269 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 248643266 ps |
| CPU time | 0.91 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664676269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 141.usbdev_fifo_levels.3664676269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.3051006280 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 291119879 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051006280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 143.usbdev_fifo_levels.3051006280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/143.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.2877682863 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 547637636 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2877682863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.2877682863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.1598032679 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 582336962 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:36:15 AM UTC 24 |
| Finished | Sep 11 08:36:25 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598032679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.1598032679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/155.usbdev_fifo_levels.245465481 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 285933015 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=245465481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 155.usbdev_fifo_levels.245465481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/155.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.445498779 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 380770066 ps |
| CPU time | 1.94 seconds |
| Started | Sep 11 08:26:25 AM UTC 24 |
| Finished | Sep 11 08:26:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=445498779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.445498779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.259942110 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 253458553 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:27:21 AM UTC 24 |
| Finished | Sep 11 08:27:23 AM UTC 24 |
| Peak memory | 214784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259942110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_fifo_levels.259942110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.489016174 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 937404252 ps |
| CPU time | 3.12 seconds |
| Started | Sep 11 08:27:53 AM UTC 24 |
| Finished | Sep 11 08:27:57 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=489016174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.489016174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.3307540823 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 158239524 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:29:34 AM UTC 24 |
| Finished | Sep 11 08:29:37 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307540823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_fifo_levels.3307540823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.3395562635 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 104136992671 ps |
| CPU time | 188.98 seconds |
| Started | Sep 11 08:19:36 AM UTC 24 |
| Finished | Sep 11 08:22:48 AM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395562635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.3395562635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.1445867909 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 184245674 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:30:40 AM UTC 24 |
| Finished | Sep 11 08:30:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445867909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_fifo_levels.1445867909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.2443250468 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 267974968 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:31:09 AM UTC 24 |
| Finished | Sep 11 08:31:11 AM UTC 24 |
| Peak memory | 214712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2443250468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_fifo_levels.2443250468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.2806700928 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 298673652 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:32:07 AM UTC 24 |
| Finished | Sep 11 08:32:09 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2806700928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_fifo_levels.2806700928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.1772839989 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 90995382526 ps |
| CPU time | 161.71 seconds |
| Started | Sep 11 08:20:26 AM UTC 24 |
| Finished | Sep 11 08:23:11 AM UTC 24 |
| Peak memory | 217404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1772839989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_loclk_max.1772839989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.3007082341 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 273276163 ps |
| CPU time | 1.98 seconds |
| Started | Sep 11 08:33:42 AM UTC 24 |
| Finished | Sep 11 08:33:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007082341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_fifo_levels.3007082341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.2183832874 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 293749583 ps |
| CPU time | 1.92 seconds |
| Started | Sep 11 08:33:58 AM UTC 24 |
| Finished | Sep 11 08:34:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183832874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_fifo_levels.2183832874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.3264650419 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 315611498 ps |
| CPU time | 1.96 seconds |
| Started | Sep 11 08:34:50 AM UTC 24 |
| Finished | Sep 11 08:34:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3264650419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.3264650419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.1420197554 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 274195142 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:34 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1420197554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 71.usbdev_fifo_levels.1420197554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.3873051923 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 268034107 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:35:35 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873051923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 78.usbdev_fifo_levels.3873051923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.206414051 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 164899264 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:17:36 AM UTC 24 |
| Finished | Sep 11 08:17:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=206414051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.206414051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.2841526744 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 11195487662 ps |
| CPU time | 16.99 seconds |
| Started | Sep 11 08:25:56 AM UTC 24 |
| Finished | Sep 11 08:26:14 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841526744 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.2841526744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.3374645452 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 95367363 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:17:36 AM UTC 24 |
| Finished | Sep 11 08:17:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3374645452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.3374645452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.3036332511 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 167452883 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:17:46 AM UTC 24 |
| Finished | Sep 11 08:17:48 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036332511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.3036332511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.564493173 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 152822856 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:17:24 AM UTC 24 |
| Finished | Sep 11 08:17:26 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=564493173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_av_empty.564493173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.3352544962 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 4154671506 ps |
| CPU time | 11.69 seconds |
| Started | Sep 11 08:17:28 AM UTC 24 |
| Finished | Sep 11 08:17:41 AM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3352544962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.3352544962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.1624113306 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 176216507 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:17:29 AM UTC 24 |
| Finished | Sep 11 08:17:32 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624113306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_reset.1624113306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.3176542172 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 201326733 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:17:39 AM UTC 24 |
| Finished | Sep 11 08:17:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3176542172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_pid_err.3176542172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.3906995744 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 236351576 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:17:46 AM UTC 24 |
| Finished | Sep 11 08:17:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906995744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.3906995744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.2515167375 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 12095604402 ps |
| CPU time | 99.3 seconds |
| Started | Sep 11 08:17:58 AM UTC 24 |
| Finished | Sep 11 08:19:39 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515167375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.2515167375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2425842531 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 472572567 ps |
| CPU time | 3.39 seconds |
| Started | Sep 11 08:38:29 AM UTC 24 |
| Finished | Sep 11 08:38:54 AM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425842531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.2425842531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.3002489861 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 172581734 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:18:11 AM UTC 24 |
| Finished | Sep 11 08:18:13 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002489861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.3002489861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.1471472958 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 199191968 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:25:28 AM UTC 24 |
| Finished | Sep 11 08:25:30 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471472958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_nak_trans.1471472958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.2365273914 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 228756249 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:26:30 AM UTC 24 |
| Finished | Sep 11 08:26:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365273914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.2365273914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.673557475 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 185258516 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:26:50 AM UTC 24 |
| Finished | Sep 11 08:26:52 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=673557475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_nak_trans.673557475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.694914114 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 228668293 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:27:08 AM UTC 24 |
| Finished | Sep 11 08:27:11 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=694914114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_nak_trans.694914114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.1741856594 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 212667224 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:18:58 AM UTC 24 |
| Finished | Sep 11 08:19:01 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741856594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.1741856594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.4156140910 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 8946374476 ps |
| CPU time | 152.67 seconds |
| Started | Sep 11 08:19:16 AM UTC 24 |
| Finished | Sep 11 08:21:52 AM UTC 24 |
| Peak memory | 227588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156140910 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.4156140910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.1022467038 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 199116172 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:28:15 AM UTC 24 |
| Finished | Sep 11 08:28:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022467038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_nak_trans.1022467038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.74545431 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 621833705 ps |
| CPU time | 2.41 seconds |
| Started | Sep 11 08:28:22 AM UTC 24 |
| Finished | Sep 11 08:28:25 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=74545431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_tx_ rx_disruption.74545431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.2554818286 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 264197443 ps |
| CPU time | 1.8 seconds |
| Started | Sep 11 08:29:09 AM UTC 24 |
| Finished | Sep 11 08:29:12 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554818286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.2554818286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.4245047275 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 214643948 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:30:10 AM UTC 24 |
| Finished | Sep 11 08:30:12 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245047275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.4245047275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.84327295 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 219143342 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:22:44 AM UTC 24 |
| Finished | Sep 11 08:22:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84327295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_nak_trans.84327295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.412414161 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 461756401 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:43 AM UTC 24 |
| Peak memory | 214928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=412414161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.412414161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.210663493 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 116624454 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:38:02 AM UTC 24 |
| Finished | Sep 11 08:38:15 AM UTC 24 |
| Peak memory | 216868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=210663493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.210663493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.4255659914 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 294275049 ps |
| CPU time | 3.7 seconds |
| Started | Sep 11 08:38:02 AM UTC 24 |
| Finished | Sep 11 08:38:17 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4255659914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.4255659914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.1720082310 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 76960645 ps |
| CPU time | 0.69 seconds |
| Started | Sep 11 08:37:55 AM UTC 24 |
| Finished | Sep 11 08:38:00 AM UTC 24 |
| Peak memory | 216696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1720082310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.1720082310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.1982690525 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 53327581 ps |
| CPU time | 0.73 seconds |
| Started | Sep 11 08:38:00 AM UTC 24 |
| Finished | Sep 11 08:38:09 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1982690525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.1982690525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.1985077136 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 61619496 ps |
| CPU time | 0.65 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:14 AM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985077136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.1985077136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.61999198 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 184308243 ps |
| CPU time | 1.99 seconds |
| Started | Sep 11 08:37:53 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=61999198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs /coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.61999198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.1064674644 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 258086110 ps |
| CPU time | 2.28 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064674644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.1064674644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.727639798 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 134361468 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:38:02 AM UTC 24 |
| Finished | Sep 11 08:38:05 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=727639798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.727639798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.463704942 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 97319051 ps |
| CPU time | 2.5 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=463704942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.463704942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.2006738948 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 198412307 ps |
| CPU time | 1.9 seconds |
| Started | Sep 11 08:38:03 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2006738948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.2006738948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2153127458 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 1446033759 ps |
| CPU time | 6.9 seconds |
| Started | Sep 11 08:38:03 AM UTC 24 |
| Finished | Sep 11 08:38:21 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2153127458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.2153127458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.3797360612 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 180245050 ps |
| CPU time | 0.83 seconds |
| Started | Sep 11 08:38:02 AM UTC 24 |
| Finished | Sep 11 08:38:04 AM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3797360612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.3797360612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.253973318 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 81082822 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:38:03 AM UTC 24 |
| Finished | Sep 11 08:38:15 AM UTC 24 |
| Peak memory | 228852 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=253973318 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.253973318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.1958699883 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 63489608 ps |
| CPU time | 0.81 seconds |
| Started | Sep 11 08:38:03 AM UTC 24 |
| Finished | Sep 11 08:38:14 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1958699883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.1958699883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.1818575311 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 40505613 ps |
| CPU time | 0.68 seconds |
| Started | Sep 11 08:38:02 AM UTC 24 |
| Finished | Sep 11 08:38:04 AM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818575311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.1818575311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.155661737 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 171002401 ps |
| CPU time | 2.34 seconds |
| Started | Sep 11 08:38:02 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 227768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=155661737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.155661737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.2754370395 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 711375572 ps |
| CPU time | 4.51 seconds |
| Started | Sep 11 08:38:02 AM UTC 24 |
| Finished | Sep 11 08:38:18 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754370395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.2754370395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.4097103165 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 72773484 ps |
| CPU time | 1.02 seconds |
| Started | Sep 11 08:38:03 AM UTC 24 |
| Finished | Sep 11 08:38:15 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097103165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.4097103165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.1802731839 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 622931775 ps |
| CPU time | 2.6 seconds |
| Started | Sep 11 08:38:02 AM UTC 24 |
| Finished | Sep 11 08:38:06 AM UTC 24 |
| Peak memory | 217632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802731839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.1802731839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.2708956082 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 49958375 ps |
| CPU time | 0.72 seconds |
| Started | Sep 11 08:38:19 AM UTC 24 |
| Finished | Sep 11 08:38:34 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2708956082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.2708956082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.1591465356 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 57929453 ps |
| CPU time | 0.68 seconds |
| Started | Sep 11 08:38:19 AM UTC 24 |
| Finished | Sep 11 08:38:24 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591465356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.1591465356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.968969995 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 166534800 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:38:19 AM UTC 24 |
| Finished | Sep 11 08:38:34 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=968969995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.968969995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.197116052 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 65003663 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:38:19 AM UTC 24 |
| Finished | Sep 11 08:38:34 AM UTC 24 |
| Peak memory | 216716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=197116052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.197116052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.2952465406 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 1171377955 ps |
| CPU time | 4.47 seconds |
| Started | Sep 11 08:38:19 AM UTC 24 |
| Finished | Sep 11 08:38:28 AM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952465406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.2952465406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.1392267394 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 99534273 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 226872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1392267394 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.1392267394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2416374460 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 52142830 ps |
| CPU time | 0.84 seconds |
| Started | Sep 11 08:38:22 AM UTC 24 |
| Finished | Sep 11 08:38:34 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416374460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.2416374460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.1685257003 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 33558283 ps |
| CPU time | 0.64 seconds |
| Started | Sep 11 08:38:22 AM UTC 24 |
| Finished | Sep 11 08:38:44 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685257003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.1685257003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2470983442 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 178986187 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:38:22 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470983442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.2470983442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.816294286 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 64294130 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 226944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816294286 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.816294286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.3328738912 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 40180547 ps |
| CPU time | 0.76 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3328738912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.3328738912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.4141818594 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 36369177 ps |
| CPU time | 0.68 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4141818594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.4141818594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2022875809 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 117593945 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2022875809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.2022875809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1899786155 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 88920637 ps |
| CPU time | 2.36 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 228056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1899786155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.1899786155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.2938106895 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 2035246960 ps |
| CPU time | 5.07 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:49 AM UTC 24 |
| Peak memory | 217400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938106895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.2938106895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1759901066 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 114460490 ps |
| CPU time | 2.36 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 227720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759901066 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.1759901066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.2070710229 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 59200648 ps |
| CPU time | 0.95 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2070710229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.2070710229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3082302185 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 38777800 ps |
| CPU time | 0.63 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082302185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.3082302185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.491365922 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 178773283 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=491365922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.491365922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.742401652 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 205104695 ps |
| CPU time | 2.23 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 217592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=742401652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.742401652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.3502260548 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 222978017 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 226884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502260548 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.3502260548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2244199330 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 68037470 ps |
| CPU time | 0.9 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2244199330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.2244199330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3367989844 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 73662129 ps |
| CPU time | 0.72 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367989844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.3367989844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.1644889412 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 128256529 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644889412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.1644889412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3655102171 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 219368469 ps |
| CPU time | 2.25 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:47 AM UTC 24 |
| Peak memory | 234412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3655102171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.3655102171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.735841387 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 1080963812 ps |
| CPU time | 4.66 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:49 AM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=735841387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.735841387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.870956471 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 60318532 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 226880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=870956471 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.870956471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.3042979466 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 92360931 ps |
| CPU time | 0.78 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042979466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.3042979466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.3384276391 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 49127918 ps |
| CPU time | 0.71 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:45 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3384276391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.3384276391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.3148688665 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 129991119 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148688665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.3148688665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.2021721835 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 80977436 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021721835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.2021721835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.174054747 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 379263426 ps |
| CPU time | 2.17 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:47 AM UTC 24 |
| Peak memory | 217412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=174054747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.174054747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.2701484547 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 153815011 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:40 AM UTC 24 |
| Peak memory | 226872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701484547 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.2701484547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.2973674264 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 66777792 ps |
| CPU time | 0.73 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:40 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973674264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.2973674264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.1990044316 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 55809508 ps |
| CPU time | 0.68 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:39 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1990044316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.1990044316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.2445353795 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 253640317 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:40 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2445353795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.2445353795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.3336378116 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 73354691 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:46 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336378116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.3336378116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2615658976 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 404426716 ps |
| CPU time | 2.3 seconds |
| Started | Sep 11 08:38:23 AM UTC 24 |
| Finished | Sep 11 08:38:47 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2615658976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.2615658976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.2736830955 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 89474576 ps |
| CPU time | 2.13 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:41 AM UTC 24 |
| Peak memory | 227928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2736830955 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.2736830955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.1349327140 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 99424366 ps |
| CPU time | 0.89 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:40 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1349327140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.1349327140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.872081836 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 55618672 ps |
| CPU time | 0.67 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:40 AM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=872081836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.872081836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1700814487 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 99528064 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:40 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700814487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.1700814487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.2256739956 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 166566614 ps |
| CPU time | 1.84 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:41 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256739956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.2256739956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2341484138 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 1372563948 ps |
| CPU time | 4.43 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:44 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341484138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.2341484138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3028608725 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 165051874 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:38:35 AM UTC 24 |
| Finished | Sep 11 08:38:41 AM UTC 24 |
| Peak memory | 226872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3028608725 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.3028608725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.1922689021 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 49731310 ps |
| CPU time | 0.75 seconds |
| Started | Sep 11 08:38:35 AM UTC 24 |
| Finished | Sep 11 08:38:40 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922689021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.1922689021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.644135287 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 81237407 ps |
| CPU time | 0.66 seconds |
| Started | Sep 11 08:38:30 AM UTC 24 |
| Finished | Sep 11 08:38:39 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=644135287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.644135287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.2670646713 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 125757517 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:38:35 AM UTC 24 |
| Finished | Sep 11 08:38:41 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670646713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.2670646713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.2981738559 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 113729165 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:38:27 AM UTC 24 |
| Finished | Sep 11 08:38:41 AM UTC 24 |
| Peak memory | 230992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981738559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.2981738559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.565486072 |
| Short name | T3814 |
| Test name | |
| Test status | |
| Simulation time | 169601218 ps |
| CPU time | 1.8 seconds |
| Started | Sep 11 08:38:44 AM UTC 24 |
| Finished | Sep 11 08:38:50 AM UTC 24 |
| Peak memory | 226804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=565486072 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.565486072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.1802839013 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 114346662 ps |
| CPU time | 0.92 seconds |
| Started | Sep 11 08:38:44 AM UTC 24 |
| Finished | Sep 11 08:38:49 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802839013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.1802839013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.1597188797 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 106181094 ps |
| CPU time | 0.78 seconds |
| Started | Sep 11 08:38:44 AM UTC 24 |
| Finished | Sep 11 08:38:49 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597188797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.1597188797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.1442020384 |
| Short name | T3813 |
| Test name | |
| Test status | |
| Simulation time | 245626927 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:38:44 AM UTC 24 |
| Finished | Sep 11 08:38:50 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442020384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.1442020384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2001394017 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 264402597 ps |
| CPU time | 2.6 seconds |
| Started | Sep 11 08:38:36 AM UTC 24 |
| Finished | Sep 11 08:38:41 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2001394017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.2001394017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.2609326846 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 588017058 ps |
| CPU time | 2.55 seconds |
| Started | Sep 11 08:38:44 AM UTC 24 |
| Finished | Sep 11 08:38:51 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609326846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.2609326846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.3694263685 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 212035668 ps |
| CPU time | 1.89 seconds |
| Started | Sep 11 08:38:06 AM UTC 24 |
| Finished | Sep 11 08:38:12 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694263685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.3694263685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.1049179921 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 649320756 ps |
| CPU time | 3.67 seconds |
| Started | Sep 11 08:38:06 AM UTC 24 |
| Finished | Sep 11 08:38:14 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1049179921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.1049179921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.3934764638 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 92862056 ps |
| CPU time | 0.73 seconds |
| Started | Sep 11 08:38:05 AM UTC 24 |
| Finished | Sep 11 08:38:10 AM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3934764638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.3934764638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.1010098002 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 122250350 ps |
| CPU time | 2.1 seconds |
| Started | Sep 11 08:38:06 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 227784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010098002 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.1010098002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.676054589 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 65766815 ps |
| CPU time | 0.69 seconds |
| Started | Sep 11 08:38:05 AM UTC 24 |
| Finished | Sep 11 08:38:10 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=676054589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.676054589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.1020937015 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 292622909 ps |
| CPU time | 2.51 seconds |
| Started | Sep 11 08:38:04 AM UTC 24 |
| Finished | Sep 11 08:38:17 AM UTC 24 |
| Peak memory | 217468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020937015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.1020937015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.2292326691 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 121956537 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:38:06 AM UTC 24 |
| Finished | Sep 11 08:38:15 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292326691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.2292326691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.3884121192 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 694590814 ps |
| CPU time | 2.65 seconds |
| Started | Sep 11 08:38:03 AM UTC 24 |
| Finished | Sep 11 08:38:17 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884121192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.3884121192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.812551909 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 77457576 ps |
| CPU time | 0.69 seconds |
| Started | Sep 11 08:38:44 AM UTC 24 |
| Finished | Sep 11 08:38:49 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=812551909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.812551909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.111281784 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 56766303 ps |
| CPU time | 0.72 seconds |
| Started | Sep 11 08:38:44 AM UTC 24 |
| Finished | Sep 11 08:38:49 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=111281784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.111281784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.4020518306 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 35450473 ps |
| CPU time | 0.67 seconds |
| Started | Sep 11 08:38:44 AM UTC 24 |
| Finished | Sep 11 08:38:49 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020518306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.4020518306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.1040777438 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 54420780 ps |
| CPU time | 0.66 seconds |
| Started | Sep 11 08:38:44 AM UTC 24 |
| Finished | Sep 11 08:38:49 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040777438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.1040777438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.88854692 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 35119208 ps |
| CPU time | 0.71 seconds |
| Started | Sep 11 08:38:45 AM UTC 24 |
| Finished | Sep 11 08:38:50 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=88854692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.88854692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.3525670110 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 49632610 ps |
| CPU time | 0.69 seconds |
| Started | Sep 11 08:38:45 AM UTC 24 |
| Finished | Sep 11 08:38:50 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525670110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.3525670110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.614282504 |
| Short name | T3810 |
| Test name | |
| Test status | |
| Simulation time | 31002883 ps |
| CPU time | 0.63 seconds |
| Started | Sep 11 08:38:45 AM UTC 24 |
| Finished | Sep 11 08:38:50 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=614282504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.614282504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.4223431358 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 52589339 ps |
| CPU time | 0.77 seconds |
| Started | Sep 11 08:38:45 AM UTC 24 |
| Finished | Sep 11 08:38:49 AM UTC 24 |
| Peak memory | 216640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223431358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.4223431358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.2286186387 |
| Short name | T3811 |
| Test name | |
| Test status | |
| Simulation time | 45990553 ps |
| CPU time | 0.69 seconds |
| Started | Sep 11 08:38:45 AM UTC 24 |
| Finished | Sep 11 08:38:50 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286186387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.2286186387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1756006138 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 119874677 ps |
| CPU time | 0.8 seconds |
| Started | Sep 11 08:38:45 AM UTC 24 |
| Finished | Sep 11 08:38:49 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1756006138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.1756006138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.4263945647 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 173841803 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:38:13 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4263945647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.4263945647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.3606941604 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 503313597 ps |
| CPU time | 3.84 seconds |
| Started | Sep 11 08:38:12 AM UTC 24 |
| Finished | Sep 11 08:38:18 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3606941604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.3606941604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.1105955556 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 146831244 ps |
| CPU time | 0.96 seconds |
| Started | Sep 11 08:38:11 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105955556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.1105955556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.2360439673 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 80072433 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:19 AM UTC 24 |
| Peak memory | 226808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360439673 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.2360439673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.859367743 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 44338338 ps |
| CPU time | 0.71 seconds |
| Started | Sep 11 08:38:12 AM UTC 24 |
| Finished | Sep 11 08:38:15 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=859367743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.859367743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.1581206149 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 73308745 ps |
| CPU time | 0.87 seconds |
| Started | Sep 11 08:38:11 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 216760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581206149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.1581206149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.2962678294 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 66105160 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:38:11 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 226840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2962678294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.2962678294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.34930037 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 713069514 ps |
| CPU time | 4.27 seconds |
| Started | Sep 11 08:38:11 AM UTC 24 |
| Finished | Sep 11 08:38:19 AM UTC 24 |
| Peak memory | 217340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=34930037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/ cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.34930037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.4087781703 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 121151179 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:18 AM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4087781703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.4087781703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.3882486139 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 153678231 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:38:07 AM UTC 24 |
| Finished | Sep 11 08:38:10 AM UTC 24 |
| Peak memory | 233728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3882486139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.3882486139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.4081577359 |
| Short name | T3809 |
| Test name | |
| Test status | |
| Simulation time | 40078262 ps |
| CPU time | 0.71 seconds |
| Started | Sep 11 08:38:45 AM UTC 24 |
| Finished | Sep 11 08:38:50 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081577359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.4081577359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.3099950705 |
| Short name | T3812 |
| Test name | |
| Test status | |
| Simulation time | 53916598 ps |
| CPU time | 0.73 seconds |
| Started | Sep 11 08:38:45 AM UTC 24 |
| Finished | Sep 11 08:38:50 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3099950705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.3099950705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3730193499 |
| Short name | T3815 |
| Test name | |
| Test status | |
| Simulation time | 44520754 ps |
| CPU time | 0.65 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3730193499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.3730193499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.3041275308 |
| Short name | T3816 |
| Test name | |
| Test status | |
| Simulation time | 53676680 ps |
| CPU time | 0.68 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3041275308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.3041275308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1497399455 |
| Short name | T3818 |
| Test name | |
| Test status | |
| Simulation time | 72966972 ps |
| CPU time | 0.7 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497399455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.1497399455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.636067139 |
| Short name | T3819 |
| Test name | |
| Test status | |
| Simulation time | 44896408 ps |
| CPU time | 0.68 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=636067139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.636067139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.2075132569 |
| Short name | T3817 |
| Test name | |
| Test status | |
| Simulation time | 36547225 ps |
| CPU time | 0.66 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075132569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.2075132569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.3754849341 |
| Short name | T3823 |
| Test name | |
| Test status | |
| Simulation time | 39991795 ps |
| CPU time | 0.73 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3754849341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.3754849341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1794031107 |
| Short name | T3820 |
| Test name | |
| Test status | |
| Simulation time | 61571838 ps |
| CPU time | 0.66 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1794031107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.1794031107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.465614358 |
| Short name | T3821 |
| Test name | |
| Test status | |
| Simulation time | 42922163 ps |
| CPU time | 0.65 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=465614358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.465614358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.2421337851 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 161006882 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:19 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421337851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.2421337851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.648953001 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 529846909 ps |
| CPU time | 3.5 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:21 AM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=648953001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.648953001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.1034692001 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 68427020 ps |
| CPU time | 0.87 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:18 AM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1034692001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.1034692001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.2594764387 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 88048121 ps |
| CPU time | 2.01 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:19 AM UTC 24 |
| Peak memory | 227844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594764387 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.2594764387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.1514515426 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 58552727 ps |
| CPU time | 0.9 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:18 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514515426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.1514515426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.839674160 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 31466165 ps |
| CPU time | 0.73 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:17 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=839674160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.839674160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.544662463 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 73151240 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:18 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=544662463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.544662463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.4088068472 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 475807570 ps |
| CPU time | 3.92 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:21 AM UTC 24 |
| Peak memory | 217340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4088068472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.4088068472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.1274909587 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 214673186 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:18 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274909587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.1274909587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.3748288712 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 138360776 ps |
| CPU time | 2.87 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:20 AM UTC 24 |
| Peak memory | 234592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748288712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.3748288712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.3226771106 |
| Short name | T3825 |
| Test name | |
| Test status | |
| Simulation time | 87671531 ps |
| CPU time | 0.72 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226771106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.3226771106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3599166445 |
| Short name | T3822 |
| Test name | |
| Test status | |
| Simulation time | 65044542 ps |
| CPU time | 0.68 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599166445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.3599166445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.3166597400 |
| Short name | T3824 |
| Test name | |
| Test status | |
| Simulation time | 34816574 ps |
| CPU time | 0.65 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166597400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.3166597400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.2852205060 |
| Short name | T3826 |
| Test name | |
| Test status | |
| Simulation time | 41338793 ps |
| CPU time | 0.67 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:04 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852205060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.2852205060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.55960146 |
| Short name | T3829 |
| Test name | |
| Test status | |
| Simulation time | 49642561 ps |
| CPU time | 0.7 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:11 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=55960146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.55960146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.1118682813 |
| Short name | T3827 |
| Test name | |
| Test status | |
| Simulation time | 39510299 ps |
| CPU time | 0.62 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:11 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118682813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.1118682813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.23321043 |
| Short name | T3828 |
| Test name | |
| Test status | |
| Simulation time | 36308774 ps |
| CPU time | 0.66 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:11 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=23321043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.23321043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.1418522748 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 32255844 ps |
| CPU time | 0.61 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:11 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1418522748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.1418522748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.752151538 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 33580734 ps |
| CPU time | 0.62 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:11 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=752151538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.752151538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.1247159279 |
| Short name | T3830 |
| Test name | |
| Test status | |
| Simulation time | 52704956 ps |
| CPU time | 0.68 seconds |
| Started | Sep 11 08:39:02 AM UTC 24 |
| Finished | Sep 11 08:39:11 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247159279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.1247159279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.2747527022 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 224783084 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:20 AM UTC 24 |
| Peak memory | 226808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2747527022 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.2747527022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.3205771368 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 124086764 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:18 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205771368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.3205771368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.2995640022 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 117016124 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:19 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995640022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.2995640022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.893389091 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 144151253 ps |
| CPU time | 1.84 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:19 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=893389091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.893389091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.3641029138 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 62747247 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:38:18 AM UTC 24 |
| Finished | Sep 11 08:38:20 AM UTC 24 |
| Peak memory | 226808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641029138 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.3641029138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.965026732 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 42630948 ps |
| CPU time | 0.75 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:19 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=965026732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.965026732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.207095779 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 82972322 ps |
| CPU time | 0.71 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:19 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=207095779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.207095779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.413357474 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 97760531 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:19 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=413357474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.413357474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.1747027734 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 341502696 ps |
| CPU time | 3.27 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:21 AM UTC 24 |
| Peak memory | 233824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747027734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.1747027734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.703162087 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 2532044677 ps |
| CPU time | 5.32 seconds |
| Started | Sep 11 08:38:16 AM UTC 24 |
| Finished | Sep 11 08:38:23 AM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=703162087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.703162087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.3071769600 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 99775799 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:38:18 AM UTC 24 |
| Finished | Sep 11 08:38:21 AM UTC 24 |
| Peak memory | 226964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071769600 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.3071769600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.4042488413 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 88297451 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:38:18 AM UTC 24 |
| Finished | Sep 11 08:38:20 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4042488413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.4042488413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.79740263 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 132363259 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:38:18 AM UTC 24 |
| Finished | Sep 11 08:38:21 AM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=79740263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.79740263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.3968545434 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 131799178 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:38:18 AM UTC 24 |
| Finished | Sep 11 08:38:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968545434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.3968545434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.2188897180 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 475668674 ps |
| CPU time | 3.58 seconds |
| Started | Sep 11 08:38:18 AM UTC 24 |
| Finished | Sep 11 08:38:23 AM UTC 24 |
| Peak memory | 217504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188897180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.2188897180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.2352248808 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 150489241 ps |
| CPU time | 2.52 seconds |
| Started | Sep 11 08:38:18 AM UTC 24 |
| Finished | Sep 11 08:38:22 AM UTC 24 |
| Peak memory | 227832 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352248808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.2352248808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2230278368 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 106253371 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:38:19 AM UTC 24 |
| Finished | Sep 11 08:38:21 AM UTC 24 |
| Peak memory | 226760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2230278368 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.2230278368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.2444096972 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 67693945 ps |
| CPU time | 0.88 seconds |
| Started | Sep 11 08:38:19 AM UTC 24 |
| Finished | Sep 11 08:38:24 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2444096972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.2444096972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.1678512920 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 176193051 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:38:19 AM UTC 24 |
| Finished | Sep 11 08:38:24 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1678512920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.1678512920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.11252616 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 790752578 ps |
| CPU time | 2.88 seconds |
| Started | Sep 11 08:38:19 AM UTC 24 |
| Finished | Sep 11 08:38:23 AM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=11252616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SE Q=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/covera ge/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.11252616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.2760036384 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 15120417507 ps |
| CPU time | 20.51 seconds |
| Started | Sep 11 08:17:22 AM UTC 24 |
| Finished | Sep 11 08:17:44 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760036384 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.2760036384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.3013845719 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 168200114 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:17:24 AM UTC 24 |
| Finished | Sep 11 08:17:26 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013845719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.3013845719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.4182145832 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 1449898185 ps |
| CPU time | 30.39 seconds |
| Started | Sep 11 08:17:25 AM UTC 24 |
| Finished | Sep 11 08:17:57 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182145832 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.4182145832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_enable.799242043 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 36669567 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:17:26 AM UTC 24 |
| Finished | Sep 11 08:17:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799242043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_enable.799242043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.110396453 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 388300196 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:17:27 AM UTC 24 |
| Finished | Sep 11 08:17:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=110396453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.110396453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.2539754800 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 244594088 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:17:27 AM UTC 24 |
| Finished | Sep 11 08:17:29 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539754800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_fifo_levels.2539754800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.161801273 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 350888513 ps |
| CPU time | 2.94 seconds |
| Started | Sep 11 08:17:27 AM UTC 24 |
| Finished | Sep 11 08:17:31 AM UTC 24 |
| Peak memory | 217272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=161801273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_fifo_rst.161801273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.3240734933 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 86223564151 ps |
| CPU time | 160.5 seconds |
| Started | Sep 11 08:17:27 AM UTC 24 |
| Finished | Sep 11 08:20:10 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240734933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.3240734933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.394723279 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 119100142361 ps |
| CPU time | 213.62 seconds |
| Started | Sep 11 08:17:27 AM UTC 24 |
| Finished | Sep 11 08:21:03 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=394723279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 0.usbdev_freq_hiclk_max.394723279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.2554651009 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 92111353158 ps |
| CPU time | 183.91 seconds |
| Started | Sep 11 08:17:27 AM UTC 24 |
| Finished | Sep 11 08:20:34 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554651009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.2554651009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.3708924374 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 101146235035 ps |
| CPU time | 194.27 seconds |
| Started | Sep 11 08:17:28 AM UTC 24 |
| Finished | Sep 11 08:20:45 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3708924374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_loclk_max.3708924374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.3472039880 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 97172156412 ps |
| CPU time | 192.32 seconds |
| Started | Sep 11 08:17:28 AM UTC 24 |
| Finished | Sep 11 08:20:43 AM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472039880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.3472039880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.90574259 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 274702330 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:17:28 AM UTC 24 |
| Finished | Sep 11 08:17:31 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=90574259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.90574259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.3369849805 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 192876526 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:17:28 AM UTC 24 |
| Finished | Sep 11 08:17:31 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369849805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_stall.3369849805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.2834842490 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 193574042 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:17:28 AM UTC 24 |
| Finished | Sep 11 08:17:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2834842490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_trans.2834842490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.2045839078 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 3990702649 ps |
| CPU time | 29.44 seconds |
| Started | Sep 11 08:17:28 AM UTC 24 |
| Finished | Sep 11 08:17:59 AM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2045839078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.2045839078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.3636102241 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 3945807235 ps |
| CPU time | 51.36 seconds |
| Started | Sep 11 08:17:29 AM UTC 24 |
| Finished | Sep 11 08:18:22 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636102241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.3636102241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.2275358870 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 181019315 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:17:29 AM UTC 24 |
| Finished | Sep 11 08:17:31 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2275358870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.2275358870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.3708985604 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 516304589 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:17:29 AM UTC 24 |
| Finished | Sep 11 08:17:32 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708985604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.3708985604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.3065362714 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 31609413293 ps |
| CPU time | 57.71 seconds |
| Started | Sep 11 08:17:30 AM UTC 24 |
| Finished | Sep 11 08:18:29 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3065362714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_resume.3065362714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.2044706590 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 9811965965 ps |
| CPU time | 17.28 seconds |
| Started | Sep 11 08:17:31 AM UTC 24 |
| Finished | Sep 11 08:17:49 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2044706590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_suspend.2044706590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.1743729162 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 3989200260 ps |
| CPU time | 34.61 seconds |
| Started | Sep 11 08:17:31 AM UTC 24 |
| Finished | Sep 11 08:18:07 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1743729162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.1743729162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.1395538443 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 242964309 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:17:31 AM UTC 24 |
| Finished | Sep 11 08:17:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395538443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.1395538443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.2393307711 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 188257998 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:17:31 AM UTC 24 |
| Finished | Sep 11 08:17:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393307711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.2393307711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1371375395 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 1630117299 ps |
| CPU time | 15.27 seconds |
| Started | Sep 11 08:17:31 AM UTC 24 |
| Finished | Sep 11 08:17:47 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371375395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.1371375395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.1158224018 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 2804562996 ps |
| CPU time | 74.7 seconds |
| Started | Sep 11 08:17:31 AM UTC 24 |
| Finished | Sep 11 08:18:48 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158224018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.1158224018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.909700047 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 161425168 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:17:32 AM UTC 24 |
| Finished | Sep 11 08:17:34 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=909700047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.909700047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.3369163900 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 146777054 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:17:32 AM UTC 24 |
| Finished | Sep 11 08:17:35 AM UTC 24 |
| Peak memory | 214876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369163900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.3369163900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.3542821183 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 545362484 ps |
| CPU time | 1.93 seconds |
| Started | Sep 11 08:17:32 AM UTC 24 |
| Finished | Sep 11 08:17:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542821183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.3542821183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.4291613966 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 196096490 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:17:32 AM UTC 24 |
| Finished | Sep 11 08:17:35 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291613966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_out_iso.4291613966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.2699906180 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 182641616 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:17:33 AM UTC 24 |
| Finished | Sep 11 08:17:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2699906180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_out_trans_nak.2699906180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.2309278809 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 157901466 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:17:33 AM UTC 24 |
| Finished | Sep 11 08:17:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309278809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.2309278809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.3041870634 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 167103476 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:17:34 AM UTC 24 |
| Finished | Sep 11 08:17:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3041870634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.3041870634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.4266416679 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 207397514 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:17:34 AM UTC 24 |
| Finished | Sep 11 08:17:36 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4266416679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.4266416679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.4146702473 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 270442060 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:17:35 AM UTC 24 |
| Finished | Sep 11 08:17:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146702473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.4146702473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.154677492 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 223668354 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:17:35 AM UTC 24 |
| Finished | Sep 11 08:17:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=154677492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -c m_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.154677492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.1349881061 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 17132598757 ps |
| CPU time | 45.73 seconds |
| Started | Sep 11 08:17:36 AM UTC 24 |
| Finished | Sep 11 08:18:23 AM UTC 24 |
| Peak memory | 231624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1349881061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_pkt_buffer.1349881061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.193175505 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 211539969 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:17:36 AM UTC 24 |
| Finished | Sep 11 08:17:39 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=193175505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_pkt_sent.193175505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.3406804089 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 3703884691 ps |
| CPU time | 91.81 seconds |
| Started | Sep 11 08:17:37 AM UTC 24 |
| Finished | Sep 11 08:19:11 AM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3406804089 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.3406804089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.2640959087 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 2397353795 ps |
| CPU time | 19.92 seconds |
| Started | Sep 11 08:17:37 AM UTC 24 |
| Finished | Sep 11 08:17:59 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640959087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.2640959087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.252675906 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 10334825971 ps |
| CPU time | 63.69 seconds |
| Started | Sep 11 08:17:38 AM UTC 24 |
| Finished | Sep 11 08:18:43 AM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=252675906 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.252675906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.4281591541 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 273662671 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:17:36 AM UTC 24 |
| Finished | Sep 11 08:17:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281591541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_random_length_in_transaction.4281591541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.2174674183 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 190825244 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:17:37 AM UTC 24 |
| Finished | Sep 11 08:17:40 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2174674183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.2174674183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.2784081637 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 20156642902 ps |
| CPU time | 28.72 seconds |
| Started | Sep 11 08:17:39 AM UTC 24 |
| Finished | Sep 11 08:18:09 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2784081637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_resume_link_active.2784081637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.718893205 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 340590179 ps |
| CPU time | 2.03 seconds |
| Started | Sep 11 08:17:39 AM UTC 24 |
| Finished | Sep 11 08:17:42 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=718893205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_rx_full.718893205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.1750936829 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 199430334 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:17:40 AM UTC 24 |
| Finished | Sep 11 08:17:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750936829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.1750936829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.1602676824 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 163730379 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:17:40 AM UTC 24 |
| Finished | Sep 11 08:17:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1602676824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.1602676824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.1620872460 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 219016196 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:17:40 AM UTC 24 |
| Finished | Sep 11 08:17:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620872460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.1620872460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.92171897 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 2644056156 ps |
| CPU time | 73.96 seconds |
| Started | Sep 11 08:17:40 AM UTC 24 |
| Finished | Sep 11 08:18:56 AM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=92171897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.92171897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.3110487878 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 154745225 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:17:42 AM UTC 24 |
| Finished | Sep 11 08:17:44 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110487878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.3110487878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.3570876014 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 252402021 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:17:43 AM UTC 24 |
| Finished | Sep 11 08:17:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570876014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.3570876014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.160634985 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 2399844372 ps |
| CPU time | 35.1 seconds |
| Started | Sep 11 08:17:43 AM UTC 24 |
| Finished | Sep 11 08:18:19 AM UTC 24 |
| Peak memory | 229636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=160634985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_streaming_out.160634985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.2809574244 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 174308276 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:17:25 AM UTC 24 |
| Finished | Sep 11 08:17:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809574244 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.2809574244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.3775507786 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 512296072 ps |
| CPU time | 2.91 seconds |
| Started | Sep 11 08:17:44 AM UTC 24 |
| Finished | Sep 11 08:17:48 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3775507786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.3775507786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.280657102 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 45175398 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:18:33 AM UTC 24 |
| Finished | Sep 11 08:18:36 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=280657102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.280657102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.151291261 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 9561811349 ps |
| CPU time | 13.5 seconds |
| Started | Sep 11 08:17:45 AM UTC 24 |
| Finished | Sep 11 08:18:00 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=151291261 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.151291261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.286420354 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 16064133224 ps |
| CPU time | 38.76 seconds |
| Started | Sep 11 08:17:46 AM UTC 24 |
| Finished | Sep 11 08:18:26 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=286420354 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.286420354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.159428217 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 29085563378 ps |
| CPU time | 55.07 seconds |
| Started | Sep 11 08:17:46 AM UTC 24 |
| Finished | Sep 11 08:18:42 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=159428217 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.159428217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.1715055873 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 206574422 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:17:46 AM UTC 24 |
| Finished | Sep 11 08:17:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715055873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_av_buffer.1715055873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.3582648486 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 173846569 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:17:47 AM UTC 24 |
| Finished | Sep 11 08:17:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582648486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.3582648486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.811857113 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 516234728 ps |
| CPU time | 3.05 seconds |
| Started | Sep 11 08:17:47 AM UTC 24 |
| Finished | Sep 11 08:17:51 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=811857113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_data_toggle_clear.811857113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.3047528130 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 679224023 ps |
| CPU time | 3.16 seconds |
| Started | Sep 11 08:17:47 AM UTC 24 |
| Finished | Sep 11 08:17:51 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047528130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.3047528130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.2478262888 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 47562828698 ps |
| CPU time | 102.61 seconds |
| Started | Sep 11 08:17:48 AM UTC 24 |
| Finished | Sep 11 08:19:33 AM UTC 24 |
| Peak memory | 217132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2478262888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.2478262888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.474465734 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 7682477417 ps |
| CPU time | 47.78 seconds |
| Started | Sep 11 08:17:48 AM UTC 24 |
| Finished | Sep 11 08:18:37 AM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=474465734 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.474465734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.535726181 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 1039810133 ps |
| CPU time | 4.31 seconds |
| Started | Sep 11 08:17:48 AM UTC 24 |
| Finished | Sep 11 08:17:54 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=535726181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_disable_endpoint.535726181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.709211350 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 140548340 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:17:49 AM UTC 24 |
| Finished | Sep 11 08:17:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709211350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_disconnected.709211350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_enable.887861133 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 35943381 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:17:49 AM UTC 24 |
| Finished | Sep 11 08:17:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=887861133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_enable.887861133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.1213251202 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 945467730 ps |
| CPU time | 5.21 seconds |
| Started | Sep 11 08:17:50 AM UTC 24 |
| Finished | Sep 11 08:17:56 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213251202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.1213251202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.1072708751 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 255360854 ps |
| CPU time | 1.82 seconds |
| Started | Sep 11 08:17:50 AM UTC 24 |
| Finished | Sep 11 08:17:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072708751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.1072708751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.1408366718 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 317883406 ps |
| CPU time | 3 seconds |
| Started | Sep 11 08:17:52 AM UTC 24 |
| Finished | Sep 11 08:17:56 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1408366718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_fifo_rst.1408366718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.192581463 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 108205588883 ps |
| CPU time | 212.09 seconds |
| Started | Sep 11 08:17:52 AM UTC 24 |
| Finished | Sep 11 08:21:27 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192581463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.192581463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.1951374411 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 98318632744 ps |
| CPU time | 173.57 seconds |
| Started | Sep 11 08:17:53 AM UTC 24 |
| Finished | Sep 11 08:20:49 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1951374411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.1951374411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.292005326 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 98107331930 ps |
| CPU time | 231.51 seconds |
| Started | Sep 11 08:17:53 AM UTC 24 |
| Finished | Sep 11 08:21:48 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=292005326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.292005326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.2182068208 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 114259473179 ps |
| CPU time | 254.01 seconds |
| Started | Sep 11 08:17:53 AM UTC 24 |
| Finished | Sep 11 08:22:11 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2182068208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_loclk_max.2182068208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.1622005381 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 93135680832 ps |
| CPU time | 164.19 seconds |
| Started | Sep 11 08:17:54 AM UTC 24 |
| Finished | Sep 11 08:20:41 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622005381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.1622005381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.3997881189 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 191203367 ps |
| CPU time | 1.84 seconds |
| Started | Sep 11 08:17:56 AM UTC 24 |
| Finished | Sep 11 08:17:59 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3997881189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.3997881189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.1825459674 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 146222285 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:17:56 AM UTC 24 |
| Finished | Sep 11 08:17:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1825459674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_stall.1825459674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.372175403 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 156139793 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:17:57 AM UTC 24 |
| Finished | Sep 11 08:18:00 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=372175403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_in_trans.372175403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.2666400451 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 227651981 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:18:00 AM UTC 24 |
| Finished | Sep 11 08:18:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2666400451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_in_err.2666400451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.2652738224 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 27815301974 ps |
| CPU time | 61.68 seconds |
| Started | Sep 11 08:18:00 AM UTC 24 |
| Finished | Sep 11 08:19:03 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652738224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.2652738224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.1093918214 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 4853544194 ps |
| CPU time | 10.25 seconds |
| Started | Sep 11 08:18:00 AM UTC 24 |
| Finished | Sep 11 08:18:11 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1093918214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.1093918214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.1134240141 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 2160259017 ps |
| CPU time | 59.33 seconds |
| Started | Sep 11 08:18:01 AM UTC 24 |
| Finished | Sep 11 08:19:02 AM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1134240141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1134240141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.1852524809 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 282801768 ps |
| CPU time | 1.81 seconds |
| Started | Sep 11 08:18:01 AM UTC 24 |
| Finished | Sep 11 08:18:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852524809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.1852524809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.3096826384 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 199715560 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:18:03 AM UTC 24 |
| Finished | Sep 11 08:18:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3096826384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.3096826384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.1932284656 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 2368062496 ps |
| CPU time | 27.98 seconds |
| Started | Sep 11 08:18:04 AM UTC 24 |
| Finished | Sep 11 08:18:33 AM UTC 24 |
| Peak memory | 234232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932284656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.1932284656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.3318517370 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 3263774161 ps |
| CPU time | 43.35 seconds |
| Started | Sep 11 08:18:06 AM UTC 24 |
| Finished | Sep 11 08:18:51 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318517370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.3318517370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.4077336247 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 1778775456 ps |
| CPU time | 19.7 seconds |
| Started | Sep 11 08:18:06 AM UTC 24 |
| Finished | Sep 11 08:18:27 AM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4077336247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.4077336247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.3558196824 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 156482348 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:18:08 AM UTC 24 |
| Finished | Sep 11 08:18:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558196824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.3558196824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.2587150148 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 146157512 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:18:10 AM UTC 24 |
| Finished | Sep 11 08:18:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587150148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.2587150148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.4059634111 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 232432254 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:18:12 AM UTC 24 |
| Finished | Sep 11 08:18:14 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059634111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.4059634111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.1223549594 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 179238073 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:18:12 AM UTC 24 |
| Finished | Sep 11 08:18:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223549594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.1223549594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.3890396388 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 168959629 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:18:13 AM UTC 24 |
| Finished | Sep 11 08:18:16 AM UTC 24 |
| Peak memory | 214672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890396388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_out_trans_nak.3890396388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.938051885 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 171549856 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:18:13 AM UTC 24 |
| Finished | Sep 11 08:18:16 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=938051885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pending_in_trans.938051885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.1065253971 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 240915248 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:18:14 AM UTC 24 |
| Finished | Sep 11 08:18:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065253971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.1065253971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.2014778102 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 198584066 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:18:15 AM UTC 24 |
| Finished | Sep 11 08:18:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014778102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.2014778102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.997509447 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 146745545 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:18:15 AM UTC 24 |
| Finished | Sep 11 08:18:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=997509447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.997509447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.2750996422 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 17324557756 ps |
| CPU time | 43.8 seconds |
| Started | Sep 11 08:18:17 AM UTC 24 |
| Finished | Sep 11 08:19:02 AM UTC 24 |
| Peak memory | 234120 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750996422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_buffer.2750996422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.3912373380 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 191686157 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:18:18 AM UTC 24 |
| Finished | Sep 11 08:18:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912373380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_pkt_received.3912373380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2995482420 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 208702166 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:18:19 AM UTC 24 |
| Finished | Sep 11 08:18:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995482420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.2995482420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.1548974467 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 3353132705 ps |
| CPU time | 21.94 seconds |
| Started | Sep 11 08:18:20 AM UTC 24 |
| Finished | Sep 11 08:18:43 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548974467 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.1548974467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.238980714 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 6553849005 ps |
| CPU time | 87.58 seconds |
| Started | Sep 11 08:18:21 AM UTC 24 |
| Finished | Sep 11 08:19:51 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=238980714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.238980714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.873516427 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 12012210394 ps |
| CPU time | 93.12 seconds |
| Started | Sep 11 08:18:22 AM UTC 24 |
| Finished | Sep 11 08:19:57 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=873516427 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.873516427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.96930035 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 216662127 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:18:19 AM UTC 24 |
| Finished | Sep 11 08:18:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=96930035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_random_length_in_transaction.96930035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.321819685 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 160658844 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:18:20 AM UTC 24 |
| Finished | Sep 11 08:18:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=321819685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.321819685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.1414429964 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 20164730809 ps |
| CPU time | 40.97 seconds |
| Started | Sep 11 08:18:22 AM UTC 24 |
| Finished | Sep 11 08:19:04 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414429964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.1414429964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.2032377074 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 155381810 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:18:23 AM UTC 24 |
| Finished | Sep 11 08:18:26 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2032377074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_crc_err.2032377074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.3804932573 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 270911578 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:18:23 AM UTC 24 |
| Finished | Sep 11 08:18:26 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3804932573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.3804932573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.4111192331 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 158381721 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:18:25 AM UTC 24 |
| Finished | Sep 11 08:18:27 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111192331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.4111192331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.489289310 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 391280695 ps |
| CPU time | 2.22 seconds |
| Started | Sep 11 08:18:33 AM UTC 24 |
| Finished | Sep 11 08:18:37 AM UTC 24 |
| Peak memory | 251536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=489289310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.489289310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.1181168027 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 374873599 ps |
| CPU time | 2.19 seconds |
| Started | Sep 11 08:18:25 AM UTC 24 |
| Finished | Sep 11 08:18:28 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181168027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.1181168027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.226968684 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 316686867 ps |
| CPU time | 1.9 seconds |
| Started | Sep 11 08:18:26 AM UTC 24 |
| Finished | Sep 11 08:18:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=226968684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.226968684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.1008489775 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 156916128 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:18:27 AM UTC 24 |
| Finished | Sep 11 08:18:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008489775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_setup_stage.1008489775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.2830539347 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 157207436 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:18:27 AM UTC 24 |
| Finished | Sep 11 08:18:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2830539347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.2830539347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.2503187445 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 215601905 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:18:28 AM UTC 24 |
| Finished | Sep 11 08:18:31 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503187445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.2503187445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.4048633401 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 200430710 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:18:29 AM UTC 24 |
| Finished | Sep 11 08:18:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048633401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.4048633401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.3362821335 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 181907244 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:18:30 AM UTC 24 |
| Finished | Sep 11 08:18:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362821335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.3362821335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.4017677975 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 787476289 ps |
| CPU time | 3.81 seconds |
| Started | Sep 11 08:18:31 AM UTC 24 |
| Finished | Sep 11 08:18:36 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4017677975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.4017677975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.703323882 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 2655622507 ps |
| CPU time | 23.49 seconds |
| Started | Sep 11 08:18:30 AM UTC 24 |
| Finished | Sep 11 08:18:55 AM UTC 24 |
| Peak memory | 229620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=703323882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_streaming_out.703323882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.488956998 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 7336797483 ps |
| CPU time | 60.53 seconds |
| Started | Sep 11 08:17:48 AM UTC 24 |
| Finished | Sep 11 08:18:50 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=488956998 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.488956998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.2531470061 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 46008645 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:24:16 AM UTC 24 |
| Finished | Sep 11 08:24:19 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531470061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.2531470061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.4268726670 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 11099610511 ps |
| CPU time | 16.63 seconds |
| Started | Sep 11 08:23:53 AM UTC 24 |
| Finished | Sep 11 08:24:11 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268726670 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.4268726670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.2105835288 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 16359419838 ps |
| CPU time | 29.16 seconds |
| Started | Sep 11 08:23:53 AM UTC 24 |
| Finished | Sep 11 08:24:24 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2105835288 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.2105835288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.2544769998 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 29043043467 ps |
| CPU time | 47.53 seconds |
| Started | Sep 11 08:23:55 AM UTC 24 |
| Finished | Sep 11 08:24:44 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2544769998 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.2544769998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.2797074469 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 182106477 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:23:55 AM UTC 24 |
| Finished | Sep 11 08:23:58 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797074469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.2797074469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.2734971402 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 174009796 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:23:55 AM UTC 24 |
| Finished | Sep 11 08:23:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2734971402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.2734971402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.157513041 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 288209085 ps |
| CPU time | 2.1 seconds |
| Started | Sep 11 08:23:55 AM UTC 24 |
| Finished | Sep 11 08:23:58 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157513041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_data_toggle_clear.157513041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.396927173 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 990748979 ps |
| CPU time | 3.01 seconds |
| Started | Sep 11 08:23:55 AM UTC 24 |
| Finished | Sep 11 08:23:59 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396927173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.396927173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.3466619907 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 1146135767 ps |
| CPU time | 23.36 seconds |
| Started | Sep 11 08:23:56 AM UTC 24 |
| Finished | Sep 11 08:24:22 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3466619907 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.3466619907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.1519944082 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 690577645 ps |
| CPU time | 1.86 seconds |
| Started | Sep 11 08:23:57 AM UTC 24 |
| Finished | Sep 11 08:24:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1519944082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_disable_endpoint.1519944082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.1760960263 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 151936738 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:23:58 AM UTC 24 |
| Finished | Sep 11 08:24:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760960263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.1760960263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_enable.3823041452 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 58825994 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:23:58 AM UTC 24 |
| Finished | Sep 11 08:24:01 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823041452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.3823041452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.1674969611 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 816874091 ps |
| CPU time | 2.57 seconds |
| Started | Sep 11 08:23:58 AM UTC 24 |
| Finished | Sep 11 08:24:02 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674969611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.1674969611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.428146683 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 520931019 ps |
| CPU time | 2.41 seconds |
| Started | Sep 11 08:23:59 AM UTC 24 |
| Finished | Sep 11 08:24:02 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=428146683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.428146683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.2922443195 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 447364148 ps |
| CPU time | 3.28 seconds |
| Started | Sep 11 08:24:00 AM UTC 24 |
| Finished | Sep 11 08:24:05 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2922443195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_fifo_rst.2922443195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.3187345903 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 208287301 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:24:00 AM UTC 24 |
| Finished | Sep 11 08:24:03 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187345903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.3187345903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.1000069220 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 146035996 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:24:00 AM UTC 24 |
| Finished | Sep 11 08:24:02 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1000069220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.1000069220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.2045505775 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 231407281 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:24:02 AM UTC 24 |
| Finished | Sep 11 08:24:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2045505775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.2045505775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.2513993598 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 3412984078 ps |
| CPU time | 33.88 seconds |
| Started | Sep 11 08:24:00 AM UTC 24 |
| Finished | Sep 11 08:24:35 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513993598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.2513993598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.3044256592 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 6927761675 ps |
| CPU time | 50.53 seconds |
| Started | Sep 11 08:24:02 AM UTC 24 |
| Finished | Sep 11 08:24:54 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044256592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.3044256592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.4254324820 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 231821589 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:24:02 AM UTC 24 |
| Finished | Sep 11 08:24:05 AM UTC 24 |
| Peak memory | 214836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254324820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.4254324820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.801930296 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 23945764167 ps |
| CPU time | 36.64 seconds |
| Started | Sep 11 08:24:02 AM UTC 24 |
| Finished | Sep 11 08:24:40 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=801930296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_link_resume.801930296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.1897345192 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 3994927439 ps |
| CPU time | 11.79 seconds |
| Started | Sep 11 08:24:02 AM UTC 24 |
| Finished | Sep 11 08:24:15 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897345192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_link_suspend.1897345192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.728231228 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 3503855315 ps |
| CPU time | 39.22 seconds |
| Started | Sep 11 08:24:02 AM UTC 24 |
| Finished | Sep 11 08:24:43 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=728231228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.728231228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.2150068278 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 2182994323 ps |
| CPU time | 19.24 seconds |
| Started | Sep 11 08:24:03 AM UTC 24 |
| Finished | Sep 11 08:24:24 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150068278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.2150068278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.2161062431 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 259827172 ps |
| CPU time | 1.85 seconds |
| Started | Sep 11 08:24:03 AM UTC 24 |
| Finished | Sep 11 08:24:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2161062431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.2161062431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.1816725834 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 199002970 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:24:04 AM UTC 24 |
| Finished | Sep 11 08:24:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1816725834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.1816725834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.1682491423 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 3354436732 ps |
| CPU time | 89.59 seconds |
| Started | Sep 11 08:24:04 AM UTC 24 |
| Finished | Sep 11 08:25:35 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682491423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.1682491423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.2446239492 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 3231917948 ps |
| CPU time | 35.44 seconds |
| Started | Sep 11 08:24:04 AM UTC 24 |
| Finished | Sep 11 08:24:41 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446239492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.2446239492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.2320417659 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 2382563126 ps |
| CPU time | 28.74 seconds |
| Started | Sep 11 08:24:04 AM UTC 24 |
| Finished | Sep 11 08:24:34 AM UTC 24 |
| Peak memory | 234148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320417659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.2320417659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.3499426528 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 189401348 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:24:04 AM UTC 24 |
| Finished | Sep 11 08:24:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499426528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.3499426528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.1182306506 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 176200152 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:24:05 AM UTC 24 |
| Finished | Sep 11 08:24:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182306506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.1182306506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.996905687 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 170217444 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:24:06 AM UTC 24 |
| Finished | Sep 11 08:24:09 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=996905687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_nak_trans.996905687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.1311723599 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 208645705 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:24:06 AM UTC 24 |
| Finished | Sep 11 08:24:09 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1311723599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.1311723599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.270495613 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 173557225 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:24:06 AM UTC 24 |
| Finished | Sep 11 08:24:09 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270495613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_out_stall.270495613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.137297483 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 162849517 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:24:07 AM UTC 24 |
| Finished | Sep 11 08:24:10 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=137297483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_out_trans_nak.137297483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.1534679699 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 214674362 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:24:07 AM UTC 24 |
| Finished | Sep 11 08:24:10 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1534679699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.1534679699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.2921902660 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 240656471 ps |
| CPU time | 1.81 seconds |
| Started | Sep 11 08:24:08 AM UTC 24 |
| Finished | Sep 11 08:24:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2921902660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.2921902660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.2786593079 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 173162805 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:24:09 AM UTC 24 |
| Finished | Sep 11 08:24:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786593079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.2786593079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.1996116888 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 32338493 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:24:10 AM UTC 24 |
| Finished | Sep 11 08:24:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1996116888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.1996116888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.1055580623 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 10817698483 ps |
| CPU time | 31.21 seconds |
| Started | Sep 11 08:24:10 AM UTC 24 |
| Finished | Sep 11 08:24:43 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055580623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_pkt_buffer.1055580623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.2701863574 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 182245793 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:24:10 AM UTC 24 |
| Finished | Sep 11 08:24:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701863574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_pkt_received.2701863574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.1003758716 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 149699573 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:24:10 AM UTC 24 |
| Finished | Sep 11 08:24:13 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003758716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_pkt_sent.1003758716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.3912668778 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 208894657 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:24:12 AM UTC 24 |
| Finished | Sep 11 08:24:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912668778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.3912668778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.3450414485 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 252449380 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:24:12 AM UTC 24 |
| Finished | Sep 11 08:24:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450414485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.3450414485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.2031740463 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 20169941686 ps |
| CPU time | 30.77 seconds |
| Started | Sep 11 08:24:12 AM UTC 24 |
| Finished | Sep 11 08:24:44 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031740463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 10.usbdev_resume_link_active.2031740463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.17251422 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 157319472 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:24:12 AM UTC 24 |
| Finished | Sep 11 08:24:14 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17251422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_rx_crc_err.17251422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.3340204686 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 262904924 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:24:12 AM UTC 24 |
| Finished | Sep 11 08:24:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3340204686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_rx_full.3340204686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.898942690 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 197702614 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:24:13 AM UTC 24 |
| Finished | Sep 11 08:24:16 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=898942690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_setup_stage.898942690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.2028106492 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 167777508 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:24:13 AM UTC 24 |
| Finished | Sep 11 08:24:16 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028106492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.2028106492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.3370748811 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 240583827 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:24:15 AM UTC 24 |
| Finished | Sep 11 08:24:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3370748811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.3370748811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.3293229935 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 1824862263 ps |
| CPU time | 21.32 seconds |
| Started | Sep 11 08:24:15 AM UTC 24 |
| Finished | Sep 11 08:24:37 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293229935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.3293229935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.2076127026 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 178897879 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:24:15 AM UTC 24 |
| Finished | Sep 11 08:24:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2076127026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.2076127026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.662095756 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 152873523 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:24:15 AM UTC 24 |
| Finished | Sep 11 08:24:17 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=662095756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_stall_trans.662095756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.3707253298 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 388885055 ps |
| CPU time | 2.48 seconds |
| Started | Sep 11 08:24:16 AM UTC 24 |
| Finished | Sep 11 08:24:20 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707253298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.3707253298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.1832532173 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 1984557860 ps |
| CPU time | 53.91 seconds |
| Started | Sep 11 08:24:15 AM UTC 24 |
| Finished | Sep 11 08:25:10 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1832532173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.1832532173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.3670808995 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 9130831423 ps |
| CPU time | 56.84 seconds |
| Started | Sep 11 08:23:57 AM UTC 24 |
| Finished | Sep 11 08:24:55 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670808995 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.3670808995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.2426513192 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 507642320 ps |
| CPU time | 2.85 seconds |
| Started | Sep 11 08:24:16 AM UTC 24 |
| Finished | Sep 11 08:24:20 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2426513192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.2426513192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.1912505331 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 369274291 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:35:44 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912505331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.1912505331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.2325288622 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 601745718 ps |
| CPU time | 1.87 seconds |
| Started | Sep 11 08:35:44 AM UTC 24 |
| Finished | Sep 11 08:35:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2325288622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.2325288622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1156473221 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 610176889 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 214936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1156473221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.1156473221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.4159618011 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 271740977 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159618011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 101.usbdev_fifo_levels.4159618011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.1278806018 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 540304380 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1278806018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.1278806018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.2771670328 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 193327789 ps |
| CPU time | 0.93 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771670328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.2771670328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.1752597904 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 229193405 ps |
| CPU time | 0.94 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752597904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 102.usbdev_fifo_levels.1752597904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.4249990106 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 532189104 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4249990106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_ tx_rx_disruption.4249990106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.518102321 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 464020029 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=518102321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.518102321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.1937231794 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 572148710 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1937231794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_ tx_rx_disruption.1937231794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.2342798753 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 163568223 ps |
| CPU time | 0.81 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2342798753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.2342798753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.2246867856 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 648480309 ps |
| CPU time | 1.89 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2246867856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.2246867856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.3960122686 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 519269815 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960122686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.3960122686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.513785600 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 612721909 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=513785600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_t x_rx_disruption.513785600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.863051678 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 505412649 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=863051678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.863051678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.878427462 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 257150535 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878427462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 106.usbdev_fifo_levels.878427462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.2302498124 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 622410107 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:35:46 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2302498124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_ tx_rx_disruption.2302498124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.1605762862 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 176206068 ps |
| CPU time | 0.89 seconds |
| Started | Sep 11 08:35:47 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605762862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 107.usbdev_fifo_levels.1605762862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3866425989 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 559402780 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:35:47 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 216400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3866425989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.3866425989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.1741245585 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 688296162 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:35:48 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1741245585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_ tx_rx_disruption.1741245585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.4190640798 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 491065702 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4190640798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.4190640798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.143607326 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 50942487 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:24:38 AM UTC 24 |
| Finished | Sep 11 08:24:40 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=143607326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.143607326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.1318447127 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 5014480615 ps |
| CPU time | 11.1 seconds |
| Started | Sep 11 08:24:16 AM UTC 24 |
| Finished | Sep 11 08:24:29 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318447127 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.1318447127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.1277814401 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 19803099755 ps |
| CPU time | 27.12 seconds |
| Started | Sep 11 08:24:17 AM UTC 24 |
| Finished | Sep 11 08:24:45 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1277814401 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.1277814401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.2043131715 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 24949419615 ps |
| CPU time | 33.06 seconds |
| Started | Sep 11 08:24:17 AM UTC 24 |
| Finished | Sep 11 08:24:51 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2043131715 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.2043131715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.3988703447 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 149164277 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:24:18 AM UTC 24 |
| Finished | Sep 11 08:24:20 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988703447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.3988703447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.4206331341 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 154278678 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:24:18 AM UTC 24 |
| Finished | Sep 11 08:24:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206331341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.4206331341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.3332869951 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 279189754 ps |
| CPU time | 1.88 seconds |
| Started | Sep 11 08:24:18 AM UTC 24 |
| Finished | Sep 11 08:24:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332869951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_data_toggle_clear.3332869951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.3118206548 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 371498313 ps |
| CPU time | 2.26 seconds |
| Started | Sep 11 08:24:19 AM UTC 24 |
| Finished | Sep 11 08:24:23 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118206548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.3118206548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.1627445619 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 27601429103 ps |
| CPU time | 54.73 seconds |
| Started | Sep 11 08:24:19 AM UTC 24 |
| Finished | Sep 11 08:25:16 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1627445619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.1627445619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.17424591 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 3909246808 ps |
| CPU time | 31.96 seconds |
| Started | Sep 11 08:24:19 AM UTC 24 |
| Finished | Sep 11 08:24:53 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=17424591 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.17424591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.855848180 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 690282397 ps |
| CPU time | 3.08 seconds |
| Started | Sep 11 08:24:21 AM UTC 24 |
| Finished | Sep 11 08:24:25 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=855848180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_disable_endpoint.855848180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.651431235 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 151543786 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:24:21 AM UTC 24 |
| Finished | Sep 11 08:24:23 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=651431235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_disconnected.651431235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_enable.3947497555 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 36134280 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:24:21 AM UTC 24 |
| Finished | Sep 11 08:24:23 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947497555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.3947497555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.706869497 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 836827464 ps |
| CPU time | 3.08 seconds |
| Started | Sep 11 08:24:21 AM UTC 24 |
| Finished | Sep 11 08:24:25 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=706869497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.706869497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.3832115547 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 318350778 ps |
| CPU time | 1.98 seconds |
| Started | Sep 11 08:24:21 AM UTC 24 |
| Finished | Sep 11 08:24:24 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832115547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.3832115547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.94125089 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 153306657 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:24:22 AM UTC 24 |
| Finished | Sep 11 08:24:24 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=94125089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_fifo_levels.94125089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.2233882468 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 473593300 ps |
| CPU time | 3.31 seconds |
| Started | Sep 11 08:24:22 AM UTC 24 |
| Finished | Sep 11 08:24:27 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2233882468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_fifo_rst.2233882468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.2731241192 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 192580662 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:24:24 AM UTC 24 |
| Finished | Sep 11 08:24:26 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2731241192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.2731241192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.3934350728 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 141341171 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:24:24 AM UTC 24 |
| Finished | Sep 11 08:24:26 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3934350728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_stall.3934350728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.1336278049 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 185538880 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:24:25 AM UTC 24 |
| Finished | Sep 11 08:24:28 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336278049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.1336278049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.3223058472 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 3103080406 ps |
| CPU time | 78.66 seconds |
| Started | Sep 11 08:24:24 AM UTC 24 |
| Finished | Sep 11 08:25:44 AM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3223058472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.3223058472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.3144639724 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 11452746907 ps |
| CPU time | 80.82 seconds |
| Started | Sep 11 08:24:25 AM UTC 24 |
| Finished | Sep 11 08:25:48 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3144639724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.3144639724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.978912857 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 181425699 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:24:25 AM UTC 24 |
| Finished | Sep 11 08:24:27 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=978912857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_link_in_err.978912857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.1772028678 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 26492670103 ps |
| CPU time | 58.24 seconds |
| Started | Sep 11 08:24:25 AM UTC 24 |
| Finished | Sep 11 08:25:25 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772028678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_resume.1772028678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.3209863365 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 4558643678 ps |
| CPU time | 11.86 seconds |
| Started | Sep 11 08:24:25 AM UTC 24 |
| Finished | Sep 11 08:24:38 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209863365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.3209863365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.2797819491 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 2893212043 ps |
| CPU time | 81.96 seconds |
| Started | Sep 11 08:24:27 AM UTC 24 |
| Finished | Sep 11 08:25:51 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797819491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.2797819491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.1124727277 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 3784055819 ps |
| CPU time | 35.98 seconds |
| Started | Sep 11 08:24:27 AM UTC 24 |
| Finished | Sep 11 08:25:04 AM UTC 24 |
| Peak memory | 229504 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124727277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.1124727277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.2660622582 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 236383117 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:24:27 AM UTC 24 |
| Finished | Sep 11 08:24:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660622582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.2660622582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.3259146000 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 208778707 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:24:27 AM UTC 24 |
| Finished | Sep 11 08:24:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259146000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.3259146000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.359011582 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 3242250464 ps |
| CPU time | 33.11 seconds |
| Started | Sep 11 08:24:27 AM UTC 24 |
| Finished | Sep 11 08:25:02 AM UTC 24 |
| Peak memory | 229636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=359011582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.359011582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.3566213349 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 1806148259 ps |
| CPU time | 50.71 seconds |
| Started | Sep 11 08:24:27 AM UTC 24 |
| Finished | Sep 11 08:25:20 AM UTC 24 |
| Peak memory | 227500 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566213349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.3566213349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.2081525329 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 2341014517 ps |
| CPU time | 20.36 seconds |
| Started | Sep 11 08:24:27 AM UTC 24 |
| Finished | Sep 11 08:24:49 AM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081525329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.2081525329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.928646817 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 152569770 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:24:27 AM UTC 24 |
| Finished | Sep 11 08:24:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=928646817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.928646817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.3352731936 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 170388765 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:24:29 AM UTC 24 |
| Finished | Sep 11 08:24:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3352731936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.3352731936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.3554622916 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 223581113 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:24:29 AM UTC 24 |
| Finished | Sep 11 08:24:32 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3554622916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.3554622916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.2960347671 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 186226224 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:24:29 AM UTC 24 |
| Finished | Sep 11 08:24:32 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960347671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_out_iso.2960347671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.3872688572 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 170470135 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:24:30 AM UTC 24 |
| Finished | Sep 11 08:24:32 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872688572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.3872688572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.1194953555 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 166395833 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:24:30 AM UTC 24 |
| Finished | Sep 11 08:24:32 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194953555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.1194953555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.3027988798 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 157907308 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:24:31 AM UTC 24 |
| Finished | Sep 11 08:24:34 AM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3027988798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.3027988798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.169833781 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 282213630 ps |
| CPU time | 1.81 seconds |
| Started | Sep 11 08:24:31 AM UTC 24 |
| Finished | Sep 11 08:24:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=169833781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.169833781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.1934615929 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 148902851 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:24:31 AM UTC 24 |
| Finished | Sep 11 08:24:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1934615929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.1934615929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.3504421528 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 90405767 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:24:31 AM UTC 24 |
| Finished | Sep 11 08:24:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3504421528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.3504421528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.1664432082 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 9798056054 ps |
| CPU time | 30.43 seconds |
| Started | Sep 11 08:24:32 AM UTC 24 |
| Finished | Sep 11 08:25:04 AM UTC 24 |
| Peak memory | 227656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664432082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.1664432082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.1321154678 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 177910150 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:24:32 AM UTC 24 |
| Finished | Sep 11 08:24:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1321154678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_pkt_received.1321154678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.3891163401 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 292165188 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:24:34 AM UTC 24 |
| Finished | Sep 11 08:24:36 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891163401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.3891163401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.2235618183 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 260032261 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:24:34 AM UTC 24 |
| Finished | Sep 11 08:24:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235618183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.2235618183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.1794762380 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 199536163 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:24:34 AM UTC 24 |
| Finished | Sep 11 08:24:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1794762380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.1794762380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.1580650366 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 20162375329 ps |
| CPU time | 30.77 seconds |
| Started | Sep 11 08:24:36 AM UTC 24 |
| Finished | Sep 11 08:25:08 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1580650366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_resume_link_active.1580650366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.4155847114 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 164265088 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:24:36 AM UTC 24 |
| Finished | Sep 11 08:24:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4155847114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.4155847114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.4099240781 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 419048359 ps |
| CPU time | 2.28 seconds |
| Started | Sep 11 08:24:36 AM UTC 24 |
| Finished | Sep 11 08:24:39 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4099240781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.4099240781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.395476217 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 153645838 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:24:36 AM UTC 24 |
| Finished | Sep 11 08:24:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=395476217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_setup_stage.395476217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.2258841474 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 152857134 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:24:36 AM UTC 24 |
| Finished | Sep 11 08:24:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258841474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.2258841474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.86545680 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 220338674 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:24:36 AM UTC 24 |
| Finished | Sep 11 08:24:39 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=86545680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 11.usbdev_smoke.86545680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.3883906077 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 1651977553 ps |
| CPU time | 15.28 seconds |
| Started | Sep 11 08:24:36 AM UTC 24 |
| Finished | Sep 11 08:24:53 AM UTC 24 |
| Peak memory | 234092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883906077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.3883906077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.3853910571 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 186713762 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:24:36 AM UTC 24 |
| Finished | Sep 11 08:24:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3853910571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.3853910571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.3423643123 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 162271012 ps |
| CPU time | 0.83 seconds |
| Started | Sep 11 08:24:36 AM UTC 24 |
| Finished | Sep 11 08:24:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423643123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.3423643123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.2734931760 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 901606773 ps |
| CPU time | 4.42 seconds |
| Started | Sep 11 08:24:37 AM UTC 24 |
| Finished | Sep 11 08:24:43 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2734931760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.2734931760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.3951888869 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 3303466961 ps |
| CPU time | 86.7 seconds |
| Started | Sep 11 08:24:37 AM UTC 24 |
| Finished | Sep 11 08:26:06 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3951888869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.3951888869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.2150811361 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 1940491374 ps |
| CPU time | 15.65 seconds |
| Started | Sep 11 08:24:19 AM UTC 24 |
| Finished | Sep 11 08:24:36 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150811361 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.2150811361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.2366693078 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 388551092 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366693078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.2366693078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.2591117945 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 528813076 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2591117945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.2591117945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3852893785 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 154618484 ps |
| CPU time | 0.93 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:04 AM UTC 24 |
| Peak memory | 214796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3852893785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 111.usbdev_fifo_levels.3852893785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/111.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.261431881 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 553058937 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=261431881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_t x_rx_disruption.261431881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.1849396270 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 486482501 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1849396270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.1849396270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.3966453917 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 294397142 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:35:49 AM UTC 24 |
| Finished | Sep 11 08:36:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3966453917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 113.usbdev_fifo_levels.3966453917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.4009912014 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 613495001 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:35:50 AM UTC 24 |
| Finished | Sep 11 08:35:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4009912014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_ tx_rx_disruption.4009912014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.1355448659 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 588414736 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:35:52 AM UTC 24 |
| Finished | Sep 11 08:35:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1355448659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.1355448659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.1187504988 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 208972349 ps |
| CPU time | 0.96 seconds |
| Started | Sep 11 08:35:52 AM UTC 24 |
| Finished | Sep 11 08:35:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187504988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.1187504988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.2640486646 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 257729722 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:35:52 AM UTC 24 |
| Finished | Sep 11 08:35:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640486646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 117.usbdev_fifo_levels.2640486646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.4086104892 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 508493981 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:35:52 AM UTC 24 |
| Finished | Sep 11 08:35:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4086104892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.4086104892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.3744263514 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 491165913 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:35:52 AM UTC 24 |
| Finished | Sep 11 08:35:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3744263514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.3744263514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.3734582433 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 267753448 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:35:52 AM UTC 24 |
| Finished | Sep 11 08:35:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734582433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.3734582433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.963624300 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 626059967 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:35:56 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=963624300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_t x_rx_disruption.963624300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.723828890 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 68925178 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:24:55 AM UTC 24 |
| Finished | Sep 11 08:24:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=723828890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.723828890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.1788718479 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 11871467323 ps |
| CPU time | 21.21 seconds |
| Started | Sep 11 08:24:38 AM UTC 24 |
| Finished | Sep 11 08:25:00 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788718479 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.1788718479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.2893741757 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 19069292921 ps |
| CPU time | 26.64 seconds |
| Started | Sep 11 08:24:39 AM UTC 24 |
| Finished | Sep 11 08:25:07 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893741757 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.2893741757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.301010985 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 26202303221 ps |
| CPU time | 41.21 seconds |
| Started | Sep 11 08:24:39 AM UTC 24 |
| Finished | Sep 11 08:25:22 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=301010985 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.301010985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.1748256818 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 164081747 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:24:39 AM UTC 24 |
| Finished | Sep 11 08:24:42 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748256818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_av_buffer.1748256818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.2144136867 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 152003774 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:24:39 AM UTC 24 |
| Finished | Sep 11 08:24:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2144136867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.2144136867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.1069844237 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 388215265 ps |
| CPU time | 2.27 seconds |
| Started | Sep 11 08:24:39 AM UTC 24 |
| Finished | Sep 11 08:24:43 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1069844237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_data_toggle_clear.1069844237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.2938382327 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 368282148 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:24:39 AM UTC 24 |
| Finished | Sep 11 08:24:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938382327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.2938382327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.4013123202 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 44644730344 ps |
| CPU time | 94.22 seconds |
| Started | Sep 11 08:24:41 AM UTC 24 |
| Finished | Sep 11 08:26:17 AM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4013123202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.4013123202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.2261037784 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 1316341603 ps |
| CPU time | 33.53 seconds |
| Started | Sep 11 08:24:41 AM UTC 24 |
| Finished | Sep 11 08:25:16 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2261037784 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.2261037784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.1824424002 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 618894701 ps |
| CPU time | 3.12 seconds |
| Started | Sep 11 08:24:41 AM UTC 24 |
| Finished | Sep 11 08:24:45 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824424002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_disable_endpoint.1824424002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.2113251125 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 137732648 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:24:41 AM UTC 24 |
| Finished | Sep 11 08:24:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113251125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.2113251125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_enable.4226642623 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 87268618 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:24:41 AM UTC 24 |
| Finished | Sep 11 08:24:43 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226642623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_enable.4226642623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.3909990785 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 958924212 ps |
| CPU time | 3.85 seconds |
| Started | Sep 11 08:24:43 AM UTC 24 |
| Finished | Sep 11 08:24:47 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909990785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.3909990785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.2057788929 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 735289905 ps |
| CPU time | 2.45 seconds |
| Started | Sep 11 08:24:43 AM UTC 24 |
| Finished | Sep 11 08:24:46 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057788929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.2057788929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.414099677 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 255015784 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:24:43 AM UTC 24 |
| Finished | Sep 11 08:24:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=414099677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_fifo_levels.414099677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.2300803077 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 467415484 ps |
| CPU time | 3.87 seconds |
| Started | Sep 11 08:24:43 AM UTC 24 |
| Finished | Sep 11 08:24:48 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300803077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_fifo_rst.2300803077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.3161114921 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 224246259 ps |
| CPU time | 1.97 seconds |
| Started | Sep 11 08:24:43 AM UTC 24 |
| Finished | Sep 11 08:24:46 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3161114921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.3161114921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.757721475 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 160927205 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:24:45 AM UTC 24 |
| Finished | Sep 11 08:24:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=757721475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_stall.757721475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.2250078689 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 172479438 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:24:45 AM UTC 24 |
| Finished | Sep 11 08:24:47 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250078689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.2250078689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.2843332826 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 4081283805 ps |
| CPU time | 108.77 seconds |
| Started | Sep 11 08:24:43 AM UTC 24 |
| Finished | Sep 11 08:26:34 AM UTC 24 |
| Peak memory | 229728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843332826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.2843332826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.3021057315 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 13815840900 ps |
| CPU time | 110.32 seconds |
| Started | Sep 11 08:24:45 AM UTC 24 |
| Finished | Sep 11 08:26:38 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021057315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.3021057315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.1153338811 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 189098531 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:24:45 AM UTC 24 |
| Finished | Sep 11 08:24:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153338811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_in_err.1153338811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.2102933189 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 6206564077 ps |
| CPU time | 11.71 seconds |
| Started | Sep 11 08:24:45 AM UTC 24 |
| Finished | Sep 11 08:24:58 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102933189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.2102933189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.479589184 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 3461489469 ps |
| CPU time | 7.33 seconds |
| Started | Sep 11 08:24:45 AM UTC 24 |
| Finished | Sep 11 08:24:53 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=479589184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_suspend.479589184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.4200707086 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 2445801929 ps |
| CPU time | 72.98 seconds |
| Started | Sep 11 08:24:45 AM UTC 24 |
| Finished | Sep 11 08:26:00 AM UTC 24 |
| Peak memory | 229780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200707086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.4200707086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.983719350 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 2432059889 ps |
| CPU time | 24.04 seconds |
| Started | Sep 11 08:24:45 AM UTC 24 |
| Finished | Sep 11 08:25:10 AM UTC 24 |
| Peak memory | 227360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=983719350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.983719350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.242684835 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 268492924 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:24:45 AM UTC 24 |
| Finished | Sep 11 08:24:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=242684835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.242684835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.1973227963 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 191136626 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:24:47 AM UTC 24 |
| Finished | Sep 11 08:24:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973227963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.1973227963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.3847251215 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 1970175845 ps |
| CPU time | 55.42 seconds |
| Started | Sep 11 08:24:47 AM UTC 24 |
| Finished | Sep 11 08:25:44 AM UTC 24 |
| Peak memory | 227180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847251215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.3847251215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.2710259942 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 2797237075 ps |
| CPU time | 77.63 seconds |
| Started | Sep 11 08:24:47 AM UTC 24 |
| Finished | Sep 11 08:26:06 AM UTC 24 |
| Peak memory | 227692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710259942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.2710259942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.2912113289 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 3988107244 ps |
| CPU time | 32.8 seconds |
| Started | Sep 11 08:24:47 AM UTC 24 |
| Finished | Sep 11 08:25:21 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912113289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.2912113289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.1266393787 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 159558975 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:24:47 AM UTC 24 |
| Finished | Sep 11 08:24:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266393787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.1266393787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.2280049752 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 177867627 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:24:47 AM UTC 24 |
| Finished | Sep 11 08:24:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2280049752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.2280049752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.730788721 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 233948018 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:24:48 AM UTC 24 |
| Finished | Sep 11 08:24:51 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=730788721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_nak_trans.730788721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.957446711 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 174339500 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:24:48 AM UTC 24 |
| Finished | Sep 11 08:24:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=957446711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_out_iso.957446711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.1000496688 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 154234306 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:24:49 AM UTC 24 |
| Finished | Sep 11 08:24:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1000496688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_out_stall.1000496688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.3617798613 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 177352998 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:24:49 AM UTC 24 |
| Finished | Sep 11 08:24:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617798613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.3617798613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.3185542941 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 171876027 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:24:49 AM UTC 24 |
| Finished | Sep 11 08:24:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185542941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_pending_in_trans.3185542941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.809366515 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 279498799 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:24:49 AM UTC 24 |
| Finished | Sep 11 08:24:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=809366515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.809366515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.3021696513 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 142154431 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:24:49 AM UTC 24 |
| Finished | Sep 11 08:24:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021696513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.3021696513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.2067226377 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 38800295 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:24:49 AM UTC 24 |
| Finished | Sep 11 08:24:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2067226377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.2067226377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.2202672370 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 15879305746 ps |
| CPU time | 45.3 seconds |
| Started | Sep 11 08:24:50 AM UTC 24 |
| Finished | Sep 11 08:25:37 AM UTC 24 |
| Peak memory | 227656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2202672370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_pkt_buffer.2202672370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.825421980 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 183159295 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:24:50 AM UTC 24 |
| Finished | Sep 11 08:24:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825421980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_pkt_received.825421980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.389925882 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 188385205 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:24:50 AM UTC 24 |
| Finished | Sep 11 08:24:52 AM UTC 24 |
| Peak memory | 214704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=389925882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_pkt_sent.389925882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.1340181913 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 182862000 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:24:50 AM UTC 24 |
| Finished | Sep 11 08:24:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340181913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.1340181913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.3618014212 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 209660112 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:24:52 AM UTC 24 |
| Finished | Sep 11 08:24:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618014212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.3618014212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.1594255591 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 20176378658 ps |
| CPU time | 43.58 seconds |
| Started | Sep 11 08:24:52 AM UTC 24 |
| Finished | Sep 11 08:25:37 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1594255591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.1594255591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.760082411 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 159950453 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:24:52 AM UTC 24 |
| Finished | Sep 11 08:24:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=760082411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_rx_crc_err.760082411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.1222251981 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 302013883 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:24:52 AM UTC 24 |
| Finished | Sep 11 08:24:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222251981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.1222251981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.2349989094 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 153939196 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:24:52 AM UTC 24 |
| Finished | Sep 11 08:24:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349989094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.2349989094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.1440254949 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 157624041 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:24:52 AM UTC 24 |
| Finished | Sep 11 08:24:55 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1440254949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.1440254949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.1412458876 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 282551429 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:24:52 AM UTC 24 |
| Finished | Sep 11 08:24:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412458876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.1412458876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.69174300 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 2037488717 ps |
| CPU time | 14.64 seconds |
| Started | Sep 11 08:24:52 AM UTC 24 |
| Finished | Sep 11 08:25:08 AM UTC 24 |
| Peak memory | 233972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=69174300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.69174300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.3574846957 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 169895630 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:24:52 AM UTC 24 |
| Finished | Sep 11 08:24:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574846957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.3574846957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.188166816 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 206297769 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:24:54 AM UTC 24 |
| Finished | Sep 11 08:24:56 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=188166816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_stall_trans.188166816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.3087096743 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 787953457 ps |
| CPU time | 3.87 seconds |
| Started | Sep 11 08:24:54 AM UTC 24 |
| Finished | Sep 11 08:24:59 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3087096743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.3087096743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.3548712084 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 2463270749 ps |
| CPU time | 25.77 seconds |
| Started | Sep 11 08:24:54 AM UTC 24 |
| Finished | Sep 11 08:25:21 AM UTC 24 |
| Peak memory | 234092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548712084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_streaming_out.3548712084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.1506230444 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 3886831048 ps |
| CPU time | 31.89 seconds |
| Started | Sep 11 08:24:41 AM UTC 24 |
| Finished | Sep 11 08:25:14 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506230444 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.1506230444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.848178939 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 551574763 ps |
| CPU time | 3.12 seconds |
| Started | Sep 11 08:24:54 AM UTC 24 |
| Finished | Sep 11 08:24:58 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=848178939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_tx _rx_disruption.848178939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.2776742701 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 508974487 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:35:56 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2776742701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_ tx_rx_disruption.2776742701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.3621572503 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 202989345 ps |
| CPU time | 0.89 seconds |
| Started | Sep 11 08:35:56 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621572503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 121.usbdev_fifo_levels.3621572503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/121.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.3437166696 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 547787908 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:35:56 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3437166696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_ tx_rx_disruption.3437166696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.1916593433 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 189113006 ps |
| CPU time | 0.9 seconds |
| Started | Sep 11 08:35:56 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1916593433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.1916593433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.1649048221 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 327399326 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:35:57 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649048221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 122.usbdev_fifo_levels.1649048221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/122.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.890237943 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 513299468 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:35:58 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=890237943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_t x_rx_disruption.890237943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.2360329544 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 163047214 ps |
| CPU time | 0.87 seconds |
| Started | Sep 11 08:35:58 AM UTC 24 |
| Finished | Sep 11 08:35:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360329544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.2360329544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.2493749001 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 273380371 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:35:58 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493749001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 123.usbdev_fifo_levels.2493749001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.2730645103 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 586559551 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:35:58 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 214940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2730645103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_ tx_rx_disruption.2730645103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.1981838674 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 200550392 ps |
| CPU time | 0.87 seconds |
| Started | Sep 11 08:35:58 AM UTC 24 |
| Finished | Sep 11 08:35:59 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981838674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.1981838674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.3664673678 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 282339089 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:35:58 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664673678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 124.usbdev_fifo_levels.3664673678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/124.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.3189803244 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 524038373 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:35:58 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3189803244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_ tx_rx_disruption.3189803244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.2627342889 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 569217409 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:35:58 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2627342889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_ tx_rx_disruption.2627342889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.193173491 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 310824396 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:36:00 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=193173491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.193173491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.2224845318 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 537453798 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:36:00 AM UTC 24 |
| Finished | Sep 11 08:36:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2224845318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_ tx_rx_disruption.2224845318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.2944228505 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 236163598 ps |
| CPU time | 0.96 seconds |
| Started | Sep 11 08:36:00 AM UTC 24 |
| Finished | Sep 11 08:36:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2944228505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.2944228505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.2847154242 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 205345408 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847154242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 127.usbdev_fifo_levels.2847154242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/127.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.2472653642 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 508415213 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2472653642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_ tx_rx_disruption.2472653642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.81005503 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 458082406 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=81005503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.81005503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.3004347227 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 144856536 ps |
| CPU time | 0.83 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004347227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 128.usbdev_fifo_levels.3004347227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.1239852157 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 568748692 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1239852157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_ tx_rx_disruption.1239852157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.4182844082 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 282975209 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182844082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 129.usbdev_fifo_levels.4182844082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.2157865030 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 622854351 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2157865030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.2157865030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.2702149773 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 48675959 ps |
| CPU time | 1 seconds |
| Started | Sep 11 08:25:15 AM UTC 24 |
| Finished | Sep 11 08:25:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2702149773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.2702149773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.1222949409 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 5203836624 ps |
| CPU time | 8.46 seconds |
| Started | Sep 11 08:24:55 AM UTC 24 |
| Finished | Sep 11 08:25:05 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222949409 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.1222949409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.3953515892 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 19542341035 ps |
| CPU time | 26.78 seconds |
| Started | Sep 11 08:24:55 AM UTC 24 |
| Finished | Sep 11 08:25:23 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953515892 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.3953515892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.1466283806 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 23297956346 ps |
| CPU time | 33.74 seconds |
| Started | Sep 11 08:24:55 AM UTC 24 |
| Finished | Sep 11 08:25:30 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1466283806 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.1466283806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.2331279842 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 175583046 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:24:55 AM UTC 24 |
| Finished | Sep 11 08:24:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331279842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.2331279842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.909852915 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 204560904 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:24:55 AM UTC 24 |
| Finished | Sep 11 08:24:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909852915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_bitstuff_err.909852915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.3237576194 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 254313981 ps |
| CPU time | 1.97 seconds |
| Started | Sep 11 08:24:55 AM UTC 24 |
| Finished | Sep 11 08:24:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3237576194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_data_toggle_clear.3237576194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.2887451583 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 569230089 ps |
| CPU time | 2.05 seconds |
| Started | Sep 11 08:24:56 AM UTC 24 |
| Finished | Sep 11 08:24:59 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2887451583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.2887451583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.661541920 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 46035409936 ps |
| CPU time | 88.45 seconds |
| Started | Sep 11 08:24:56 AM UTC 24 |
| Finished | Sep 11 08:26:26 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=661541920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_device_address.661541920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.3993158825 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 1946153019 ps |
| CPU time | 19.49 seconds |
| Started | Sep 11 08:24:56 AM UTC 24 |
| Finished | Sep 11 08:25:16 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993158825 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.3993158825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.2078749406 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 809223665 ps |
| CPU time | 3.01 seconds |
| Started | Sep 11 08:24:57 AM UTC 24 |
| Finished | Sep 11 08:25:01 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078749406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.2078749406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.170184850 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 143466456 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:24:57 AM UTC 24 |
| Finished | Sep 11 08:24:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=170184850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_disconnected.170184850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_enable.633218299 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 35064579 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:24:58 AM UTC 24 |
| Finished | Sep 11 08:25:00 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=633218299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_enable.633218299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.2836283484 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 1062263386 ps |
| CPU time | 3.77 seconds |
| Started | Sep 11 08:24:58 AM UTC 24 |
| Finished | Sep 11 08:25:03 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836283484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.2836283484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.1003189811 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 424988993 ps |
| CPU time | 2.18 seconds |
| Started | Sep 11 08:25:00 AM UTC 24 |
| Finished | Sep 11 08:25:03 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003189811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.1003189811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.1166946621 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 310140804 ps |
| CPU time | 3.11 seconds |
| Started | Sep 11 08:25:00 AM UTC 24 |
| Finished | Sep 11 08:25:04 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166946621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.1166946621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.1280544256 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 232349059 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:25:00 AM UTC 24 |
| Finished | Sep 11 08:25:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280544256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.1280544256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.3229671635 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 168221216 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:25:00 AM UTC 24 |
| Finished | Sep 11 08:25:02 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3229671635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_stall.3229671635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.487995543 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 210558347 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:25:00 AM UTC 24 |
| Finished | Sep 11 08:25:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487995543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_in_trans.487995543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.2716060561 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 4906664270 ps |
| CPU time | 47.24 seconds |
| Started | Sep 11 08:25:00 AM UTC 24 |
| Finished | Sep 11 08:25:49 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716060561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.2716060561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.1101473643 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 9645870968 ps |
| CPU time | 75.46 seconds |
| Started | Sep 11 08:25:01 AM UTC 24 |
| Finished | Sep 11 08:26:18 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101473643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.1101473643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.1087108558 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 258576558 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:25:01 AM UTC 24 |
| Finished | Sep 11 08:25:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1087108558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_in_err.1087108558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.2928815982 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 12765713955 ps |
| CPU time | 24.54 seconds |
| Started | Sep 11 08:25:02 AM UTC 24 |
| Finished | Sep 11 08:25:28 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928815982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.2928815982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.849092018 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 9922906806 ps |
| CPU time | 18.3 seconds |
| Started | Sep 11 08:25:03 AM UTC 24 |
| Finished | Sep 11 08:25:22 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=849092018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_suspend.849092018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.2093579759 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 5634231846 ps |
| CPU time | 50.91 seconds |
| Started | Sep 11 08:25:04 AM UTC 24 |
| Finished | Sep 11 08:25:56 AM UTC 24 |
| Peak memory | 229740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093579759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.2093579759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.3077941862 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 2520648834 ps |
| CPU time | 66.81 seconds |
| Started | Sep 11 08:25:04 AM UTC 24 |
| Finished | Sep 11 08:26:12 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3077941862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.3077941862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.3398152322 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 283251707 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:25:04 AM UTC 24 |
| Finished | Sep 11 08:25:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398152322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.3398152322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.2922482244 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 215144999 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:25:04 AM UTC 24 |
| Finished | Sep 11 08:25:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2922482244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.2922482244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.3382139327 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 2183510884 ps |
| CPU time | 55.64 seconds |
| Started | Sep 11 08:25:04 AM UTC 24 |
| Finished | Sep 11 08:26:01 AM UTC 24 |
| Peak memory | 227620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3382139327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.3382139327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.3913256086 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 2819937434 ps |
| CPU time | 75.93 seconds |
| Started | Sep 11 08:25:04 AM UTC 24 |
| Finished | Sep 11 08:26:22 AM UTC 24 |
| Peak memory | 234260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3913256086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.3913256086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.3327353227 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 2680342739 ps |
| CPU time | 18.65 seconds |
| Started | Sep 11 08:25:04 AM UTC 24 |
| Finished | Sep 11 08:25:24 AM UTC 24 |
| Peak memory | 227584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3327353227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.3327353227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.3960957961 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 151661553 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:25:06 AM UTC 24 |
| Finished | Sep 11 08:25:08 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960957961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.3960957961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.3017445796 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 141924616 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:25:06 AM UTC 24 |
| Finished | Sep 11 08:25:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017445796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.3017445796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.1843880085 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 224474757 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:25:06 AM UTC 24 |
| Finished | Sep 11 08:25:09 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843880085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.1843880085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.1038764086 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 169933648 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:25:06 AM UTC 24 |
| Finished | Sep 11 08:25:08 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038764086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_out_iso.1038764086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.1036524800 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 156720803 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:25:06 AM UTC 24 |
| Finished | Sep 11 08:25:09 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036524800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_out_stall.1036524800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.3785631878 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 190216003 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:25:07 AM UTC 24 |
| Finished | Sep 11 08:25:10 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785631878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.3785631878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.1625301758 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 215215913 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:25:07 AM UTC 24 |
| Finished | Sep 11 08:25:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625301758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.1625301758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.3590815752 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 222792675 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:25:09 AM UTC 24 |
| Finished | Sep 11 08:25:12 AM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590815752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.3590815752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.1782627416 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 151719194 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:25:09 AM UTC 24 |
| Finished | Sep 11 08:25:11 AM UTC 24 |
| Peak memory | 214952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1782627416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.1782627416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.4080928436 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 43294647 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:25:09 AM UTC 24 |
| Finished | Sep 11 08:25:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4080928436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.4080928436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.2894734860 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 7244768366 ps |
| CPU time | 30.13 seconds |
| Started | Sep 11 08:25:09 AM UTC 24 |
| Finished | Sep 11 08:25:40 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894734860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.2894734860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.1175535712 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 143251907 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:25:09 AM UTC 24 |
| Finished | Sep 11 08:25:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175535712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_pkt_received.1175535712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.1780631115 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 217399930 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:25:09 AM UTC 24 |
| Finished | Sep 11 08:25:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1780631115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_pkt_sent.1780631115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.3689300400 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 168656122 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:25:09 AM UTC 24 |
| Finished | Sep 11 08:25:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689300400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.3689300400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.3237863227 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 184852986 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:25:10 AM UTC 24 |
| Finished | Sep 11 08:25:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3237863227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.3237863227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.3907539446 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 20175137979 ps |
| CPU time | 29.06 seconds |
| Started | Sep 11 08:25:12 AM UTC 24 |
| Finished | Sep 11 08:25:42 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907539446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.3907539446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.2581307880 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 187699369 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:25:12 AM UTC 24 |
| Finished | Sep 11 08:25:14 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2581307880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.2581307880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.530287244 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 285908394 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:25:12 AM UTC 24 |
| Finished | Sep 11 08:25:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=530287244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_rx_full.530287244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.1362985978 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 149295965 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:25:12 AM UTC 24 |
| Finished | Sep 11 08:25:14 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1362985978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.1362985978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.2620905925 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 149064634 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:25:12 AM UTC 24 |
| Finished | Sep 11 08:25:15 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620905925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.2620905925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.383539846 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 263555108 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:25:12 AM UTC 24 |
| Finished | Sep 11 08:25:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383539846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.383539846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.3521132821 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 2788718924 ps |
| CPU time | 22.85 seconds |
| Started | Sep 11 08:25:12 AM UTC 24 |
| Finished | Sep 11 08:25:36 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3521132821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.3521132821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.2425959937 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 170368896 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:25:13 AM UTC 24 |
| Finished | Sep 11 08:25:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425959937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.2425959937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.3348345742 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 162586715 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:25:13 AM UTC 24 |
| Finished | Sep 11 08:25:16 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348345742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.3348345742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.933898264 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 1023745221 ps |
| CPU time | 2.54 seconds |
| Started | Sep 11 08:25:14 AM UTC 24 |
| Finished | Sep 11 08:25:17 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=933898264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_stream_len_max.933898264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.1855363124 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 1899664592 ps |
| CPU time | 20.3 seconds |
| Started | Sep 11 08:25:14 AM UTC 24 |
| Finished | Sep 11 08:25:35 AM UTC 24 |
| Peak memory | 234096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855363124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.1855363124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.3495008759 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 4300144427 ps |
| CPU time | 37.72 seconds |
| Started | Sep 11 08:24:57 AM UTC 24 |
| Finished | Sep 11 08:25:36 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495008759 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.3495008759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.1273456567 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 456791826 ps |
| CPU time | 2.7 seconds |
| Started | Sep 11 08:25:15 AM UTC 24 |
| Finished | Sep 11 08:25:18 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1273456567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.1273456567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.2572807612 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 448658237 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572807612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.2572807612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.3069315926 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 536118965 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3069315926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.3069315926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.3147474187 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 357416943 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3147474187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.3147474187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.2440522539 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 250160968 ps |
| CPU time | 1.02 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2440522539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 131.usbdev_fifo_levels.2440522539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/131.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.3483848305 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 558589604 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3483848305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_ tx_rx_disruption.3483848305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.2845309365 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 542678983 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:36:02 AM UTC 24 |
| Finished | Sep 11 08:36:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845309365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.2845309365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.497767991 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 569765834 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:36:05 AM UTC 24 |
| Finished | Sep 11 08:36:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=497767991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_t x_rx_disruption.497767991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.3518620046 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 190126609 ps |
| CPU time | 0.8 seconds |
| Started | Sep 11 08:36:05 AM UTC 24 |
| Finished | Sep 11 08:36:09 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3518620046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.3518620046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.2085816544 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 558838763 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:36:06 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2085816544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_ tx_rx_disruption.2085816544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.281750609 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 269282919 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:36:06 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=281750609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.281750609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.3129259767 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 166782778 ps |
| CPU time | 0.81 seconds |
| Started | Sep 11 08:36:06 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129259767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 134.usbdev_fifo_levels.3129259767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.3066439256 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 577687051 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:36:06 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3066439256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.3066439256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.507083660 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 535774216 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:36:06 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=507083660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_t x_rx_disruption.507083660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.81489988 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 179467650 ps |
| CPU time | 0.9 seconds |
| Started | Sep 11 08:36:06 AM UTC 24 |
| Finished | Sep 11 08:36:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=81489988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.81489988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.1422159982 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 264643779 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:36:06 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422159982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 136.usbdev_fifo_levels.1422159982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/136.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.3370615646 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 478854624 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:36:10 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3370615646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.3370615646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.905333446 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 497133560 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:36:11 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=905333446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_t x_rx_disruption.905333446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.2976101472 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 411601914 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:36:11 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976101472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.2976101472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.268807053 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 224533114 ps |
| CPU time | 0.94 seconds |
| Started | Sep 11 08:36:12 AM UTC 24 |
| Finished | Sep 11 08:36:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=268807053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 138.usbdev_fifo_levels.268807053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/138.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.2701925240 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 450249423 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2701925240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.2701925240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.1502674081 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 172675478 ps |
| CPU time | 0.81 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1502674081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 139.usbdev_fifo_levels.1502674081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/139.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.2606579624 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 440252399 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2606579624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.2606579624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.4060480861 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 88382817 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:25:37 AM UTC 24 |
| Finished | Sep 11 08:25:40 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060480861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.4060480861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.2504877688 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 6115529311 ps |
| CPU time | 13.47 seconds |
| Started | Sep 11 08:25:16 AM UTC 24 |
| Finished | Sep 11 08:25:31 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504877688 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.2504877688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.34099533 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 14448175335 ps |
| CPU time | 30.81 seconds |
| Started | Sep 11 08:25:16 AM UTC 24 |
| Finished | Sep 11 08:25:48 AM UTC 24 |
| Peak memory | 227304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=34099533 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.34099533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.3369345386 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 31053666431 ps |
| CPU time | 51.29 seconds |
| Started | Sep 11 08:25:16 AM UTC 24 |
| Finished | Sep 11 08:26:09 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369345386 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.3369345386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.2875821112 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 175426516 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:25:18 AM UTC 24 |
| Finished | Sep 11 08:25:21 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875821112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_av_buffer.2875821112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.252130189 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 175969138 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:25:18 AM UTC 24 |
| Finished | Sep 11 08:25:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=252130189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_bitstuff_err.252130189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.2283271636 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 178970778 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:25:18 AM UTC 24 |
| Finished | Sep 11 08:25:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283271636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_data_toggle_clear.2283271636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.3021835817 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 413124630 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:25:18 AM UTC 24 |
| Finished | Sep 11 08:25:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021835817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.3021835817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.1190283960 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 17640158286 ps |
| CPU time | 34.98 seconds |
| Started | Sep 11 08:25:18 AM UTC 24 |
| Finished | Sep 11 08:25:55 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190283960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.1190283960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.1253352833 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 1135972151 ps |
| CPU time | 24.57 seconds |
| Started | Sep 11 08:25:18 AM UTC 24 |
| Finished | Sep 11 08:25:44 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253352833 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.1253352833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.346491562 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 717631515 ps |
| CPU time | 1.94 seconds |
| Started | Sep 11 08:25:19 AM UTC 24 |
| Finished | Sep 11 08:25:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=346491562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disable_endpoint.346491562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.450183692 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 172732883 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:25:20 AM UTC 24 |
| Finished | Sep 11 08:25:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=450183692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_disconnected.450183692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_enable.3858130990 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 43596968 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:25:20 AM UTC 24 |
| Finished | Sep 11 08:25:22 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858130990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.3858130990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.983466958 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 971574591 ps |
| CPU time | 4.04 seconds |
| Started | Sep 11 08:25:21 AM UTC 24 |
| Finished | Sep 11 08:25:26 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=983466958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.983466958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.2030056054 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 393662903 ps |
| CPU time | 1.92 seconds |
| Started | Sep 11 08:25:21 AM UTC 24 |
| Finished | Sep 11 08:25:24 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2030056054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.2030056054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.2729143397 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 511406850 ps |
| CPU time | 3.44 seconds |
| Started | Sep 11 08:25:21 AM UTC 24 |
| Finished | Sep 11 08:25:26 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729143397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.2729143397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.290350080 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 169497998 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:25:23 AM UTC 24 |
| Finished | Sep 11 08:25:26 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=290350080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.290350080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.3778799744 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 159877190 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:25:23 AM UTC 24 |
| Finished | Sep 11 08:25:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778799744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.3778799744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.3319068039 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 182686848 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:25:23 AM UTC 24 |
| Finished | Sep 11 08:25:26 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3319068039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_trans.3319068039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.2875193531 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 3952213386 ps |
| CPU time | 109.85 seconds |
| Started | Sep 11 08:25:21 AM UTC 24 |
| Finished | Sep 11 08:27:13 AM UTC 24 |
| Peak memory | 234300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875193531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.2875193531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.851946426 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 13931236301 ps |
| CPU time | 100.63 seconds |
| Started | Sep 11 08:25:23 AM UTC 24 |
| Finished | Sep 11 08:27:06 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=851946426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.851946426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.1023041131 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 220729590 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:25:23 AM UTC 24 |
| Finished | Sep 11 08:25:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023041131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.1023041131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.2110919206 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 6852642340 ps |
| CPU time | 15.97 seconds |
| Started | Sep 11 08:25:23 AM UTC 24 |
| Finished | Sep 11 08:25:41 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2110919206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.2110919206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.3429187668 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 9522389035 ps |
| CPU time | 13.07 seconds |
| Started | Sep 11 08:25:23 AM UTC 24 |
| Finished | Sep 11 08:25:38 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429187668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.3429187668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.3952753239 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 2922792680 ps |
| CPU time | 29.02 seconds |
| Started | Sep 11 08:25:25 AM UTC 24 |
| Finished | Sep 11 08:25:55 AM UTC 24 |
| Peak memory | 234116 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952753239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.3952753239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.3763892792 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 2917903931 ps |
| CPU time | 79.99 seconds |
| Started | Sep 11 08:25:25 AM UTC 24 |
| Finished | Sep 11 08:26:46 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763892792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.3763892792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.4131494336 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 256425264 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:25:25 AM UTC 24 |
| Finished | Sep 11 08:25:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4131494336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.4131494336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.2597758885 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 200035350 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:25:26 AM UTC 24 |
| Finished | Sep 11 08:25:28 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597758885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.2597758885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.2198662814 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 2659341406 ps |
| CPU time | 69.8 seconds |
| Started | Sep 11 08:25:26 AM UTC 24 |
| Finished | Sep 11 08:26:38 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198662814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.2198662814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.2293104369 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 2264366734 ps |
| CPU time | 64.1 seconds |
| Started | Sep 11 08:25:26 AM UTC 24 |
| Finished | Sep 11 08:26:32 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2293104369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.2293104369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.364965971 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 1869029810 ps |
| CPU time | 55.02 seconds |
| Started | Sep 11 08:25:26 AM UTC 24 |
| Finished | Sep 11 08:26:23 AM UTC 24 |
| Peak memory | 227332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=364965971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.364965971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.2155836112 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 160427094 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:25:27 AM UTC 24 |
| Finished | Sep 11 08:25:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155836112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.2155836112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.406329123 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 203839702 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:25:28 AM UTC 24 |
| Finished | Sep 11 08:25:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=406329123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.406329123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.4135468897 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 180502372 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:25:28 AM UTC 24 |
| Finished | Sep 11 08:25:30 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135468897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.4135468897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.1566106852 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 157058979 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:25:28 AM UTC 24 |
| Finished | Sep 11 08:25:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566106852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_out_stall.1566106852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.2024246690 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 190060573 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:25:29 AM UTC 24 |
| Finished | Sep 11 08:25:31 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2024246690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.2024246690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.3974953674 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 151667121 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:25:30 AM UTC 24 |
| Finished | Sep 11 08:25:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974953674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.3974953674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.3345194225 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 202389560 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:25:30 AM UTC 24 |
| Finished | Sep 11 08:25:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3345194225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.3345194225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.1034017307 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 143831309 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:25:32 AM UTC 24 |
| Finished | Sep 11 08:25:34 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1034017307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.1034017307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.4232075014 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 74293485 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:25:32 AM UTC 24 |
| Finished | Sep 11 08:25:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232075014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.4232075014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.986995688 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 9515991612 ps |
| CPU time | 24.76 seconds |
| Started | Sep 11 08:25:32 AM UTC 24 |
| Finished | Sep 11 08:25:58 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=986995688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_pkt_buffer.986995688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.2978844762 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 210294467 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:25:32 AM UTC 24 |
| Finished | Sep 11 08:25:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978844762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.2978844762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.1637008348 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 207292029 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:25:32 AM UTC 24 |
| Finished | Sep 11 08:25:34 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637008348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.1637008348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.2680477271 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 228072290 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:25:32 AM UTC 24 |
| Finished | Sep 11 08:25:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680477271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_random_length_in_transaction.2680477271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.12207040 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 194165336 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:25:32 AM UTC 24 |
| Finished | Sep 11 08:25:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12207040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.12207040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.4026025383 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 20206865767 ps |
| CPU time | 33.77 seconds |
| Started | Sep 11 08:25:33 AM UTC 24 |
| Finished | Sep 11 08:26:08 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026025383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.4026025383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.3969035392 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 144463020 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:25:33 AM UTC 24 |
| Finished | Sep 11 08:25:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3969035392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_rx_crc_err.3969035392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.328012545 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 361178475 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:25:34 AM UTC 24 |
| Finished | Sep 11 08:25:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=328012545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_rx_full.328012545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.3582539539 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 159408746 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:25:34 AM UTC 24 |
| Finished | Sep 11 08:25:37 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582539539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.3582539539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.3139287326 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 147773056 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:25:36 AM UTC 24 |
| Finished | Sep 11 08:25:38 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3139287326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 14.usbdev_setup_trans_ignored.3139287326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.1415419893 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 201017935 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:25:36 AM UTC 24 |
| Finished | Sep 11 08:25:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1415419893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.1415419893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.2630675004 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 3312531397 ps |
| CPU time | 97.15 seconds |
| Started | Sep 11 08:25:36 AM UTC 24 |
| Finished | Sep 11 08:27:15 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2630675004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.2630675004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.310935740 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 164829539 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:25:36 AM UTC 24 |
| Finished | Sep 11 08:25:38 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=310935740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.310935740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.1726055957 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 202901818 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:25:36 AM UTC 24 |
| Finished | Sep 11 08:25:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726055957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.1726055957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.2660213758 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 631904800 ps |
| CPU time | 3.29 seconds |
| Started | Sep 11 08:25:37 AM UTC 24 |
| Finished | Sep 11 08:25:42 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660213758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.2660213758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.1299142703 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 3680784101 ps |
| CPU time | 100.72 seconds |
| Started | Sep 11 08:25:36 AM UTC 24 |
| Finished | Sep 11 08:27:19 AM UTC 24 |
| Peak memory | 227720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1299142703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.1299142703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.1065818247 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 6103828286 ps |
| CPU time | 50.67 seconds |
| Started | Sep 11 08:25:18 AM UTC 24 |
| Finished | Sep 11 08:26:11 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065818247 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.1065818247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.839165277 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 468456025 ps |
| CPU time | 2.74 seconds |
| Started | Sep 11 08:25:37 AM UTC 24 |
| Finished | Sep 11 08:25:41 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=839165277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_tx _rx_disruption.839165277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.3874323856 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 603243151 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874323856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.3874323856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.3486908682 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 306693777 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486908682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 140.usbdev_fifo_levels.3486908682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.3198790492 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 459143979 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3198790492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.3198790492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.2815384763 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 204040687 ps |
| CPU time | 0.95 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815384763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.2815384763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.4246279379 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 649971952 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4246279379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.4246279379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.2387543272 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 617271050 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2387543272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.2387543272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.410604138 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 480511173 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=410604138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_t x_rx_disruption.410604138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.76099813 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 160924334 ps |
| CPU time | 0.82 seconds |
| Started | Sep 11 08:36:13 AM UTC 24 |
| Finished | Sep 11 08:36:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=76099813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.76099813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.528357519 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 281557373 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:36:15 AM UTC 24 |
| Finished | Sep 11 08:36:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528357519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 146.usbdev_fifo_levels.528357519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.2268882787 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 480099050 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:36:15 AM UTC 24 |
| Finished | Sep 11 08:36:25 AM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2268882787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.2268882787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.1310791812 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 712972031 ps |
| CPU time | 1.9 seconds |
| Started | Sep 11 08:36:15 AM UTC 24 |
| Finished | Sep 11 08:36:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310791812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.1310791812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.3150013220 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 283523379 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:36:15 AM UTC 24 |
| Finished | Sep 11 08:36:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150013220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 147.usbdev_fifo_levels.3150013220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.1642656193 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 644820660 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:36:16 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1642656193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.1642656193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.2120065398 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 525841294 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:36:16 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2120065398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.2120065398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.1625523739 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 268800838 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:36:16 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625523739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 149.usbdev_fifo_levels.1625523739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.2660664125 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 454420242 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:36:16 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2660664125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.2660664125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.1482472272 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 57780365 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:25:56 AM UTC 24 |
| Finished | Sep 11 08:25:58 AM UTC 24 |
| Peak memory | 214760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482472272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.1482472272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.2793150661 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 4166296180 ps |
| CPU time | 8.76 seconds |
| Started | Sep 11 08:25:37 AM UTC 24 |
| Finished | Sep 11 08:25:47 AM UTC 24 |
| Peak memory | 227392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2793150661 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.2793150661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.533204028 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 14201127788 ps |
| CPU time | 18.59 seconds |
| Started | Sep 11 08:25:37 AM UTC 24 |
| Finished | Sep 11 08:25:57 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=533204028 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.533204028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.2576577696 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 25496844586 ps |
| CPU time | 43.84 seconds |
| Started | Sep 11 08:25:39 AM UTC 24 |
| Finished | Sep 11 08:26:25 AM UTC 24 |
| Peak memory | 227304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576577696 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.2576577696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.2855111504 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 154330784 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:25:39 AM UTC 24 |
| Finished | Sep 11 08:25:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855111504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.2855111504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.4078367667 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 158203170 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:25:39 AM UTC 24 |
| Finished | Sep 11 08:25:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4078367667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.4078367667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.4279845156 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 270431622 ps |
| CPU time | 1.94 seconds |
| Started | Sep 11 08:25:39 AM UTC 24 |
| Finished | Sep 11 08:25:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279845156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.4279845156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.2245172489 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 1023453168 ps |
| CPU time | 4.65 seconds |
| Started | Sep 11 08:25:39 AM UTC 24 |
| Finished | Sep 11 08:25:45 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245172489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.2245172489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.838232439 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 1526546484 ps |
| CPU time | 11.25 seconds |
| Started | Sep 11 08:25:40 AM UTC 24 |
| Finished | Sep 11 08:25:52 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=838232439 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.838232439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.4113369933 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 502328632 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:25:41 AM UTC 24 |
| Finished | Sep 11 08:25:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4113369933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.4113369933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.2583620930 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 163482655 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:25:42 AM UTC 24 |
| Finished | Sep 11 08:25:45 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2583620930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.2583620930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_enable.447535968 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 40745142 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:25:42 AM UTC 24 |
| Finished | Sep 11 08:25:44 AM UTC 24 |
| Peak memory | 214720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=447535968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_enable.447535968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.4167191768 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 978917126 ps |
| CPU time | 3.07 seconds |
| Started | Sep 11 08:25:42 AM UTC 24 |
| Finished | Sep 11 08:25:46 AM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4167191768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.4167191768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.3884696084 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 324182674 ps |
| CPU time | 2.06 seconds |
| Started | Sep 11 08:25:42 AM UTC 24 |
| Finished | Sep 11 08:25:45 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884696084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.3884696084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.1705081874 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 217377459 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:25:42 AM UTC 24 |
| Finished | Sep 11 08:25:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705081874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_fifo_levels.1705081874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.4022035391 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 391980675 ps |
| CPU time | 2.7 seconds |
| Started | Sep 11 08:25:43 AM UTC 24 |
| Finished | Sep 11 08:25:46 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4022035391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.4022035391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.2352906811 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 228603581 ps |
| CPU time | 1.92 seconds |
| Started | Sep 11 08:25:44 AM UTC 24 |
| Finished | Sep 11 08:25:47 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352906811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.2352906811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.1496107088 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 135680669 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:25:44 AM UTC 24 |
| Finished | Sep 11 08:25:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496107088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.1496107088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.1909921105 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 225220554 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:25:45 AM UTC 24 |
| Finished | Sep 11 08:25:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1909921105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_trans.1909921105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.2576979290 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 4173448310 ps |
| CPU time | 41.92 seconds |
| Started | Sep 11 08:25:44 AM UTC 24 |
| Finished | Sep 11 08:26:27 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576979290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.2576979290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.3101359111 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 10852083307 ps |
| CPU time | 128.35 seconds |
| Started | Sep 11 08:25:45 AM UTC 24 |
| Finished | Sep 11 08:27:56 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101359111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.3101359111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.2614199415 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 215522497 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:25:45 AM UTC 24 |
| Finished | Sep 11 08:25:48 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614199415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_in_err.2614199415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.2350397874 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 7457364916 ps |
| CPU time | 11.88 seconds |
| Started | Sep 11 08:25:45 AM UTC 24 |
| Finished | Sep 11 08:25:59 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350397874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_resume.2350397874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.801530865 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 9079527459 ps |
| CPU time | 17.16 seconds |
| Started | Sep 11 08:25:46 AM UTC 24 |
| Finished | Sep 11 08:26:04 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=801530865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_suspend.801530865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.3227996247 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 3556987044 ps |
| CPU time | 34.08 seconds |
| Started | Sep 11 08:25:47 AM UTC 24 |
| Finished | Sep 11 08:26:22 AM UTC 24 |
| Peak memory | 227676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3227996247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.3227996247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.2797180824 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 1879594017 ps |
| CPU time | 45.82 seconds |
| Started | Sep 11 08:25:47 AM UTC 24 |
| Finished | Sep 11 08:26:34 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797180824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.2797180824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.2955231301 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 241557909 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:25:47 AM UTC 24 |
| Finished | Sep 11 08:25:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955231301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.2955231301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.59294882 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 203642452 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:25:47 AM UTC 24 |
| Finished | Sep 11 08:25:49 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=59294882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.59294882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.84448691 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 2957899746 ps |
| CPU time | 72.35 seconds |
| Started | Sep 11 08:25:47 AM UTC 24 |
| Finished | Sep 11 08:27:01 AM UTC 24 |
| Peak memory | 234224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84448691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.84448691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.4156340595 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 2099516778 ps |
| CPU time | 58.47 seconds |
| Started | Sep 11 08:25:48 AM UTC 24 |
| Finished | Sep 11 08:26:48 AM UTC 24 |
| Peak memory | 233920 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156340595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.4156340595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.3897052011 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 166086565 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:25:48 AM UTC 24 |
| Finished | Sep 11 08:25:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897052011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.3897052011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.2448072712 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 157838888 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:25:48 AM UTC 24 |
| Finished | Sep 11 08:25:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448072712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.2448072712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.3645554816 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 170246420 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:25:49 AM UTC 24 |
| Finished | Sep 11 08:25:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3645554816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_nak_trans.3645554816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.3156938876 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 221362215 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:25:49 AM UTC 24 |
| Finished | Sep 11 08:25:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156938876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.3156938876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.3935233809 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 171478345 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:25:49 AM UTC 24 |
| Finished | Sep 11 08:25:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935233809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.3935233809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.769813837 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 198697249 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:25:50 AM UTC 24 |
| Finished | Sep 11 08:25:52 AM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=769813837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_out_trans_nak.769813837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.2920687209 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 187130712 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:25:50 AM UTC 24 |
| Finished | Sep 11 08:25:52 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920687209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.2920687209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.295221995 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 272892834 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:25:50 AM UTC 24 |
| Finished | Sep 11 08:25:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=295221995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.295221995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.2693971589 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 148487405 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:25:50 AM UTC 24 |
| Finished | Sep 11 08:25:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2693971589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.2693971589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.24467750 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 106422148 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:25:50 AM UTC 24 |
| Finished | Sep 11 08:25:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24467750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_phy_pins_sense.24467750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.2932963496 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 9371564954 ps |
| CPU time | 26.07 seconds |
| Started | Sep 11 08:25:51 AM UTC 24 |
| Finished | Sep 11 08:26:19 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932963496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.2932963496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.773535157 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 233361473 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:25:52 AM UTC 24 |
| Finished | Sep 11 08:25:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=773535157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_pkt_received.773535157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.1948468002 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 213389631 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:25:52 AM UTC 24 |
| Finished | Sep 11 08:25:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1948468002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_pkt_sent.1948468002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.3501725559 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 183689677 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:25:52 AM UTC 24 |
| Finished | Sep 11 08:25:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3501725559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.3501725559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.620219663 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 172352966 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:25:52 AM UTC 24 |
| Finished | Sep 11 08:25:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=620219663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.620219663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.1422689757 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 20184076332 ps |
| CPU time | 34.84 seconds |
| Started | Sep 11 08:25:52 AM UTC 24 |
| Finished | Sep 11 08:26:28 AM UTC 24 |
| Peak memory | 217276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422689757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.1422689757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.3818116600 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 154003819 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:25:53 AM UTC 24 |
| Finished | Sep 11 08:25:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818116600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.3818116600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.2440468413 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 301043331 ps |
| CPU time | 2.23 seconds |
| Started | Sep 11 08:25:53 AM UTC 24 |
| Finished | Sep 11 08:25:56 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2440468413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.2440468413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.2869207995 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 141159927 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:25:53 AM UTC 24 |
| Finished | Sep 11 08:25:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869207995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.2869207995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.1570657857 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 189024506 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:25:53 AM UTC 24 |
| Finished | Sep 11 08:25:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570657857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.1570657857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.1338544419 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 180898270 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:25:53 AM UTC 24 |
| Finished | Sep 11 08:25:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1338544419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.1338544419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.3278924008 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 2287169179 ps |
| CPU time | 63.54 seconds |
| Started | Sep 11 08:25:53 AM UTC 24 |
| Finished | Sep 11 08:26:59 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278924008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.3278924008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.188933800 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 146117847 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:25:54 AM UTC 24 |
| Finished | Sep 11 08:25:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=188933800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.188933800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.425823767 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 188138671 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:25:54 AM UTC 24 |
| Finished | Sep 11 08:25:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=425823767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_stall_trans.425823767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.3998990375 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 1003055913 ps |
| CPU time | 4.45 seconds |
| Started | Sep 11 08:25:56 AM UTC 24 |
| Finished | Sep 11 08:26:02 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998990375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.3998990375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.2376821478 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 1886522349 ps |
| CPU time | 17.13 seconds |
| Started | Sep 11 08:25:56 AM UTC 24 |
| Finished | Sep 11 08:26:15 AM UTC 24 |
| Peak memory | 234212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2376821478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_streaming_out.2376821478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.1971841728 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 293229954 ps |
| CPU time | 5.01 seconds |
| Started | Sep 11 08:25:41 AM UTC 24 |
| Finished | Sep 11 08:25:47 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1971841728 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.1971841728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.4169043749 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 526962838 ps |
| CPU time | 1.93 seconds |
| Started | Sep 11 08:25:56 AM UTC 24 |
| Finished | Sep 11 08:25:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4169043749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.4169043749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.4077510385 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 289785013 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:36:16 AM UTC 24 |
| Finished | Sep 11 08:36:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4077510385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 152.usbdev_fifo_levels.4077510385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.1058105419 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 604432883 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:36:16 AM UTC 24 |
| Finished | Sep 11 08:36:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1058105419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_ tx_rx_disruption.1058105419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.862994066 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 467883593 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:36:16 AM UTC 24 |
| Finished | Sep 11 08:36:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=862994066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.862994066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.29775524 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 278420693 ps |
| CPU time | 1.02 seconds |
| Started | Sep 11 08:36:16 AM UTC 24 |
| Finished | Sep 11 08:36:19 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=29775524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 153.usbdev_fifo_levels.29775524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.497879016 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 592947741 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:36:16 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=497879016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_t x_rx_disruption.497879016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.1408215122 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 194344670 ps |
| CPU time | 0.92 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1408215122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.1408215122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.328424201 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 262621838 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=328424201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 154.usbdev_fifo_levels.328424201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.3254650033 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 664908821 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3254650033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_ tx_rx_disruption.3254650033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.3422001989 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 471726806 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422001989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.3422001989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.1865366725 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 599189862 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1865366725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_ tx_rx_disruption.1865366725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.1189810196 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 602576850 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1189810196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.1189810196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.2239249199 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 240444580 ps |
| CPU time | 0.94 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239249199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 156.usbdev_fifo_levels.2239249199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/156.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.3635295722 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 612020413 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3635295722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_ tx_rx_disruption.3635295722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.2789540643 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 381401486 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789540643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.2789540643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/157.usbdev_fifo_levels.956724949 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 238875688 ps |
| CPU time | 0.98 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=956724949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 157.usbdev_fifo_levels.956724949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/157.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.2679157453 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 514301190 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:36:18 AM UTC 24 |
| Finished | Sep 11 08:36:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2679157453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_ tx_rx_disruption.2679157453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.3310341025 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 330088698 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:36:20 AM UTC 24 |
| Finished | Sep 11 08:36:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3310341025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.3310341025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.2166055513 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 255939505 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:36:20 AM UTC 24 |
| Finished | Sep 11 08:36:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166055513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 158.usbdev_fifo_levels.2166055513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/158.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.1069129816 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 503229290 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:36:20 AM UTC 24 |
| Finished | Sep 11 08:36:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1069129816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.1069129816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.4165307706 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 652464333 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:36:20 AM UTC 24 |
| Finished | Sep 11 08:36:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165307706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.4165307706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/159.usbdev_fifo_levels.2672959886 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 289797731 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:36:20 AM UTC 24 |
| Finished | Sep 11 08:36:29 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2672959886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 159.usbdev_fifo_levels.2672959886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/159.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.1685783126 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 418925641 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:36:20 AM UTC 24 |
| Finished | Sep 11 08:36:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1685783126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_ tx_rx_disruption.1685783126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.1070957435 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 70242910 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:26:19 AM UTC 24 |
| Finished | Sep 11 08:26:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070957435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.1070957435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.2723276130 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 13428017271 ps |
| CPU time | 25.84 seconds |
| Started | Sep 11 08:25:56 AM UTC 24 |
| Finished | Sep 11 08:26:23 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723276130 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.2723276130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.2501582094 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 29019084030 ps |
| CPU time | 46.64 seconds |
| Started | Sep 11 08:25:56 AM UTC 24 |
| Finished | Sep 11 08:26:44 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2501582094 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.2501582094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.2282961227 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 146961804 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:25:58 AM UTC 24 |
| Finished | Sep 11 08:26:00 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2282961227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.2282961227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.788730890 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 142604469 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:25:58 AM UTC 24 |
| Finished | Sep 11 08:26:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=788730890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_bitstuff_err.788730890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.12551616 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 265660830 ps |
| CPU time | 1.88 seconds |
| Started | Sep 11 08:25:58 AM UTC 24 |
| Finished | Sep 11 08:26:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12551616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_clear.12551616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.1257521076 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 41480594474 ps |
| CPU time | 84.26 seconds |
| Started | Sep 11 08:25:59 AM UTC 24 |
| Finished | Sep 11 08:27:26 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1257521076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.1257521076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.3046572084 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 997835521 ps |
| CPU time | 23.56 seconds |
| Started | Sep 11 08:25:59 AM UTC 24 |
| Finished | Sep 11 08:26:24 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3046572084 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.3046572084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.1203815099 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 603893560 ps |
| CPU time | 3.06 seconds |
| Started | Sep 11 08:26:00 AM UTC 24 |
| Finished | Sep 11 08:26:04 AM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1203815099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.1203815099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.233845882 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 145183696 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:26:00 AM UTC 24 |
| Finished | Sep 11 08:26:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=233845882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_disconnected.233845882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_enable.1536926385 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 60469795 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:26:01 AM UTC 24 |
| Finished | Sep 11 08:26:03 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536926385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.1536926385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.2369819861 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 939434251 ps |
| CPU time | 3.87 seconds |
| Started | Sep 11 08:26:01 AM UTC 24 |
| Finished | Sep 11 08:26:06 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369819861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.2369819861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.816255400 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 577112515 ps |
| CPU time | 2.52 seconds |
| Started | Sep 11 08:26:01 AM UTC 24 |
| Finished | Sep 11 08:26:05 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816255400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.816255400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.309825980 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 260258435 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:26:01 AM UTC 24 |
| Finished | Sep 11 08:26:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=309825980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_fifo_levels.309825980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.280477691 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 556941119 ps |
| CPU time | 5.14 seconds |
| Started | Sep 11 08:26:02 AM UTC 24 |
| Finished | Sep 11 08:26:09 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280477691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_fifo_rst.280477691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.4075482924 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 181886223 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:26:03 AM UTC 24 |
| Finished | Sep 11 08:26:05 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075482924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.4075482924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.454641168 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 144258231 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:26:03 AM UTC 24 |
| Finished | Sep 11 08:26:05 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=454641168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_in_stall.454641168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.1843721163 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 232970263 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:26:04 AM UTC 24 |
| Finished | Sep 11 08:26:07 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843721163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.1843721163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.2101027650 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 3032475589 ps |
| CPU time | 22.02 seconds |
| Started | Sep 11 08:26:02 AM UTC 24 |
| Finished | Sep 11 08:26:26 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101027650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.2101027650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.1986940233 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 5938318134 ps |
| CPU time | 43.12 seconds |
| Started | Sep 11 08:26:04 AM UTC 24 |
| Finished | Sep 11 08:26:49 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986940233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.1986940233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.618900794 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 220783363 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:26:05 AM UTC 24 |
| Finished | Sep 11 08:26:07 AM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=618900794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_link_in_err.618900794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.4152718795 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 25570871849 ps |
| CPU time | 53.74 seconds |
| Started | Sep 11 08:26:05 AM UTC 24 |
| Finished | Sep 11 08:27:00 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152718795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_resume.4152718795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.3077643786 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 6126333341 ps |
| CPU time | 13.25 seconds |
| Started | Sep 11 08:26:05 AM UTC 24 |
| Finished | Sep 11 08:26:20 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3077643786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_link_suspend.3077643786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.2230776932 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 4467809727 ps |
| CPU time | 40.09 seconds |
| Started | Sep 11 08:26:06 AM UTC 24 |
| Finished | Sep 11 08:26:48 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2230776932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.2230776932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.4155927786 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 4146888774 ps |
| CPU time | 30.76 seconds |
| Started | Sep 11 08:26:06 AM UTC 24 |
| Finished | Sep 11 08:26:39 AM UTC 24 |
| Peak memory | 227652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4155927786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.4155927786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.3739409097 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 238748649 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:26:06 AM UTC 24 |
| Finished | Sep 11 08:26:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739409097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.3739409097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.2435201800 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 212547615 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:26:08 AM UTC 24 |
| Finished | Sep 11 08:26:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435201800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.2435201800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.1336185965 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 2903658211 ps |
| CPU time | 30.57 seconds |
| Started | Sep 11 08:26:08 AM UTC 24 |
| Finished | Sep 11 08:26:40 AM UTC 24 |
| Peak memory | 234232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336185965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.1336185965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.2419899154 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 3338615261 ps |
| CPU time | 31.08 seconds |
| Started | Sep 11 08:26:08 AM UTC 24 |
| Finished | Sep 11 08:26:41 AM UTC 24 |
| Peak memory | 229632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419899154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.2419899154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.1970629866 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 147895342 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:26:08 AM UTC 24 |
| Finished | Sep 11 08:26:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1970629866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.1970629866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.3595161340 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 149226406 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:26:08 AM UTC 24 |
| Finished | Sep 11 08:26:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595161340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.3595161340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.3335200529 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 241591979 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:26:09 AM UTC 24 |
| Finished | Sep 11 08:26:12 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3335200529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_nak_trans.3335200529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.1453302753 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 167379388 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:26:10 AM UTC 24 |
| Finished | Sep 11 08:26:12 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1453302753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_out_iso.1453302753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.2967457645 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 151530988 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:26:10 AM UTC 24 |
| Finished | Sep 11 08:26:12 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967457645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.2967457645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.270484310 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 165569068 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:26:11 AM UTC 24 |
| Finished | Sep 11 08:26:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270484310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_out_trans_nak.270484310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.178382105 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 204512451 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:26:12 AM UTC 24 |
| Finished | Sep 11 08:26:15 AM UTC 24 |
| Peak memory | 214816 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=178382105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pending_in_trans.178382105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.2634544032 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 219185411 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:26:12 AM UTC 24 |
| Finished | Sep 11 08:26:15 AM UTC 24 |
| Peak memory | 214824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634544032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.2634544032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.1126579557 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 142611882 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:26:12 AM UTC 24 |
| Finished | Sep 11 08:26:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126579557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.1126579557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.3204563996 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 46844429 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:26:12 AM UTC 24 |
| Finished | Sep 11 08:26:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204563996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.3204563996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.1862455250 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 14113030331 ps |
| CPU time | 40.42 seconds |
| Started | Sep 11 08:26:14 AM UTC 24 |
| Finished | Sep 11 08:26:56 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1862455250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.1862455250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.548434704 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 177724139 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:26:14 AM UTC 24 |
| Finished | Sep 11 08:26:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=548434704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_pkt_received.548434704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.1991970648 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 233786729 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:26:14 AM UTC 24 |
| Finished | Sep 11 08:26:16 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991970648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.1991970648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.1374288014 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 204675260 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:26:14 AM UTC 24 |
| Finished | Sep 11 08:26:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1374288014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_random_length_in_transaction.1374288014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.2129093792 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 163798811 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:26:14 AM UTC 24 |
| Finished | Sep 11 08:26:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129093792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.2129093792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.3287293757 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 20170202994 ps |
| CPU time | 32.19 seconds |
| Started | Sep 11 08:26:15 AM UTC 24 |
| Finished | Sep 11 08:26:49 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3287293757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.3287293757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.3365703290 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 177966682 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:26:15 AM UTC 24 |
| Finished | Sep 11 08:26:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365703290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.3365703290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.2405465464 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 257165591 ps |
| CPU time | 1.96 seconds |
| Started | Sep 11 08:26:15 AM UTC 24 |
| Finished | Sep 11 08:26:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2405465464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.2405465464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.807538490 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 149400557 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:26:15 AM UTC 24 |
| Finished | Sep 11 08:26:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807538490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_setup_stage.807538490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.1288124132 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 147940571 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:26:15 AM UTC 24 |
| Finished | Sep 11 08:26:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288124132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 16.usbdev_setup_trans_ignored.1288124132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.3972049397 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 260149012 ps |
| CPU time | 2 seconds |
| Started | Sep 11 08:26:17 AM UTC 24 |
| Finished | Sep 11 08:26:20 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3972049397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.3972049397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.2104606442 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 2938970128 ps |
| CPU time | 74.07 seconds |
| Started | Sep 11 08:26:17 AM UTC 24 |
| Finished | Sep 11 08:27:32 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104606442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.2104606442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.1015338082 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 208729721 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:26:19 AM UTC 24 |
| Finished | Sep 11 08:26:22 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1015338082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.1015338082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.916544509 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 186169490 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:26:19 AM UTC 24 |
| Finished | Sep 11 08:26:22 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=916544509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_stall_trans.916544509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.3331686443 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 1016245139 ps |
| CPU time | 4.06 seconds |
| Started | Sep 11 08:26:19 AM UTC 24 |
| Finished | Sep 11 08:26:24 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331686443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.3331686443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.3235742708 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 2943164598 ps |
| CPU time | 30.55 seconds |
| Started | Sep 11 08:26:19 AM UTC 24 |
| Finished | Sep 11 08:26:51 AM UTC 24 |
| Peak memory | 229508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3235742708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.3235742708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.1010133413 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 2005233854 ps |
| CPU time | 17.96 seconds |
| Started | Sep 11 08:25:59 AM UTC 24 |
| Finished | Sep 11 08:26:19 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010133413 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.1010133413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.2998661530 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 470142564 ps |
| CPU time | 2.8 seconds |
| Started | Sep 11 08:26:19 AM UTC 24 |
| Finished | Sep 11 08:26:23 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2998661530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.2998661530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.2220915112 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 227342973 ps |
| CPU time | 1 seconds |
| Started | Sep 11 08:36:20 AM UTC 24 |
| Finished | Sep 11 08:36:29 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220915112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.2220915112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.2235380729 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 598314212 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:36:20 AM UTC 24 |
| Finished | Sep 11 08:36:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2235380729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_ tx_rx_disruption.2235380729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.600300198 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 323266725 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:36:22 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=600300198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.600300198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.2517179975 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 570599841 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:36:22 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2517179975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_ tx_rx_disruption.2517179975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.2756035531 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 550106303 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:36:22 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756035531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.2756035531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.869872168 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 241280919 ps |
| CPU time | 0.88 seconds |
| Started | Sep 11 08:36:22 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=869872168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.869872168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.1184146697 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 538795778 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:36:25 AM UTC 24 |
| Finished | Sep 11 08:36:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1184146697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.1184146697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.1812285491 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 561979606 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:36:26 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812285491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.1812285491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.2455588807 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 589733827 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:36:26 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2455588807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_ tx_rx_disruption.2455588807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.2547669218 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 191887026 ps |
| CPU time | 0.85 seconds |
| Started | Sep 11 08:36:26 AM UTC 24 |
| Finished | Sep 11 08:36:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547669218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.2547669218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.1245937345 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 569967568 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:36:29 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1245937345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.1245937345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.4000190324 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 455677331 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:36:31 AM UTC 24 |
| Finished | Sep 11 08:36:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000190324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.4000190324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.3229880725 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 582242891 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:36:31 AM UTC 24 |
| Finished | Sep 11 08:36:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3229880725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.3229880725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.3872662064 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 339751368 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:36:31 AM UTC 24 |
| Finished | Sep 11 08:36:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872662064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.3872662064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.2001892046 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 638676467 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:36:31 AM UTC 24 |
| Finished | Sep 11 08:36:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2001892046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.2001892046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.107152378 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 453134298 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:36:31 AM UTC 24 |
| Finished | Sep 11 08:36:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=107152378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.107152378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.1712384954 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 459141120 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:36:31 AM UTC 24 |
| Finished | Sep 11 08:36:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1712384954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.1712384954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.1481873111 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 38837378 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:26:37 AM UTC 24 |
| Finished | Sep 11 08:26:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1481873111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.1481873111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.606345162 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 4882131913 ps |
| CPU time | 9.02 seconds |
| Started | Sep 11 08:26:19 AM UTC 24 |
| Finished | Sep 11 08:26:29 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=606345162 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.606345162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.440836232 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 14455995453 ps |
| CPU time | 22.29 seconds |
| Started | Sep 11 08:26:21 AM UTC 24 |
| Finished | Sep 11 08:26:44 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=440836232 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.440836232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.950858141 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 24975944982 ps |
| CPU time | 37.89 seconds |
| Started | Sep 11 08:26:21 AM UTC 24 |
| Finished | Sep 11 08:27:00 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=950858141 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.950858141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.3083486983 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 154378133 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:26:21 AM UTC 24 |
| Finished | Sep 11 08:26:23 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083486983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.3083486983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.1660581872 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 142825530 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:26:21 AM UTC 24 |
| Finished | Sep 11 08:26:23 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660581872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_bitstuff_err.1660581872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.2149048522 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 378620539 ps |
| CPU time | 2.4 seconds |
| Started | Sep 11 08:26:21 AM UTC 24 |
| Finished | Sep 11 08:26:25 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149048522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.2149048522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.75048064 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 969859526 ps |
| CPU time | 3.63 seconds |
| Started | Sep 11 08:26:22 AM UTC 24 |
| Finished | Sep 11 08:26:27 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75048064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.75048064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.3080171142 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 2570773730 ps |
| CPU time | 18.94 seconds |
| Started | Sep 11 08:26:22 AM UTC 24 |
| Finished | Sep 11 08:26:43 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080171142 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.3080171142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.3028304228 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 801691095 ps |
| CPU time | 2.93 seconds |
| Started | Sep 11 08:26:25 AM UTC 24 |
| Finished | Sep 11 08:26:29 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3028304228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.3028304228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.204920176 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 218916072 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:26:25 AM UTC 24 |
| Finished | Sep 11 08:26:27 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=204920176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_disconnected.204920176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_enable.4044099114 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 37840034 ps |
| CPU time | 0.87 seconds |
| Started | Sep 11 08:26:25 AM UTC 24 |
| Finished | Sep 11 08:26:27 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044099114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.4044099114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.3024722484 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 833031370 ps |
| CPU time | 3.62 seconds |
| Started | Sep 11 08:26:25 AM UTC 24 |
| Finished | Sep 11 08:26:29 AM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024722484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.3024722484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.157111443 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 171001461 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:26:25 AM UTC 24 |
| Finished | Sep 11 08:26:27 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157111443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_fifo_levels.157111443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.910194759 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 552523425 ps |
| CPU time | 4.98 seconds |
| Started | Sep 11 08:26:25 AM UTC 24 |
| Finished | Sep 11 08:26:31 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=910194759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_fifo_rst.910194759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.91980201 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 176945228 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:26:25 AM UTC 24 |
| Finished | Sep 11 08:26:27 AM UTC 24 |
| Peak memory | 226728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=91980201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.91980201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.2416736471 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 207539623 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:26:26 AM UTC 24 |
| Finished | Sep 11 08:26:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416736471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.2416736471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.354895274 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 204444116 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:26:26 AM UTC 24 |
| Finished | Sep 11 08:26:29 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354895274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_in_trans.354895274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.4063376453 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 4250314160 ps |
| CPU time | 41.45 seconds |
| Started | Sep 11 08:26:25 AM UTC 24 |
| Finished | Sep 11 08:27:08 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063376453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.4063376453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.3186317633 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 5853879574 ps |
| CPU time | 65.23 seconds |
| Started | Sep 11 08:26:26 AM UTC 24 |
| Finished | Sep 11 08:27:33 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186317633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.3186317633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.1794979817 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 268264579 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:26:26 AM UTC 24 |
| Finished | Sep 11 08:26:29 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1794979817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.1794979817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.2601396526 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 33665919396 ps |
| CPU time | 57.5 seconds |
| Started | Sep 11 08:26:28 AM UTC 24 |
| Finished | Sep 11 08:27:28 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601396526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_resume.2601396526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.3681605736 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 3449692543 ps |
| CPU time | 10.56 seconds |
| Started | Sep 11 08:26:28 AM UTC 24 |
| Finished | Sep 11 08:26:40 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681605736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_link_suspend.3681605736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.4100192248 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 5261473249 ps |
| CPU time | 41.62 seconds |
| Started | Sep 11 08:26:28 AM UTC 24 |
| Finished | Sep 11 08:27:11 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100192248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.4100192248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.2553838210 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 2893801536 ps |
| CPU time | 84.75 seconds |
| Started | Sep 11 08:26:28 AM UTC 24 |
| Finished | Sep 11 08:27:55 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553838210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.2553838210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.1264783138 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 247176429 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:26:28 AM UTC 24 |
| Finished | Sep 11 08:26:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1264783138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.1264783138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.3672534354 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 190525518 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:26:29 AM UTC 24 |
| Finished | Sep 11 08:26:31 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672534354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.3672534354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.496351150 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 2155536870 ps |
| CPU time | 58.62 seconds |
| Started | Sep 11 08:26:29 AM UTC 24 |
| Finished | Sep 11 08:27:29 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=496351150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.496351150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.487599827 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 2169942063 ps |
| CPU time | 54.14 seconds |
| Started | Sep 11 08:26:29 AM UTC 24 |
| Finished | Sep 11 08:27:24 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=487599827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.487599827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.669438278 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 166046538 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:26:29 AM UTC 24 |
| Finished | Sep 11 08:26:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=669438278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.669438278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.2219661593 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 139759093 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:26:30 AM UTC 24 |
| Finished | Sep 11 08:26:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219661593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.2219661593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.699362726 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 187005649 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:26:30 AM UTC 24 |
| Finished | Sep 11 08:26:32 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699362726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_out_iso.699362726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.382545356 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 204938011 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:26:30 AM UTC 24 |
| Finished | Sep 11 08:26:33 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=382545356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_out_stall.382545356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.1106027977 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 161801972 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:26:30 AM UTC 24 |
| Finished | Sep 11 08:26:32 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106027977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.1106027977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.849014280 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 189908541 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:26:30 AM UTC 24 |
| Finished | Sep 11 08:26:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=849014280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pending_in_trans.849014280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.3463448126 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 250210764 ps |
| CPU time | 1.81 seconds |
| Started | Sep 11 08:26:30 AM UTC 24 |
| Finished | Sep 11 08:26:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463448126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.3463448126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.231232542 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 149326138 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:26:32 AM UTC 24 |
| Finished | Sep 11 08:26:34 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231232542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.231232542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.3622899560 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 47675101 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:26:32 AM UTC 24 |
| Finished | Sep 11 08:26:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3622899560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.3622899560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.2120225849 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 11524604967 ps |
| CPU time | 34.07 seconds |
| Started | Sep 11 08:26:32 AM UTC 24 |
| Finished | Sep 11 08:27:07 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2120225849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.2120225849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.2034514005 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 234294662 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:26:32 AM UTC 24 |
| Finished | Sep 11 08:26:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034514005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.2034514005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.820526129 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 174052084 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:26:33 AM UTC 24 |
| Finished | Sep 11 08:26:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=820526129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_pkt_sent.820526129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.1860761503 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 209856186 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:26:33 AM UTC 24 |
| Finished | Sep 11 08:26:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860761503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_random_length_in_transaction.1860761503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.2443426011 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 163363990 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:26:33 AM UTC 24 |
| Finished | Sep 11 08:26:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2443426011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.2443426011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.31077100 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 20162476998 ps |
| CPU time | 39.97 seconds |
| Started | Sep 11 08:26:33 AM UTC 24 |
| Finished | Sep 11 08:27:15 AM UTC 24 |
| Peak memory | 217204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=31077100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_resume_link_active.31077100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.1690588146 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 170844678 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:26:34 AM UTC 24 |
| Finished | Sep 11 08:26:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1690588146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.1690588146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.385336787 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 255430130 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:26:34 AM UTC 24 |
| Finished | Sep 11 08:26:36 AM UTC 24 |
| Peak memory | 214756 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=385336787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_rx_full.385336787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.2862310879 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 180476392 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:26:34 AM UTC 24 |
| Finished | Sep 11 08:26:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2862310879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.2862310879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.3683434093 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 159866464 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:26:35 AM UTC 24 |
| Finished | Sep 11 08:26:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683434093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.3683434093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.4273733096 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 171754652 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:26:35 AM UTC 24 |
| Finished | Sep 11 08:26:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4273733096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.4273733096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.1282930681 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 1950298582 ps |
| CPU time | 19.42 seconds |
| Started | Sep 11 08:26:35 AM UTC 24 |
| Finished | Sep 11 08:26:56 AM UTC 24 |
| Peak memory | 234112 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282930681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.1282930681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.964164911 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 177642558 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:26:35 AM UTC 24 |
| Finished | Sep 11 08:26:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=964164911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.964164911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.2660365070 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 190954939 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:26:35 AM UTC 24 |
| Finished | Sep 11 08:26:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660365070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.2660365070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.2384474530 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 286169676 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:26:37 AM UTC 24 |
| Finished | Sep 11 08:26:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2384474530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.2384474530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.4162913728 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 2481495025 ps |
| CPU time | 22.6 seconds |
| Started | Sep 11 08:26:35 AM UTC 24 |
| Finished | Sep 11 08:26:59 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162913728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_streaming_out.4162913728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.2250015842 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 4982575543 ps |
| CPU time | 32.58 seconds |
| Started | Sep 11 08:26:23 AM UTC 24 |
| Finished | Sep 11 08:26:57 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250015842 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.2250015842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.319569750 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 595777042 ps |
| CPU time | 3.24 seconds |
| Started | Sep 11 08:26:37 AM UTC 24 |
| Finished | Sep 11 08:26:41 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=319569750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_tx _rx_disruption.319569750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.1888492196 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 340287495 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:36:31 AM UTC 24 |
| Finished | Sep 11 08:36:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888492196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.1888492196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.2893437944 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 486419284 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:36:31 AM UTC 24 |
| Finished | Sep 11 08:36:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2893437944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_ tx_rx_disruption.2893437944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.3533095590 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 589205359 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:36:32 AM UTC 24 |
| Finished | Sep 11 08:36:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3533095590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_ tx_rx_disruption.3533095590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.2798997477 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 430394324 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:41 AM UTC 24 |
| Peak memory | 214936 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2798997477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.2798997477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.1710718036 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 461846674 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:41 AM UTC 24 |
| Peak memory | 214876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710718036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.1710718036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.342223053 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 514338797 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=342223053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_t x_rx_disruption.342223053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.1505134722 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 396267703 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505134722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.1505134722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.250571944 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 478487988 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=250571944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_t x_rx_disruption.250571944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.611762627 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 165517924 ps |
| CPU time | 0.78 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=611762627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.611762627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.2103138737 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 559623224 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2103138737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_ tx_rx_disruption.2103138737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.515612757 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 364289857 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:45 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=515612757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.515612757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.145552326 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 608619252 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:45 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=145552326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_t x_rx_disruption.145552326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.238185566 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 283769767 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:44 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=238185566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.238185566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.3335594328 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 534898578 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3335594328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.3335594328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.3274412734 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 44298662 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:26:58 AM UTC 24 |
| Finished | Sep 11 08:27:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3274412734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.3274412734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.3670727985 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 10784423572 ps |
| CPU time | 22.43 seconds |
| Started | Sep 11 08:26:37 AM UTC 24 |
| Finished | Sep 11 08:27:01 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670727985 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.3670727985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.3122235547 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 18552398622 ps |
| CPU time | 24.04 seconds |
| Started | Sep 11 08:26:37 AM UTC 24 |
| Finished | Sep 11 08:27:02 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122235547 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.3122235547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.3992302021 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 30146331007 ps |
| CPU time | 39.98 seconds |
| Started | Sep 11 08:26:39 AM UTC 24 |
| Finished | Sep 11 08:27:20 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992302021 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.3992302021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.1832478415 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 161766154 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:26:39 AM UTC 24 |
| Finished | Sep 11 08:26:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1832478415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.1832478415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.2593589042 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 166508796 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:26:39 AM UTC 24 |
| Finished | Sep 11 08:26:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593589042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.2593589042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.2475332725 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 268266780 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:26:39 AM UTC 24 |
| Finished | Sep 11 08:26:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475332725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.2475332725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.4245110069 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 352833715 ps |
| CPU time | 2 seconds |
| Started | Sep 11 08:26:39 AM UTC 24 |
| Finished | Sep 11 08:26:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245110069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.4245110069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.2601578736 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 25809134191 ps |
| CPU time | 60.24 seconds |
| Started | Sep 11 08:26:39 AM UTC 24 |
| Finished | Sep 11 08:27:41 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601578736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.2601578736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.661735042 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 7062612393 ps |
| CPU time | 47.86 seconds |
| Started | Sep 11 08:26:40 AM UTC 24 |
| Finished | Sep 11 08:27:30 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=661735042 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.661735042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.2200627905 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 617289921 ps |
| CPU time | 2.78 seconds |
| Started | Sep 11 08:26:40 AM UTC 24 |
| Finished | Sep 11 08:26:44 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2200627905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.2200627905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.3076881923 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 137890946 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:26:41 AM UTC 24 |
| Finished | Sep 11 08:26:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076881923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.3076881923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_enable.45760957 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 102844445 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:26:42 AM UTC 24 |
| Finished | Sep 11 08:26:44 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=45760957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_enable.45760957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.1318483663 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 997003466 ps |
| CPU time | 4.61 seconds |
| Started | Sep 11 08:26:42 AM UTC 24 |
| Finished | Sep 11 08:26:48 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318483663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.1318483663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.2416591642 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 384218337 ps |
| CPU time | 2.22 seconds |
| Started | Sep 11 08:26:42 AM UTC 24 |
| Finished | Sep 11 08:26:45 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416591642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.2416591642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.3769624376 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 263684166 ps |
| CPU time | 1.87 seconds |
| Started | Sep 11 08:26:42 AM UTC 24 |
| Finished | Sep 11 08:26:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769624376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_fifo_levels.3769624376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.1129088230 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 273648362 ps |
| CPU time | 3.12 seconds |
| Started | Sep 11 08:26:42 AM UTC 24 |
| Finished | Sep 11 08:26:46 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1129088230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_fifo_rst.1129088230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.1725978094 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 154715283 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:26:42 AM UTC 24 |
| Finished | Sep 11 08:26:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1725978094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.1725978094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.2274576341 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 142729972 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:26:44 AM UTC 24 |
| Finished | Sep 11 08:26:46 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2274576341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.2274576341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.247193092 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 172478777 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:26:44 AM UTC 24 |
| Finished | Sep 11 08:26:46 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=247193092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_in_trans.247193092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.458193110 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 5330765996 ps |
| CPU time | 45.39 seconds |
| Started | Sep 11 08:26:42 AM UTC 24 |
| Finished | Sep 11 08:27:29 AM UTC 24 |
| Peak memory | 234232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=458193110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.458193110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.2681117966 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 10332701195 ps |
| CPU time | 78.92 seconds |
| Started | Sep 11 08:26:44 AM UTC 24 |
| Finished | Sep 11 08:28:05 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2681117966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.2681117966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.5738174 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 207676312 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:26:45 AM UTC 24 |
| Finished | Sep 11 08:26:48 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=5738174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_link_in_err.5738174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.684805586 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 32132862444 ps |
| CPU time | 59.87 seconds |
| Started | Sep 11 08:26:45 AM UTC 24 |
| Finished | Sep 11 08:27:47 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=684805586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_link_resume.684805586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.1412425070 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 4315838473 ps |
| CPU time | 33.91 seconds |
| Started | Sep 11 08:26:45 AM UTC 24 |
| Finished | Sep 11 08:27:21 AM UTC 24 |
| Peak memory | 234132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412425070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.1412425070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.3577362496 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 2955690599 ps |
| CPU time | 79.41 seconds |
| Started | Sep 11 08:26:47 AM UTC 24 |
| Finished | Sep 11 08:28:08 AM UTC 24 |
| Peak memory | 234148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577362496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.3577362496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.1778297608 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 256102576 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:26:47 AM UTC 24 |
| Finished | Sep 11 08:26:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778297608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.1778297608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.855103787 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 201148678 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:26:47 AM UTC 24 |
| Finished | Sep 11 08:26:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=855103787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.855103787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.889737316 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 4136238983 ps |
| CPU time | 110.43 seconds |
| Started | Sep 11 08:26:47 AM UTC 24 |
| Finished | Sep 11 08:28:39 AM UTC 24 |
| Peak memory | 229564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889737316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.889737316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.2460755646 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 2485928998 ps |
| CPU time | 20.75 seconds |
| Started | Sep 11 08:26:48 AM UTC 24 |
| Finished | Sep 11 08:27:10 AM UTC 24 |
| Peak memory | 229560 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460755646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.2460755646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.349680029 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 153416301 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:26:48 AM UTC 24 |
| Finished | Sep 11 08:26:51 AM UTC 24 |
| Peak memory | 214796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=349680029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.349680029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.3138429120 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 161270659 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:26:48 AM UTC 24 |
| Finished | Sep 11 08:26:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138429120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.3138429120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.1599192929 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 188984489 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:26:50 AM UTC 24 |
| Finished | Sep 11 08:26:52 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599192929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_out_iso.1599192929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.2551037526 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 220861865 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:26:50 AM UTC 24 |
| Finished | Sep 11 08:26:52 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551037526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.2551037526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.2909812302 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 204268088 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:26:50 AM UTC 24 |
| Finished | Sep 11 08:26:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2909812302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_out_trans_nak.2909812302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.2229607 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 187147882 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:26:50 AM UTC 24 |
| Finished | Sep 11 08:26:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2229607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_pending_in_trans.2229607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.2640534302 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 202379193 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:26:50 AM UTC 24 |
| Finished | Sep 11 08:26:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640534302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.2640534302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.3520101443 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 143819935 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:26:50 AM UTC 24 |
| Finished | Sep 11 08:26:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520101443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.3520101443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.2510305159 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 67511186 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:26:50 AM UTC 24 |
| Finished | Sep 11 08:26:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2510305159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.2510305159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.1116464501 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 9543507832 ps |
| CPU time | 28.72 seconds |
| Started | Sep 11 08:26:51 AM UTC 24 |
| Finished | Sep 11 08:27:22 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116464501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.1116464501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.762369796 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 171428026 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:26:52 AM UTC 24 |
| Finished | Sep 11 08:26:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762369796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_pkt_received.762369796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.1018505879 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 201543364 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:26:52 AM UTC 24 |
| Finished | Sep 11 08:26:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018505879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.1018505879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.480604952 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 228402139 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:26:53 AM UTC 24 |
| Finished | Sep 11 08:26:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=480604952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_random_length_in_transaction.480604952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.2285933875 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 182270392 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:26:53 AM UTC 24 |
| Finished | Sep 11 08:26:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285933875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.2285933875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.3184879237 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 20172450574 ps |
| CPU time | 27.66 seconds |
| Started | Sep 11 08:26:53 AM UTC 24 |
| Finished | Sep 11 08:27:22 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184879237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_resume_link_active.3184879237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.3524629533 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 174631275 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:26:53 AM UTC 24 |
| Finished | Sep 11 08:26:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524629533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_rx_crc_err.3524629533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.3248916989 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 352564031 ps |
| CPU time | 1.81 seconds |
| Started | Sep 11 08:26:53 AM UTC 24 |
| Finished | Sep 11 08:26:56 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248916989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.3248916989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.4069018731 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 149156837 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:26:54 AM UTC 24 |
| Finished | Sep 11 08:26:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4069018731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.4069018731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.1783918337 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 171464244 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:26:54 AM UTC 24 |
| Finished | Sep 11 08:26:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783918337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.1783918337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.1705712449 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 240339565 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:26:55 AM UTC 24 |
| Finished | Sep 11 08:26:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705712449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.1705712449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.3507357470 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 2721973323 ps |
| CPU time | 77.87 seconds |
| Started | Sep 11 08:26:55 AM UTC 24 |
| Finished | Sep 11 08:28:14 AM UTC 24 |
| Peak memory | 234232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507357470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.3507357470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.2912006757 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 247060529 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:26:55 AM UTC 24 |
| Finished | Sep 11 08:26:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912006757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.2912006757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.2066132730 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 159245675 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:26:56 AM UTC 24 |
| Finished | Sep 11 08:26:58 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066132730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.2066132730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.2706392204 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 1079765437 ps |
| CPU time | 3.46 seconds |
| Started | Sep 11 08:26:58 AM UTC 24 |
| Finished | Sep 11 08:27:02 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706392204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.2706392204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.1024197646 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 2272115915 ps |
| CPU time | 57.47 seconds |
| Started | Sep 11 08:26:56 AM UTC 24 |
| Finished | Sep 11 08:27:55 AM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024197646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.1024197646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.458898590 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 833262381 ps |
| CPU time | 19.84 seconds |
| Started | Sep 11 08:26:40 AM UTC 24 |
| Finished | Sep 11 08:27:01 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=458898590 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.458898590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.673428704 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 506456300 ps |
| CPU time | 2.27 seconds |
| Started | Sep 11 08:26:58 AM UTC 24 |
| Finished | Sep 11 08:27:01 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=673428704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_tx _rx_disruption.673428704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.170572299 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 465707621 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:36:36 AM UTC 24 |
| Finished | Sep 11 08:36:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=170572299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.170572299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.1383452525 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 517778947 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:36:37 AM UTC 24 |
| Finished | Sep 11 08:36:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1383452525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_ tx_rx_disruption.1383452525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.1241122294 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 475640984 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:36:37 AM UTC 24 |
| Finished | Sep 11 08:36:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1241122294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.1241122294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.2331892951 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 249059292 ps |
| CPU time | 0.96 seconds |
| Started | Sep 11 08:36:37 AM UTC 24 |
| Finished | Sep 11 08:36:39 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331892951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.2331892951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.787577495 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 464239072 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:36:37 AM UTC 24 |
| Finished | Sep 11 08:36:40 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=787577495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_t x_rx_disruption.787577495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.2218870697 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 152302606 ps |
| CPU time | 0.85 seconds |
| Started | Sep 11 08:36:41 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218870697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.2218870697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.3632334641 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 526621296 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:36:41 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3632334641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.3632334641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.1532259879 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 577983670 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:36:41 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1532259879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.1532259879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.4062125278 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 370175806 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:36:41 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4062125278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.4062125278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.1361368173 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 601054017 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:36:41 AM UTC 24 |
| Finished | Sep 11 08:36:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1361368173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.1361368173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.2929656626 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 698483956 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:36:41 AM UTC 24 |
| Finished | Sep 11 08:36:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2929656626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.2929656626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.3085499262 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 624763058 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:36:41 AM UTC 24 |
| Finished | Sep 11 08:36:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3085499262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_ tx_rx_disruption.3085499262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.522774238 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 430101241 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:36:42 AM UTC 24 |
| Finished | Sep 11 08:36:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=522774238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.522774238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.2751394805 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 588593788 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:36:42 AM UTC 24 |
| Finished | Sep 11 08:36:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2751394805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.2751394805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.2427347083 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 60022509 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:27:16 AM UTC 24 |
| Finished | Sep 11 08:27:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427347083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.2427347083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.1426051885 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 5285452008 ps |
| CPU time | 9.06 seconds |
| Started | Sep 11 08:26:58 AM UTC 24 |
| Finished | Sep 11 08:27:08 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426051885 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.1426051885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.357980981 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 14496526635 ps |
| CPU time | 21.54 seconds |
| Started | Sep 11 08:26:58 AM UTC 24 |
| Finished | Sep 11 08:27:21 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=357980981 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.357980981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.2177855593 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 28742531930 ps |
| CPU time | 48.02 seconds |
| Started | Sep 11 08:26:58 AM UTC 24 |
| Finished | Sep 11 08:27:48 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2177855593 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.2177855593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.1741849018 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 201064587 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:26:58 AM UTC 24 |
| Finished | Sep 11 08:27:01 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741849018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.1741849018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.1682644482 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 148359808 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:26:58 AM UTC 24 |
| Finished | Sep 11 08:27:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682644482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.1682644482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.94996920 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 163548556 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:26:58 AM UTC 24 |
| Finished | Sep 11 08:27:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=94996920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_clear.94996920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.2586215984 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 977983352 ps |
| CPU time | 3.32 seconds |
| Started | Sep 11 08:27:00 AM UTC 24 |
| Finished | Sep 11 08:27:04 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2586215984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.2586215984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.2960168444 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 22002033804 ps |
| CPU time | 39.7 seconds |
| Started | Sep 11 08:27:00 AM UTC 24 |
| Finished | Sep 11 08:27:41 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960168444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.2960168444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.2875384334 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 1168466654 ps |
| CPU time | 10.88 seconds |
| Started | Sep 11 08:27:00 AM UTC 24 |
| Finished | Sep 11 08:27:12 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875384334 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.2875384334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.601748037 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 458910602 ps |
| CPU time | 2.18 seconds |
| Started | Sep 11 08:27:01 AM UTC 24 |
| Finished | Sep 11 08:27:04 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=601748037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_disable_endpoint.601748037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.3295347099 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 150187939 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:27:01 AM UTC 24 |
| Finished | Sep 11 08:27:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295347099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.3295347099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_enable.2849143304 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 39549481 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:27:01 AM UTC 24 |
| Finished | Sep 11 08:27:03 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849143304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.2849143304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.3014801788 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 921744801 ps |
| CPU time | 4.29 seconds |
| Started | Sep 11 08:27:01 AM UTC 24 |
| Finished | Sep 11 08:27:07 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014801788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.3014801788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.2941096389 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 298359918 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:27:01 AM UTC 24 |
| Finished | Sep 11 08:27:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941096389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_fifo_levels.2941096389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.3936055151 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 300022106 ps |
| CPU time | 3.7 seconds |
| Started | Sep 11 08:27:02 AM UTC 24 |
| Finished | Sep 11 08:27:06 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936055151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_fifo_rst.3936055151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.4174476207 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 227360545 ps |
| CPU time | 1.93 seconds |
| Started | Sep 11 08:27:03 AM UTC 24 |
| Finished | Sep 11 08:27:06 AM UTC 24 |
| Peak memory | 227256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4174476207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.4174476207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.75587601 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 174061871 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:27:03 AM UTC 24 |
| Finished | Sep 11 08:27:05 AM UTC 24 |
| Peak memory | 214348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=75587601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_in_stall.75587601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.1788418744 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 227673170 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:27:03 AM UTC 24 |
| Finished | Sep 11 08:27:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788418744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.1788418744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.2320195890 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 3136513685 ps |
| CPU time | 31.91 seconds |
| Started | Sep 11 08:27:03 AM UTC 24 |
| Finished | Sep 11 08:27:36 AM UTC 24 |
| Peak memory | 227444 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320195890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.2320195890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.2215184555 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 4827447921 ps |
| CPU time | 53.4 seconds |
| Started | Sep 11 08:27:03 AM UTC 24 |
| Finished | Sep 11 08:27:58 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215184555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.2215184555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.449446410 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 209408302 ps |
| CPU time | 1.2 seconds |
| Started | Sep 11 08:27:04 AM UTC 24 |
| Finished | Sep 11 08:27:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=449446410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_in_err.449446410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.338487931 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 30090667221 ps |
| CPU time | 52.96 seconds |
| Started | Sep 11 08:27:04 AM UTC 24 |
| Finished | Sep 11 08:27:59 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=338487931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_resume.338487931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.14429536 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 6132221567 ps |
| CPU time | 10.84 seconds |
| Started | Sep 11 08:27:04 AM UTC 24 |
| Finished | Sep 11 08:27:16 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=14429536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_suspend.14429536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.1979173943 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 3050072606 ps |
| CPU time | 25.25 seconds |
| Started | Sep 11 08:27:04 AM UTC 24 |
| Finished | Sep 11 08:27:31 AM UTC 24 |
| Peak memory | 234284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979173943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.1979173943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.2084453467 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 2664515317 ps |
| CPU time | 22.34 seconds |
| Started | Sep 11 08:27:06 AM UTC 24 |
| Finished | Sep 11 08:27:29 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2084453467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.2084453467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.981092585 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 267288700 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:27:06 AM UTC 24 |
| Finished | Sep 11 08:27:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=981092585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.981092585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.242425534 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 243959476 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:27:06 AM UTC 24 |
| Finished | Sep 11 08:27:08 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=242425534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.242425534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.1020892540 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 3817154098 ps |
| CPU time | 37.67 seconds |
| Started | Sep 11 08:27:07 AM UTC 24 |
| Finished | Sep 11 08:27:47 AM UTC 24 |
| Peak memory | 233024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020892540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.1020892540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.400360568 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 2697102834 ps |
| CPU time | 21.67 seconds |
| Started | Sep 11 08:27:07 AM UTC 24 |
| Finished | Sep 11 08:27:31 AM UTC 24 |
| Peak memory | 226292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=400360568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.400360568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.1563529101 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 155648280 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:27:08 AM UTC 24 |
| Finished | Sep 11 08:27:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1563529101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.1563529101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.1244963223 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 184256093 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:27:08 AM UTC 24 |
| Finished | Sep 11 08:27:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244963223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.1244963223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.3562225026 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 165106738 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:27:08 AM UTC 24 |
| Finished | Sep 11 08:27:10 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562225026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.3562225026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.4256836282 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 176154302 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:27:08 AM UTC 24 |
| Finished | Sep 11 08:27:10 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256836282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.4256836282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.129834199 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 190562991 ps |
| CPU time | 1.2 seconds |
| Started | Sep 11 08:27:09 AM UTC 24 |
| Finished | Sep 11 08:27:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=129834199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_out_trans_nak.129834199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.3809843258 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 161774094 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:27:09 AM UTC 24 |
| Finished | Sep 11 08:27:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3809843258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.3809843258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.3839447810 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 219219798 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:27:09 AM UTC 24 |
| Finished | Sep 11 08:27:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3839447810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.3839447810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.1852782609 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 173867335 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:27:09 AM UTC 24 |
| Finished | Sep 11 08:27:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852782609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.1852782609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.736501080 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 38612375 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:27:09 AM UTC 24 |
| Finished | Sep 11 08:27:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=736501080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_phy_pins_sense.736501080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.2838305913 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 13857660399 ps |
| CPU time | 38.33 seconds |
| Started | Sep 11 08:27:11 AM UTC 24 |
| Finished | Sep 11 08:27:50 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838305913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.2838305913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.1772136472 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 168209693 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:27:11 AM UTC 24 |
| Finished | Sep 11 08:27:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772136472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.1772136472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.456676086 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 173782075 ps |
| CPU time | 0.98 seconds |
| Started | Sep 11 08:27:11 AM UTC 24 |
| Finished | Sep 11 08:27:13 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=456676086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_pkt_sent.456676086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.3322115939 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 197110762 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:27:12 AM UTC 24 |
| Finished | Sep 11 08:27:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3322115939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_random_length_in_transaction.3322115939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.1918741314 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 179636964 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:27:12 AM UTC 24 |
| Finished | Sep 11 08:27:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1918741314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.1918741314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.2022974565 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 20165334443 ps |
| CPU time | 31.58 seconds |
| Started | Sep 11 08:27:12 AM UTC 24 |
| Finished | Sep 11 08:27:45 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2022974565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 19.usbdev_resume_link_active.2022974565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.2128343603 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 236426063 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:27:13 AM UTC 24 |
| Finished | Sep 11 08:27:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2128343603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.2128343603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.139477210 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 249905912 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:27:13 AM UTC 24 |
| Finished | Sep 11 08:27:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=139477210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_rx_full.139477210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.3316932468 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 147123149 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:27:13 AM UTC 24 |
| Finished | Sep 11 08:27:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316932468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_setup_stage.3316932468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.3184351756 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 152131653 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:27:13 AM UTC 24 |
| Finished | Sep 11 08:27:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184351756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.3184351756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.2665621108 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 233942887 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:27:13 AM UTC 24 |
| Finished | Sep 11 08:27:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2665621108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.2665621108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.3714024697 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 2173693650 ps |
| CPU time | 23.03 seconds |
| Started | Sep 11 08:27:13 AM UTC 24 |
| Finished | Sep 11 08:27:37 AM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3714024697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.3714024697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.4212584783 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 163004233 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:27:13 AM UTC 24 |
| Finished | Sep 11 08:27:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212584783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.4212584783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.2704343773 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 194955402 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:27:14 AM UTC 24 |
| Finished | Sep 11 08:27:17 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704343773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.2704343773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.1890641403 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 444522719 ps |
| CPU time | 2.42 seconds |
| Started | Sep 11 08:27:14 AM UTC 24 |
| Finished | Sep 11 08:27:18 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890641403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.1890641403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.1255858868 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 1713589819 ps |
| CPU time | 16.28 seconds |
| Started | Sep 11 08:27:14 AM UTC 24 |
| Finished | Sep 11 08:27:32 AM UTC 24 |
| Peak memory | 229380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255858868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.1255858868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.3312309169 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 163293108 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:27:01 AM UTC 24 |
| Finished | Sep 11 08:27:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312309169 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.3312309169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.1138458972 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 583714889 ps |
| CPU time | 2.87 seconds |
| Started | Sep 11 08:27:16 AM UTC 24 |
| Finished | Sep 11 08:27:20 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1138458972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.1138458972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.2788216109 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 339148625 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:36:42 AM UTC 24 |
| Finished | Sep 11 08:36:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788216109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.2788216109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.693927388 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 599285496 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:36:44 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=693927388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_t x_rx_disruption.693927388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.858630061 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 187420811 ps |
| CPU time | 0.87 seconds |
| Started | Sep 11 08:36:45 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=858630061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.858630061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.1876658691 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 543891761 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:36:45 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1876658691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_ tx_rx_disruption.1876658691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.470565173 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 279083718 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:36:45 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=470565173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.470565173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.821700965 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 503741005 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:36:46 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=821700965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_t x_rx_disruption.821700965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.409518305 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 160191732 ps |
| CPU time | 0.83 seconds |
| Started | Sep 11 08:36:46 AM UTC 24 |
| Finished | Sep 11 08:37:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=409518305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.409518305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.2529023597 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 600347570 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:36:46 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2529023597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_ tx_rx_disruption.2529023597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.743114086 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 460636312 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:36:46 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=743114086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.743114086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.1600332606 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 458881934 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:36:46 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1600332606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_ tx_rx_disruption.1600332606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.3747091720 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 472427041 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:36:46 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3747091720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_ tx_rx_disruption.3747091720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.4205159986 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 246061482 ps |
| CPU time | 0.89 seconds |
| Started | Sep 11 08:36:46 AM UTC 24 |
| Finished | Sep 11 08:36:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4205159986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.4205159986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.3340850468 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 516274762 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:36:46 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3340850468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.3340850468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.2849909978 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 453628895 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:36:46 AM UTC 24 |
| Finished | Sep 11 08:36:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849909978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.2849909978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.516507295 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 442780689 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:36:51 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=516507295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_t x_rx_disruption.516507295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.667391733 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 223885291 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:36:51 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 214612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=667391733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.667391733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.2806946448 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 598854455 ps |
| CPU time | 1.82 seconds |
| Started | Sep 11 08:36:51 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2806946448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.2806946448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.2916739807 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 740910339 ps |
| CPU time | 1.84 seconds |
| Started | Sep 11 08:36:51 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2916739807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.2916739807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.138345252 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 523665379 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:36:51 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=138345252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_t x_rx_disruption.138345252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.376266641 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 49970895 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:19:18 AM UTC 24 |
| Finished | Sep 11 08:19:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=376266641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.376266641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.330842419 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 5364622523 ps |
| CPU time | 14.85 seconds |
| Started | Sep 11 08:18:33 AM UTC 24 |
| Finished | Sep 11 08:18:50 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=330842419 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.330842419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.4098177390 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 13769886174 ps |
| CPU time | 19.65 seconds |
| Started | Sep 11 08:18:35 AM UTC 24 |
| Finished | Sep 11 08:18:56 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098177390 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.4098177390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.2774809982 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 31268635956 ps |
| CPU time | 52.35 seconds |
| Started | Sep 11 08:18:35 AM UTC 24 |
| Finished | Sep 11 08:19:29 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774809982 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.2774809982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.3367386468 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 152729126 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:18:36 AM UTC 24 |
| Finished | Sep 11 08:18:38 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367386468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.3367386468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.2539251113 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 212308820 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:18:37 AM UTC 24 |
| Finished | Sep 11 08:18:40 AM UTC 24 |
| Peak memory | 214840 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539251113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.2539251113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.1687554139 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 132936477 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:18:37 AM UTC 24 |
| Finished | Sep 11 08:18:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687554139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.1687554139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.2314637099 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 190473162 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:18:37 AM UTC 24 |
| Finished | Sep 11 08:18:40 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2314637099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.2314637099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.3849287461 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 396502024 ps |
| CPU time | 2.62 seconds |
| Started | Sep 11 08:18:38 AM UTC 24 |
| Finished | Sep 11 08:18:42 AM UTC 24 |
| Peak memory | 216588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849287461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.3849287461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.4263251826 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 576907616 ps |
| CPU time | 3.03 seconds |
| Started | Sep 11 08:18:38 AM UTC 24 |
| Finished | Sep 11 08:18:42 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4263251826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.4263251826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.3680756446 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 15741419874 ps |
| CPU time | 31.65 seconds |
| Started | Sep 11 08:18:39 AM UTC 24 |
| Finished | Sep 11 08:19:12 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3680756446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.3680756446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.425642878 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 846748729 ps |
| CPU time | 6.35 seconds |
| Started | Sep 11 08:18:39 AM UTC 24 |
| Finished | Sep 11 08:18:47 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=425642878 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.425642878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.2064253558 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 911061653 ps |
| CPU time | 4.05 seconds |
| Started | Sep 11 08:18:40 AM UTC 24 |
| Finished | Sep 11 08:18:46 AM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064253558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_disable_endpoint.2064253558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.83744688 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 147392917 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:18:41 AM UTC 24 |
| Finished | Sep 11 08:18:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=83744688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_disconnected.83744688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_enable.2727175264 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 30506151 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:18:43 AM UTC 24 |
| Finished | Sep 11 08:18:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2727175264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_enable.2727175264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.596607718 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 956951534 ps |
| CPU time | 2.91 seconds |
| Started | Sep 11 08:18:43 AM UTC 24 |
| Finished | Sep 11 08:18:47 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=596607718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.596607718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.4282579483 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 479941493 ps |
| CPU time | 2.74 seconds |
| Started | Sep 11 08:18:44 AM UTC 24 |
| Finished | Sep 11 08:18:48 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4282579483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.4282579483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.936841049 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 291153751 ps |
| CPU time | 1.89 seconds |
| Started | Sep 11 08:18:44 AM UTC 24 |
| Finished | Sep 11 08:18:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=936841049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_fifo_levels.936841049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.2113058368 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 499098940 ps |
| CPU time | 5 seconds |
| Started | Sep 11 08:18:44 AM UTC 24 |
| Finished | Sep 11 08:18:50 AM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113058368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.2113058368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.556571641 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 90187157192 ps |
| CPU time | 195.38 seconds |
| Started | Sep 11 08:18:44 AM UTC 24 |
| Finished | Sep 11 08:22:03 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=556571641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.556571641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.263855445 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 83059506431 ps |
| CPU time | 189.47 seconds |
| Started | Sep 11 08:18:46 AM UTC 24 |
| Finished | Sep 11 08:21:59 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=263855445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_hiclk_max.263855445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.2473321057 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 109126721142 ps |
| CPU time | 213.78 seconds |
| Started | Sep 11 08:18:46 AM UTC 24 |
| Finished | Sep 11 08:22:23 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2473321057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.2473321057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.1596381207 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 101972915705 ps |
| CPU time | 183.62 seconds |
| Started | Sep 11 08:18:47 AM UTC 24 |
| Finished | Sep 11 08:21:54 AM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1596381207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_loclk_max.1596381207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.3013922789 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 85187135317 ps |
| CPU time | 208.87 seconds |
| Started | Sep 11 08:18:47 AM UTC 24 |
| Finished | Sep 11 08:22:20 AM UTC 24 |
| Peak memory | 217136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013922789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.3013922789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.1555464008 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 182398095 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:18:49 AM UTC 24 |
| Finished | Sep 11 08:18:52 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1555464008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.1555464008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.3989107304 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 219429135 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:18:49 AM UTC 24 |
| Finished | Sep 11 08:18:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989107304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.3989107304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.1075065309 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 222198262 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:18:50 AM UTC 24 |
| Finished | Sep 11 08:18:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075065309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.1075065309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.2837816970 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 4199568427 ps |
| CPU time | 40.53 seconds |
| Started | Sep 11 08:18:47 AM UTC 24 |
| Finished | Sep 11 08:19:29 AM UTC 24 |
| Peak memory | 234076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2837816970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.2837816970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.3007477420 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 7866967919 ps |
| CPU time | 55.76 seconds |
| Started | Sep 11 08:18:51 AM UTC 24 |
| Finished | Sep 11 08:19:48 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007477420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.3007477420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.928683967 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 210555383 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:18:51 AM UTC 24 |
| Finished | Sep 11 08:18:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=928683967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_link_in_err.928683967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.4169137058 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 27446032532 ps |
| CPU time | 50.65 seconds |
| Started | Sep 11 08:18:51 AM UTC 24 |
| Finished | Sep 11 08:19:43 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169137058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.4169137058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.1463347465 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 6188135708 ps |
| CPU time | 14.87 seconds |
| Started | Sep 11 08:18:52 AM UTC 24 |
| Finished | Sep 11 08:19:08 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463347465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.1463347465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.1072315616 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 3076560118 ps |
| CPU time | 87.59 seconds |
| Started | Sep 11 08:18:52 AM UTC 24 |
| Finished | Sep 11 08:20:22 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072315616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.1072315616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.1573008154 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 2256829747 ps |
| CPU time | 20.8 seconds |
| Started | Sep 11 08:18:52 AM UTC 24 |
| Finished | Sep 11 08:19:15 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573008154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.1573008154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.978591037 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 298115857 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:18:53 AM UTC 24 |
| Finished | Sep 11 08:18:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=978591037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.978591037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.478469667 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 189134965 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:18:55 AM UTC 24 |
| Finished | Sep 11 08:18:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=478469667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.478469667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.2252093110 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 2375384947 ps |
| CPU time | 20.07 seconds |
| Started | Sep 11 08:18:55 AM UTC 24 |
| Finished | Sep 11 08:19:16 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252093110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.2252093110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.3440083963 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 2269742060 ps |
| CPU time | 65.83 seconds |
| Started | Sep 11 08:18:56 AM UTC 24 |
| Finished | Sep 11 08:20:04 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440083963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.3440083963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.3162945528 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 2580529388 ps |
| CPU time | 21.28 seconds |
| Started | Sep 11 08:18:57 AM UTC 24 |
| Finished | Sep 11 08:19:20 AM UTC 24 |
| Peak memory | 227516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162945528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.3162945528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.368281457 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 153211439 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:18:57 AM UTC 24 |
| Finished | Sep 11 08:18:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=368281457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.368281457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.3005346786 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 143434370 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:18:57 AM UTC 24 |
| Finished | Sep 11 08:18:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005346786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.3005346786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.4187062345 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 150852510 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:19:00 AM UTC 24 |
| Finished | Sep 11 08:19:03 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4187062345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.4187062345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.3846759298 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 165262013 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:19:00 AM UTC 24 |
| Finished | Sep 11 08:19:03 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846759298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_out_stall.3846759298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.3748216740 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 153430949 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:19:01 AM UTC 24 |
| Finished | Sep 11 08:19:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748216740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_out_trans_nak.3748216740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.2968839000 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 154732089 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:19:03 AM UTC 24 |
| Finished | Sep 11 08:19:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968839000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.2968839000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.2524805789 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 290900016 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:19:03 AM UTC 24 |
| Finished | Sep 11 08:19:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524805789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.2524805789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.531446434 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 199973605 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:19:03 AM UTC 24 |
| Finished | Sep 11 08:19:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=531446434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.531446434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.3737238167 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 179836961 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:19:03 AM UTC 24 |
| Finished | Sep 11 08:19:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737238167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.3737238167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.827921487 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 32200834 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:19:03 AM UTC 24 |
| Finished | Sep 11 08:19:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=827921487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_phy_pins_sense.827921487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.580416219 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 21475622102 ps |
| CPU time | 54.35 seconds |
| Started | Sep 11 08:19:05 AM UTC 24 |
| Finished | Sep 11 08:20:00 AM UTC 24 |
| Peak memory | 227376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580416219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_pkt_buffer.580416219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.4239517442 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 156338353 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:19:05 AM UTC 24 |
| Finished | Sep 11 08:19:07 AM UTC 24 |
| Peak memory | 214748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239517442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.4239517442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.1727736609 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 212675322 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:19:06 AM UTC 24 |
| Finished | Sep 11 08:19:08 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1727736609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.1727736609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.1532854401 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 6928439817 ps |
| CPU time | 71.47 seconds |
| Started | Sep 11 08:19:07 AM UTC 24 |
| Finished | Sep 11 08:20:20 AM UTC 24 |
| Peak memory | 229360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532854401 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.1532854401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.1111724576 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 1726120065 ps |
| CPU time | 43.36 seconds |
| Started | Sep 11 08:19:07 AM UTC 24 |
| Finished | Sep 11 08:19:52 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1111724576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.1111724576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.3571260929 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 6499254568 ps |
| CPU time | 37.02 seconds |
| Started | Sep 11 08:19:07 AM UTC 24 |
| Finished | Sep 11 08:19:45 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571260929 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.3571260929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.2246391996 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 202805031 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:19:07 AM UTC 24 |
| Finished | Sep 11 08:19:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246391996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.2246391996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.511058353 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 208653224 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:19:07 AM UTC 24 |
| Finished | Sep 11 08:19:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=511058353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.511058353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.1187754368 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 20157233179 ps |
| CPU time | 49.61 seconds |
| Started | Sep 11 08:19:08 AM UTC 24 |
| Finished | Sep 11 08:19:59 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187754368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.1187754368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.4114999542 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 178583684 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:19:10 AM UTC 24 |
| Finished | Sep 11 08:19:13 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4114999542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_crc_err.4114999542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.181528584 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 245179937 ps |
| CPU time | 1.98 seconds |
| Started | Sep 11 08:19:10 AM UTC 24 |
| Finished | Sep 11 08:19:13 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=181528584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_rx_full.181528584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.3883038199 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 162566572 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:19:10 AM UTC 24 |
| Finished | Sep 11 08:19:13 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883038199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.3883038199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.3920118888 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 463801928 ps |
| CPU time | 2.38 seconds |
| Started | Sep 11 08:19:18 AM UTC 24 |
| Finished | Sep 11 08:19:21 AM UTC 24 |
| Peak memory | 251532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920118888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.3920118888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.3093720332 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 444478278 ps |
| CPU time | 2.33 seconds |
| Started | Sep 11 08:19:10 AM UTC 24 |
| Finished | Sep 11 08:19:13 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3093720332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.3093720332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.976446326 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 330650874 ps |
| CPU time | 1.93 seconds |
| Started | Sep 11 08:19:10 AM UTC 24 |
| Finished | Sep 11 08:19:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=976446326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.976446326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.1861310097 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 193583192 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:19:12 AM UTC 24 |
| Finished | Sep 11 08:19:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1861310097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_setup_stage.1861310097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.4028850304 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 156677217 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:19:14 AM UTC 24 |
| Finished | Sep 11 08:19:16 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028850304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.4028850304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.1139909882 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 210180253 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:19:14 AM UTC 24 |
| Finished | Sep 11 08:19:17 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1139909882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.1139909882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.671402752 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 2394394035 ps |
| CPU time | 17.62 seconds |
| Started | Sep 11 08:19:14 AM UTC 24 |
| Finished | Sep 11 08:19:33 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=671402752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.671402752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.1329609887 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 163957287 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:19:14 AM UTC 24 |
| Finished | Sep 11 08:19:17 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329609887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.1329609887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.1881996225 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 221220695 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:19:14 AM UTC 24 |
| Finished | Sep 11 08:19:17 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881996225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.1881996225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.877082396 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 828492630 ps |
| CPU time | 3.73 seconds |
| Started | Sep 11 08:19:15 AM UTC 24 |
| Finished | Sep 11 08:19:20 AM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=877082396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_stream_len_max.877082396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.159033300 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 1953302826 ps |
| CPU time | 13.4 seconds |
| Started | Sep 11 08:19:14 AM UTC 24 |
| Finished | Sep 11 08:19:29 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159033300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_streaming_out.159033300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.2502660150 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 4406162478 ps |
| CPU time | 37.59 seconds |
| Started | Sep 11 08:18:40 AM UTC 24 |
| Finished | Sep 11 08:19:20 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502660150 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.2502660150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.3273945706 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 527531628 ps |
| CPU time | 2.8 seconds |
| Started | Sep 11 08:19:18 AM UTC 24 |
| Finished | Sep 11 08:19:22 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3273945706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.3273945706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.2325761913 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 60162996 ps |
| CPU time | 0.96 seconds |
| Started | Sep 11 08:27:35 AM UTC 24 |
| Finished | Sep 11 08:27:38 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325761913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.2325761913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.2347971621 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 10276334306 ps |
| CPU time | 19.11 seconds |
| Started | Sep 11 08:27:16 AM UTC 24 |
| Finished | Sep 11 08:27:36 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347971621 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.2347971621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.2252480703 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 15887738933 ps |
| CPU time | 26.84 seconds |
| Started | Sep 11 08:27:16 AM UTC 24 |
| Finished | Sep 11 08:27:44 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252480703 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.2252480703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.410766369 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 25134941300 ps |
| CPU time | 37.4 seconds |
| Started | Sep 11 08:27:16 AM UTC 24 |
| Finished | Sep 11 08:27:55 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=410766369 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.410766369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.2674622750 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 197976379 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:27:16 AM UTC 24 |
| Finished | Sep 11 08:27:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674622750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_av_buffer.2674622750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.3372524047 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 145133430 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:27:17 AM UTC 24 |
| Finished | Sep 11 08:27:20 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372524047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_bitstuff_err.3372524047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.1108306077 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 163546631 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:27:18 AM UTC 24 |
| Finished | Sep 11 08:27:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108306077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.1108306077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.2053167727 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 18809628191 ps |
| CPU time | 35.64 seconds |
| Started | Sep 11 08:27:18 AM UTC 24 |
| Finished | Sep 11 08:27:55 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2053167727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.2053167727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.2427465328 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 1463005811 ps |
| CPU time | 32.9 seconds |
| Started | Sep 11 08:27:18 AM UTC 24 |
| Finished | Sep 11 08:27:52 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427465328 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.2427465328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.3160236755 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 794465915 ps |
| CPU time | 2.44 seconds |
| Started | Sep 11 08:27:19 AM UTC 24 |
| Finished | Sep 11 08:27:23 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160236755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_disable_endpoint.3160236755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.1892878438 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 133514695 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:27:19 AM UTC 24 |
| Finished | Sep 11 08:27:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1892878438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_disconnected.1892878438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_enable.1617783338 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 34985373 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:27:19 AM UTC 24 |
| Finished | Sep 11 08:27:21 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1617783338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.1617783338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.4108285518 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 779440904 ps |
| CPU time | 3.45 seconds |
| Started | Sep 11 08:27:21 AM UTC 24 |
| Finished | Sep 11 08:27:25 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4108285518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.4108285518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.2341213000 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 398068845 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:27:21 AM UTC 24 |
| Finished | Sep 11 08:27:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341213000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.2341213000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.1786786034 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 292506018 ps |
| CPU time | 3.68 seconds |
| Started | Sep 11 08:27:21 AM UTC 24 |
| Finished | Sep 11 08:27:26 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786786034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.1786786034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.817500840 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 203889594 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:27:23 AM UTC 24 |
| Finished | Sep 11 08:27:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=817500840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.817500840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.3216030400 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 170791401 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:27:23 AM UTC 24 |
| Finished | Sep 11 08:27:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216030400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_stall.3216030400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.2042052064 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 217029320 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:27:23 AM UTC 24 |
| Finished | Sep 11 08:27:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2042052064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.2042052064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.2732724634 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 5015543791 ps |
| CPU time | 41.84 seconds |
| Started | Sep 11 08:27:21 AM UTC 24 |
| Finished | Sep 11 08:28:04 AM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732724634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.2732724634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.2933738217 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 7745977009 ps |
| CPU time | 52.44 seconds |
| Started | Sep 11 08:27:23 AM UTC 24 |
| Finished | Sep 11 08:28:17 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933738217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.2933738217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.825659329 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 227562328 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:27:23 AM UTC 24 |
| Finished | Sep 11 08:27:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825659329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_link_in_err.825659329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.1049555675 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 16201410010 ps |
| CPU time | 25.19 seconds |
| Started | Sep 11 08:27:23 AM UTC 24 |
| Finished | Sep 11 08:27:49 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1049555675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.1049555675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.3118944760 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 5236071153 ps |
| CPU time | 8.32 seconds |
| Started | Sep 11 08:27:24 AM UTC 24 |
| Finished | Sep 11 08:27:33 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118944760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.3118944760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.4131021280 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 4357458009 ps |
| CPU time | 33.8 seconds |
| Started | Sep 11 08:27:24 AM UTC 24 |
| Finished | Sep 11 08:27:59 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4131021280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.4131021280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.2865395772 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 3616428268 ps |
| CPU time | 35.65 seconds |
| Started | Sep 11 08:27:24 AM UTC 24 |
| Finished | Sep 11 08:28:01 AM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865395772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.2865395772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.2551728042 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 238782521 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:27:24 AM UTC 24 |
| Finished | Sep 11 08:27:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551728042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.2551728042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.3045840199 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 203318672 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:27:26 AM UTC 24 |
| Finished | Sep 11 08:27:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045840199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.3045840199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.1864549322 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 2317155744 ps |
| CPU time | 22.06 seconds |
| Started | Sep 11 08:27:26 AM UTC 24 |
| Finished | Sep 11 08:27:49 AM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864549322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.1864549322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.4285935838 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 2409635366 ps |
| CPU time | 63.92 seconds |
| Started | Sep 11 08:27:26 AM UTC 24 |
| Finished | Sep 11 08:28:31 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285935838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.4285935838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.2412944431 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 148272404 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:27:26 AM UTC 24 |
| Finished | Sep 11 08:27:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2412944431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.2412944431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.752660028 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 153188555 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:27:26 AM UTC 24 |
| Finished | Sep 11 08:27:28 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=752660028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.752660028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.2626610377 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 223600797 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:27:28 AM UTC 24 |
| Finished | Sep 11 08:27:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2626610377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.2626610377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.2571299942 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 190288192 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:27:28 AM UTC 24 |
| Finished | Sep 11 08:27:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2571299942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_out_iso.2571299942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.260881710 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 192964573 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:27:28 AM UTC 24 |
| Finished | Sep 11 08:27:31 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=260881710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_out_stall.260881710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.3472736938 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 163728220 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:27:28 AM UTC 24 |
| Finished | Sep 11 08:27:31 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472736938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_out_trans_nak.3472736938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.3258456283 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 200058162 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:27:29 AM UTC 24 |
| Finished | Sep 11 08:27:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258456283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.3258456283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.363765366 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 225271050 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:27:29 AM UTC 24 |
| Finished | Sep 11 08:27:32 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=363765366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.363765366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.2945188513 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 145935473 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:27:29 AM UTC 24 |
| Finished | Sep 11 08:27:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2945188513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.2945188513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.3790565299 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 35150435 ps |
| CPU time | 0.85 seconds |
| Started | Sep 11 08:27:29 AM UTC 24 |
| Finished | Sep 11 08:27:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3790565299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.3790565299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.2602247070 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 15068478740 ps |
| CPU time | 41.16 seconds |
| Started | Sep 11 08:27:31 AM UTC 24 |
| Finished | Sep 11 08:28:14 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2602247070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.2602247070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.4206760138 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 165695432 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:27:31 AM UTC 24 |
| Finished | Sep 11 08:27:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206760138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_pkt_received.4206760138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.2971705958 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 193215111 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:27:31 AM UTC 24 |
| Finished | Sep 11 08:27:34 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971705958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.2971705958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.664159670 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 191394002 ps |
| CPU time | 1.2 seconds |
| Started | Sep 11 08:27:31 AM UTC 24 |
| Finished | Sep 11 08:27:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=664159670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_random_length_in_transaction.664159670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.3753348245 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 180438233 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:27:31 AM UTC 24 |
| Finished | Sep 11 08:27:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753348245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.3753348245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.325258507 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 140157314 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:27:31 AM UTC 24 |
| Finished | Sep 11 08:27:34 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=325258507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_rx_crc_err.325258507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.2888731212 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 252992809 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:27:33 AM UTC 24 |
| Finished | Sep 11 08:27:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888731212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.2888731212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.1148305925 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 168739612 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:27:33 AM UTC 24 |
| Finished | Sep 11 08:27:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148305925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.1148305925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.3103452162 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 182920945 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:27:33 AM UTC 24 |
| Finished | Sep 11 08:27:37 AM UTC 24 |
| Peak memory | 214856 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3103452162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.3103452162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.927615608 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 185745079 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:27:33 AM UTC 24 |
| Finished | Sep 11 08:27:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=927615608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.927615608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.1127406931 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 3180545273 ps |
| CPU time | 24.16 seconds |
| Started | Sep 11 08:27:33 AM UTC 24 |
| Finished | Sep 11 08:28:00 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127406931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.1127406931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.2037517513 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 185623885 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:27:33 AM UTC 24 |
| Finished | Sep 11 08:27:36 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037517513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.2037517513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.3694009297 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 153681167 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:27:33 AM UTC 24 |
| Finished | Sep 11 08:27:36 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694009297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_stall_trans.3694009297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.887316540 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 1264749294 ps |
| CPU time | 3.31 seconds |
| Started | Sep 11 08:27:33 AM UTC 24 |
| Finished | Sep 11 08:27:39 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=887316540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_stream_len_max.887316540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.1603483346 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 2898694481 ps |
| CPU time | 20.23 seconds |
| Started | Sep 11 08:27:33 AM UTC 24 |
| Finished | Sep 11 08:27:56 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1603483346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_streaming_out.1603483346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.3975028365 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 2212955769 ps |
| CPU time | 14.65 seconds |
| Started | Sep 11 08:27:19 AM UTC 24 |
| Finished | Sep 11 08:27:35 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975028365 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.3975028365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.4005392126 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 589433991 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:27:35 AM UTC 24 |
| Finished | Sep 11 08:27:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4005392126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.4005392126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.3406870003 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 544664028 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:36:51 AM UTC 24 |
| Finished | Sep 11 08:36:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3406870003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.3406870003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.1877169012 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 608650524 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:36:51 AM UTC 24 |
| Finished | Sep 11 08:37:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1877169012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_ tx_rx_disruption.1877169012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.2957918236 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 656078775 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:36:51 AM UTC 24 |
| Finished | Sep 11 08:37:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2957918236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.2957918236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.3379789014 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 458602104 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:36:52 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3379789014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.3379789014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.2490626149 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 544903255 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:36:52 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2490626149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.2490626149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.3629331579 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 581966299 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:36:52 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3629331579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.3629331579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.4015460154 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 495858679 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:36:52 AM UTC 24 |
| Finished | Sep 11 08:36:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4015460154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.4015460154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.2038220065 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 627668100 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:36:52 AM UTC 24 |
| Finished | Sep 11 08:36:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2038220065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.2038220065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.4035613396 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 432509987 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:36:52 AM UTC 24 |
| Finished | Sep 11 08:36:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4035613396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.4035613396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.3778020058 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 566445335 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:36:52 AM UTC 24 |
| Finished | Sep 11 08:36:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3778020058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.3778020058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.1112779204 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 37456032 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:27:52 AM UTC 24 |
| Finished | Sep 11 08:27:55 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112779204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.1112779204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.1700473421 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 9099945676 ps |
| CPU time | 16.81 seconds |
| Started | Sep 11 08:27:35 AM UTC 24 |
| Finished | Sep 11 08:27:54 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700473421 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.1700473421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.3761051373 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 13429486723 ps |
| CPU time | 18.21 seconds |
| Started | Sep 11 08:27:35 AM UTC 24 |
| Finished | Sep 11 08:27:55 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3761051373 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.3761051373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.3485925704 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 29363033491 ps |
| CPU time | 40.16 seconds |
| Started | Sep 11 08:27:35 AM UTC 24 |
| Finished | Sep 11 08:28:17 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485925704 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.3485925704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.1789927496 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 205399861 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:27:35 AM UTC 24 |
| Finished | Sep 11 08:27:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1789927496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.1789927496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.2949281450 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 150806478 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:27:35 AM UTC 24 |
| Finished | Sep 11 08:27:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949281450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.2949281450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.442504004 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 255550560 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:27:37 AM UTC 24 |
| Finished | Sep 11 08:27:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=442504004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_data_toggle_clear.442504004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.4184212099 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 963519609 ps |
| CPU time | 2.84 seconds |
| Started | Sep 11 08:27:37 AM UTC 24 |
| Finished | Sep 11 08:27:41 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4184212099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.4184212099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.3113684605 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 30453291387 ps |
| CPU time | 59.84 seconds |
| Started | Sep 11 08:27:38 AM UTC 24 |
| Finished | Sep 11 08:28:40 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113684605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.3113684605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.2823369017 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 4324232384 ps |
| CPU time | 38.62 seconds |
| Started | Sep 11 08:27:38 AM UTC 24 |
| Finished | Sep 11 08:28:19 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823369017 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.2823369017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.3503073551 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 772359497 ps |
| CPU time | 2.27 seconds |
| Started | Sep 11 08:27:38 AM UTC 24 |
| Finished | Sep 11 08:27:42 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3503073551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.3503073551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.2829739996 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 152710007 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:27:39 AM UTC 24 |
| Finished | Sep 11 08:27:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2829739996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.2829739996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_enable.987187278 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 115710544 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:27:39 AM UTC 24 |
| Finished | Sep 11 08:27:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=987187278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_enable.987187278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.761507187 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 843847222 ps |
| CPU time | 2.81 seconds |
| Started | Sep 11 08:27:39 AM UTC 24 |
| Finished | Sep 11 08:27:43 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761507187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.761507187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.281060103 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 692157065 ps |
| CPU time | 2.77 seconds |
| Started | Sep 11 08:27:39 AM UTC 24 |
| Finished | Sep 11 08:27:43 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=281060103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.281060103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.3198532976 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 276285248 ps |
| CPU time | 1.87 seconds |
| Started | Sep 11 08:27:39 AM UTC 24 |
| Finished | Sep 11 08:27:42 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198532976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_fifo_levels.3198532976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.412524383 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 331722214 ps |
| CPU time | 3.31 seconds |
| Started | Sep 11 08:27:39 AM UTC 24 |
| Finished | Sep 11 08:27:43 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=412524383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_fifo_rst.412524383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.684367069 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 185635114 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:27:40 AM UTC 24 |
| Finished | Sep 11 08:27:42 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=684367069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.684367069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.2880173847 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 205653601 ps |
| CPU time | 1.2 seconds |
| Started | Sep 11 08:27:40 AM UTC 24 |
| Finished | Sep 11 08:27:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880173847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_stall.2880173847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.1308196779 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 185379607 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:27:40 AM UTC 24 |
| Finished | Sep 11 08:27:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308196779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.1308196779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.3695213362 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 3435926357 ps |
| CPU time | 89.6 seconds |
| Started | Sep 11 08:27:39 AM UTC 24 |
| Finished | Sep 11 08:29:11 AM UTC 24 |
| Peak memory | 234348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3695213362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.3695213362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.1776933751 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 7946564683 ps |
| CPU time | 92.98 seconds |
| Started | Sep 11 08:27:40 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776933751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.1776933751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.2158350713 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 202024907 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:27:42 AM UTC 24 |
| Finished | Sep 11 08:27:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2158350713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_in_err.2158350713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.3205878268 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 25383683423 ps |
| CPU time | 41.41 seconds |
| Started | Sep 11 08:27:42 AM UTC 24 |
| Finished | Sep 11 08:28:25 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205878268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_resume.3205878268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.272912885 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 9895564285 ps |
| CPU time | 15.29 seconds |
| Started | Sep 11 08:27:42 AM UTC 24 |
| Finished | Sep 11 08:27:59 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272912885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_suspend.272912885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.4292952292 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 3391188723 ps |
| CPU time | 31.06 seconds |
| Started | Sep 11 08:27:42 AM UTC 24 |
| Finished | Sep 11 08:28:15 AM UTC 24 |
| Peak memory | 229808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4292952292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.4292952292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.863378302 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 3817091169 ps |
| CPU time | 27.71 seconds |
| Started | Sep 11 08:27:43 AM UTC 24 |
| Finished | Sep 11 08:28:12 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=863378302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.863378302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.2995451658 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 252342131 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:27:43 AM UTC 24 |
| Finished | Sep 11 08:27:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995451658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.2995451658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.1340654098 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 223249706 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:27:43 AM UTC 24 |
| Finished | Sep 11 08:27:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340654098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.1340654098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.2027311522 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 3031459684 ps |
| CPU time | 22.81 seconds |
| Started | Sep 11 08:27:44 AM UTC 24 |
| Finished | Sep 11 08:28:08 AM UTC 24 |
| Peak memory | 234208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2027311522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.2027311522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.996586840 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 1494273558 ps |
| CPU time | 36.4 seconds |
| Started | Sep 11 08:27:44 AM UTC 24 |
| Finished | Sep 11 08:28:22 AM UTC 24 |
| Peak memory | 233964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=996586840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.996586840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.753873522 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 181460371 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:27:44 AM UTC 24 |
| Finished | Sep 11 08:27:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=753873522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.753873522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.1687131328 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 156893789 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:27:44 AM UTC 24 |
| Finished | Sep 11 08:27:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687131328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.1687131328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.1336114375 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 185596326 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:27:44 AM UTC 24 |
| Finished | Sep 11 08:27:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336114375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_nak_trans.1336114375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.2362247250 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 176536173 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:27:45 AM UTC 24 |
| Finished | Sep 11 08:27:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2362247250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.2362247250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.3624187062 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 164189657 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:27:45 AM UTC 24 |
| Finished | Sep 11 08:27:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3624187062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_out_stall.3624187062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.3308994541 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 171708917 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:27:46 AM UTC 24 |
| Finished | Sep 11 08:27:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308994541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.3308994541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.269918576 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 149094515 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:27:46 AM UTC 24 |
| Finished | Sep 11 08:27:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269918576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pending_in_trans.269918576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.129025834 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 237700616 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:27:46 AM UTC 24 |
| Finished | Sep 11 08:27:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=129025834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.129025834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.598169051 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 185245099 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:27:46 AM UTC 24 |
| Finished | Sep 11 08:27:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598169051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.598169051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.1308940839 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 69177546 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:27:46 AM UTC 24 |
| Finished | Sep 11 08:27:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308940839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.1308940839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.897293524 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 13071831170 ps |
| CPU time | 42.29 seconds |
| Started | Sep 11 08:27:48 AM UTC 24 |
| Finished | Sep 11 08:28:33 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=897293524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_pkt_buffer.897293524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.3362973875 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 180018280 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:27:49 AM UTC 24 |
| Finished | Sep 11 08:27:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362973875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.3362973875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.4160473083 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 182215569 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:27:49 AM UTC 24 |
| Finished | Sep 11 08:27:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160473083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_pkt_sent.4160473083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.3000008877 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 289601367 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:27:49 AM UTC 24 |
| Finished | Sep 11 08:27:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3000008877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_random_length_in_transaction.3000008877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.1541157014 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 173927130 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:27:49 AM UTC 24 |
| Finished | Sep 11 08:27:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541157014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.1541157014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.4123726960 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 150396600 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:27:49 AM UTC 24 |
| Finished | Sep 11 08:27:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123726960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.4123726960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.3906839965 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 250885710 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:27:49 AM UTC 24 |
| Finished | Sep 11 08:27:52 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906839965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_full.3906839965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.1393836323 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 148947768 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:27:49 AM UTC 24 |
| Finished | Sep 11 08:27:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393836323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_setup_stage.1393836323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.347447917 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 150373076 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:27:49 AM UTC 24 |
| Finished | Sep 11 08:27:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347447917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 21.usbdev_setup_trans_ignored.347447917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.1127852965 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 220545593 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:27:50 AM UTC 24 |
| Finished | Sep 11 08:27:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127852965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.1127852965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.4239825533 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 2686200199 ps |
| CPU time | 21.06 seconds |
| Started | Sep 11 08:27:50 AM UTC 24 |
| Finished | Sep 11 08:28:13 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239825533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.4239825533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.2165473804 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 206792589 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:27:50 AM UTC 24 |
| Finished | Sep 11 08:27:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165473804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.2165473804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.1515779258 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 162174268 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:27:51 AM UTC 24 |
| Finished | Sep 11 08:27:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515779258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.1515779258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.1581587654 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 1267391766 ps |
| CPU time | 4.83 seconds |
| Started | Sep 11 08:27:51 AM UTC 24 |
| Finished | Sep 11 08:27:57 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581587654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.1581587654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.2853532632 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 2271427214 ps |
| CPU time | 62.41 seconds |
| Started | Sep 11 08:27:51 AM UTC 24 |
| Finished | Sep 11 08:28:55 AM UTC 24 |
| Peak memory | 227656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853532632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.2853532632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.1508118325 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 2314174622 ps |
| CPU time | 13.97 seconds |
| Started | Sep 11 08:27:38 AM UTC 24 |
| Finished | Sep 11 08:27:54 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508118325 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.1508118325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.309659561 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 608472628 ps |
| CPU time | 2.97 seconds |
| Started | Sep 11 08:27:51 AM UTC 24 |
| Finished | Sep 11 08:27:55 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=309659561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_tx _rx_disruption.309659561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.235842137 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 495592427 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=235842137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_t x_rx_disruption.235842137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.2124416498 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 513166229 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2124416498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.2124416498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.4017814246 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 553223349 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4017814246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.4017814246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.3619397375 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 464661666 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3619397375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_ tx_rx_disruption.3619397375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.3851285610 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 463619158 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3851285610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_ tx_rx_disruption.3851285610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.3286862115 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 627972726 ps |
| CPU time | 1.8 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3286862115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.3286862115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.1388014834 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 542940582 ps |
| CPU time | 1.92 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1388014834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_ tx_rx_disruption.1388014834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.3926497953 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 632648186 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3926497953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.3926497953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.2759967809 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 574758458 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2759967809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.2759967809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.758987183 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 39721473 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:28:06 AM UTC 24 |
| Finished | Sep 11 08:28:08 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=758987183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.758987183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.1666092967 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 10253437562 ps |
| CPU time | 17.21 seconds |
| Started | Sep 11 08:27:53 AM UTC 24 |
| Finished | Sep 11 08:28:11 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666092967 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.1666092967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.3770505256 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 19238445763 ps |
| CPU time | 29.7 seconds |
| Started | Sep 11 08:27:53 AM UTC 24 |
| Finished | Sep 11 08:28:24 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770505256 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.3770505256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.206140822 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 26250088806 ps |
| CPU time | 45.16 seconds |
| Started | Sep 11 08:27:53 AM UTC 24 |
| Finished | Sep 11 08:28:40 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=206140822 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.206140822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.3460670273 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 205176432 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:27:53 AM UTC 24 |
| Finished | Sep 11 08:27:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460670273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.3460670273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.983084269 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 148033762 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:27:53 AM UTC 24 |
| Finished | Sep 11 08:27:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=983084269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_bitstuff_err.983084269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.734058672 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 569880865 ps |
| CPU time | 1.94 seconds |
| Started | Sep 11 08:27:53 AM UTC 24 |
| Finished | Sep 11 08:27:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=734058672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_data_toggle_clear.734058672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.238882189 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 42171873517 ps |
| CPU time | 86.96 seconds |
| Started | Sep 11 08:27:54 AM UTC 24 |
| Finished | Sep 11 08:29:23 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=238882189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_device_address.238882189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.680600819 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 4774278255 ps |
| CPU time | 41.79 seconds |
| Started | Sep 11 08:27:54 AM UTC 24 |
| Finished | Sep 11 08:28:37 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=680600819 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.680600819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.2999421532 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 728897231 ps |
| CPU time | 2.81 seconds |
| Started | Sep 11 08:27:54 AM UTC 24 |
| Finished | Sep 11 08:27:58 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999421532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.2999421532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.40142950 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 210137647 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:27:56 AM UTC 24 |
| Finished | Sep 11 08:27:58 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40142950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_disconnected.40142950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_enable.2348623446 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 46892651 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:27:56 AM UTC 24 |
| Finished | Sep 11 08:27:58 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348623446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.2348623446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.3783488076 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 749958626 ps |
| CPU time | 3.18 seconds |
| Started | Sep 11 08:27:56 AM UTC 24 |
| Finished | Sep 11 08:28:00 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783488076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.3783488076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.3703887533 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 608124765 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:27:56 AM UTC 24 |
| Finished | Sep 11 08:27:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703887533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.3703887533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.513618722 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 254408393 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:27:56 AM UTC 24 |
| Finished | Sep 11 08:27:59 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=513618722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_fifo_levels.513618722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.3224810730 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 472024445 ps |
| CPU time | 3.77 seconds |
| Started | Sep 11 08:27:56 AM UTC 24 |
| Finished | Sep 11 08:28:01 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3224810730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.3224810730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.3524185326 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 237559263 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:27:57 AM UTC 24 |
| Finished | Sep 11 08:28:00 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524185326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.3524185326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.3399720927 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 147912521 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:27:57 AM UTC 24 |
| Finished | Sep 11 08:28:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399720927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.3399720927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.2060811940 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 169805364 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:27:57 AM UTC 24 |
| Finished | Sep 11 08:27:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060811940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_trans.2060811940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.4089543142 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 4274924961 ps |
| CPU time | 108 seconds |
| Started | Sep 11 08:27:56 AM UTC 24 |
| Finished | Sep 11 08:29:46 AM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089543142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.4089543142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.2411203394 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 7739426164 ps |
| CPU time | 49.35 seconds |
| Started | Sep 11 08:27:57 AM UTC 24 |
| Finished | Sep 11 08:28:48 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411203394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.2411203394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.3734097743 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 179849527 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:27:58 AM UTC 24 |
| Finished | Sep 11 08:28:00 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734097743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_in_err.3734097743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.2765346964 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 22284020563 ps |
| CPU time | 26.9 seconds |
| Started | Sep 11 08:27:58 AM UTC 24 |
| Finished | Sep 11 08:28:26 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765346964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.2765346964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.1680303397 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 10427452624 ps |
| CPU time | 18.09 seconds |
| Started | Sep 11 08:27:58 AM UTC 24 |
| Finished | Sep 11 08:28:17 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680303397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_link_suspend.1680303397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.902200113 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 4235310230 ps |
| CPU time | 31.18 seconds |
| Started | Sep 11 08:27:58 AM UTC 24 |
| Finished | Sep 11 08:28:30 AM UTC 24 |
| Peak memory | 234136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=902200113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.902200113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.3970778307 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 2804009185 ps |
| CPU time | 20.22 seconds |
| Started | Sep 11 08:27:58 AM UTC 24 |
| Finished | Sep 11 08:28:19 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970778307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.3970778307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.320681455 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 261366619 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:27:59 AM UTC 24 |
| Finished | Sep 11 08:28:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=320681455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.320681455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.3243662814 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 207174918 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:27:59 AM UTC 24 |
| Finished | Sep 11 08:28:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243662814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.3243662814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.1253843530 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 2876793528 ps |
| CPU time | 73.71 seconds |
| Started | Sep 11 08:27:59 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253843530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.1253843530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.3090980266 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 2228968817 ps |
| CPU time | 63.7 seconds |
| Started | Sep 11 08:27:59 AM UTC 24 |
| Finished | Sep 11 08:29:05 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3090980266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.3090980266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.2330610147 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 166279450 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:27:59 AM UTC 24 |
| Finished | Sep 11 08:28:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2330610147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.2330610147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.356438770 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 158634978 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:27:59 AM UTC 24 |
| Finished | Sep 11 08:28:02 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356438770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.356438770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.3627869469 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 216018239 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:27:59 AM UTC 24 |
| Finished | Sep 11 08:28:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627869469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.3627869469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.1190182688 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 163776743 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:28:01 AM UTC 24 |
| Finished | Sep 11 08:28:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190182688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_out_iso.1190182688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.2818736466 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 172657181 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:28:01 AM UTC 24 |
| Finished | Sep 11 08:28:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2818736466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_out_stall.2818736466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.3100802500 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 156113749 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:28:01 AM UTC 24 |
| Finished | Sep 11 08:28:03 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100802500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.3100802500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.1621616762 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 162837096 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:28:01 AM UTC 24 |
| Finished | Sep 11 08:28:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621616762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.1621616762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.1087302661 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 245962284 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:28:01 AM UTC 24 |
| Finished | Sep 11 08:28:04 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1087302661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.1087302661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.1242308214 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 142731463 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:28:01 AM UTC 24 |
| Finished | Sep 11 08:28:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242308214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.1242308214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.3038479399 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 75602422 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:28:01 AM UTC 24 |
| Finished | Sep 11 08:28:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3038479399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.3038479399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.721013136 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 20260424967 ps |
| CPU time | 56.97 seconds |
| Started | Sep 11 08:28:01 AM UTC 24 |
| Finished | Sep 11 08:29:00 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=721013136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_pkt_buffer.721013136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.969860768 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 190030063 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:28:01 AM UTC 24 |
| Finished | Sep 11 08:28:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=969860768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_pkt_received.969860768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.3017983953 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 205854543 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:28:03 AM UTC 24 |
| Finished | Sep 11 08:28:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017983953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.3017983953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.193808448 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 169683139 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:28:03 AM UTC 24 |
| Finished | Sep 11 08:28:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=193808448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_random_length_in_transaction.193808448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.2723009052 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 161795211 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:28:03 AM UTC 24 |
| Finished | Sep 11 08:28:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723009052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.2723009052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.714784112 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 159034741 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:28:03 AM UTC 24 |
| Finished | Sep 11 08:28:05 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=714784112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_rx_crc_err.714784112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.1696648061 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 284808586 ps |
| CPU time | 1.82 seconds |
| Started | Sep 11 08:28:03 AM UTC 24 |
| Finished | Sep 11 08:28:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696648061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_rx_full.1696648061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.1413320766 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 220563039 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:28:03 AM UTC 24 |
| Finished | Sep 11 08:28:05 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1413320766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.1413320766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.477995552 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 147655880 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:28:03 AM UTC 24 |
| Finished | Sep 11 08:28:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477995552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 22.usbdev_setup_trans_ignored.477995552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.4276299322 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 235551121 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:28:04 AM UTC 24 |
| Finished | Sep 11 08:28:07 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276299322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.4276299322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.3997395775 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 2569577462 ps |
| CPU time | 74.26 seconds |
| Started | Sep 11 08:28:04 AM UTC 24 |
| Finished | Sep 11 08:29:20 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3997395775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.3997395775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.1451890444 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 175262912 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:28:04 AM UTC 24 |
| Finished | Sep 11 08:28:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1451890444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.1451890444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.2354754453 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 159170754 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:28:04 AM UTC 24 |
| Finished | Sep 11 08:28:07 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2354754453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.2354754453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.2949334229 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 447824043 ps |
| CPU time | 2.45 seconds |
| Started | Sep 11 08:28:05 AM UTC 24 |
| Finished | Sep 11 08:28:08 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949334229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.2949334229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.1158525894 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 3760300797 ps |
| CPU time | 29.47 seconds |
| Started | Sep 11 08:28:04 AM UTC 24 |
| Finished | Sep 11 08:28:35 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158525894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_streaming_out.1158525894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.3818385008 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 888052358 ps |
| CPU time | 17.69 seconds |
| Started | Sep 11 08:27:54 AM UTC 24 |
| Finished | Sep 11 08:28:13 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818385008 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.3818385008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.3376706627 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 467589797 ps |
| CPU time | 2.57 seconds |
| Started | Sep 11 08:28:05 AM UTC 24 |
| Finished | Sep 11 08:28:08 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3376706627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.3376706627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.816569541 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 512708382 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=816569541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_t x_rx_disruption.816569541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.4019256144 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 445114290 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4019256144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.4019256144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.2020987752 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 612995251 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:36:55 AM UTC 24 |
| Finished | Sep 11 08:37:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2020987752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.2020987752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.4010996520 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 483540132 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:36:56 AM UTC 24 |
| Finished | Sep 11 08:37:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4010996520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_ tx_rx_disruption.4010996520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.3575129310 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 580580713 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:36:56 AM UTC 24 |
| Finished | Sep 11 08:37:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3575129310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.3575129310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.2450430805 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 506425198 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:36:57 AM UTC 24 |
| Finished | Sep 11 08:37:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2450430805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.2450430805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.1821418705 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 484952793 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:36:57 AM UTC 24 |
| Finished | Sep 11 08:37:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1821418705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.1821418705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.2712305301 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 448558442 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:36:57 AM UTC 24 |
| Finished | Sep 11 08:37:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2712305301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_ tx_rx_disruption.2712305301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.121161116 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 552435932 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:37:01 AM UTC 24 |
| Finished | Sep 11 08:37:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=121161116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_t x_rx_disruption.121161116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.2609294001 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 552143489 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:37:01 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2609294001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.2609294001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.3380343327 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 41242773 ps |
| CPU time | 1.02 seconds |
| Started | Sep 11 08:28:22 AM UTC 24 |
| Finished | Sep 11 08:28:24 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380343327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.3380343327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.995089552 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 5851661085 ps |
| CPU time | 11.26 seconds |
| Started | Sep 11 08:28:06 AM UTC 24 |
| Finished | Sep 11 08:28:19 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=995089552 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.995089552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.3929681765 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 21145469940 ps |
| CPU time | 30.9 seconds |
| Started | Sep 11 08:28:06 AM UTC 24 |
| Finished | Sep 11 08:28:38 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3929681765 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.3929681765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.2888204486 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 30242747180 ps |
| CPU time | 40.93 seconds |
| Started | Sep 11 08:28:06 AM UTC 24 |
| Finished | Sep 11 08:28:49 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888204486 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.2888204486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.808395751 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 167826411 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:28:06 AM UTC 24 |
| Finished | Sep 11 08:28:09 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=808395751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_av_buffer.808395751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.1664911307 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 147978043 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:28:06 AM UTC 24 |
| Finished | Sep 11 08:28:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664911307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_bitstuff_err.1664911307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.2032969164 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 567571416 ps |
| CPU time | 3.03 seconds |
| Started | Sep 11 08:28:06 AM UTC 24 |
| Finished | Sep 11 08:28:11 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2032969164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 23.usbdev_data_toggle_clear.2032969164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.2778801885 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 676554135 ps |
| CPU time | 3 seconds |
| Started | Sep 11 08:28:07 AM UTC 24 |
| Finished | Sep 11 08:28:11 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778801885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.2778801885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.1017704426 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 44811250610 ps |
| CPU time | 82.08 seconds |
| Started | Sep 11 08:28:07 AM UTC 24 |
| Finished | Sep 11 08:29:30 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017704426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.1017704426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.1447622345 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 757673158 ps |
| CPU time | 18.75 seconds |
| Started | Sep 11 08:28:08 AM UTC 24 |
| Finished | Sep 11 08:28:28 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447622345 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.1447622345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.3244893575 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 512241568 ps |
| CPU time | 1.93 seconds |
| Started | Sep 11 08:28:08 AM UTC 24 |
| Finished | Sep 11 08:28:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3244893575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_disable_endpoint.3244893575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.896248376 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 136544794 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:28:08 AM UTC 24 |
| Finished | Sep 11 08:28:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=896248376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_disconnected.896248376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_enable.3882465710 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 76171356 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:28:10 AM UTC 24 |
| Finished | Sep 11 08:28:12 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3882465710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.3882465710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.1530899197 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 932634384 ps |
| CPU time | 2.86 seconds |
| Started | Sep 11 08:28:10 AM UTC 24 |
| Finished | Sep 11 08:28:14 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530899197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.1530899197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.2180494737 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 549468874 ps |
| CPU time | 2.57 seconds |
| Started | Sep 11 08:28:10 AM UTC 24 |
| Finished | Sep 11 08:28:13 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180494737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.2180494737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.19458546 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 302249579 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:28:10 AM UTC 24 |
| Finished | Sep 11 08:28:13 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=19458546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_fifo_levels.19458546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.1556388597 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 230106744 ps |
| CPU time | 2.51 seconds |
| Started | Sep 11 08:28:10 AM UTC 24 |
| Finished | Sep 11 08:28:13 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556388597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.1556388597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.3067995441 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 201669872 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:28:10 AM UTC 24 |
| Finished | Sep 11 08:28:12 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067995441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.3067995441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.1231292240 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 164970206 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:28:11 AM UTC 24 |
| Finished | Sep 11 08:28:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1231292240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_stall.1231292240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.2643326618 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 219506062 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:28:11 AM UTC 24 |
| Finished | Sep 11 08:28:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2643326618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.2643326618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.2404280466 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 5351249531 ps |
| CPU time | 42.47 seconds |
| Started | Sep 11 08:28:10 AM UTC 24 |
| Finished | Sep 11 08:28:54 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404280466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.2404280466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.3835872959 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 9618644303 ps |
| CPU time | 61.43 seconds |
| Started | Sep 11 08:28:11 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3835872959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.3835872959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.1499628953 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 176543881 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:28:11 AM UTC 24 |
| Finished | Sep 11 08:28:14 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1499628953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.1499628953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.486360251 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 33297389785 ps |
| CPU time | 62.27 seconds |
| Started | Sep 11 08:28:13 AM UTC 24 |
| Finished | Sep 11 08:29:17 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=486360251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_link_resume.486360251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.1166930415 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 5866397195 ps |
| CPU time | 12.19 seconds |
| Started | Sep 11 08:28:13 AM UTC 24 |
| Finished | Sep 11 08:28:26 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166930415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_link_suspend.1166930415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.890858828 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 5015383330 ps |
| CPU time | 127.84 seconds |
| Started | Sep 11 08:28:13 AM UTC 24 |
| Finished | Sep 11 08:30:23 AM UTC 24 |
| Peak memory | 234288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=890858828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.890858828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.643275757 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 1546877387 ps |
| CPU time | 40.95 seconds |
| Started | Sep 11 08:28:13 AM UTC 24 |
| Finished | Sep 11 08:28:56 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=643275757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.643275757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.298313373 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 271277181 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:28:15 AM UTC 24 |
| Finished | Sep 11 08:28:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=298313373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.298313373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.2419778306 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 190895978 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:28:15 AM UTC 24 |
| Finished | Sep 11 08:28:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419778306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.2419778306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.379032302 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 2809623907 ps |
| CPU time | 20.67 seconds |
| Started | Sep 11 08:28:15 AM UTC 24 |
| Finished | Sep 11 08:28:37 AM UTC 24 |
| Peak memory | 229636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=379032302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.379032302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.4230791606 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 2435598872 ps |
| CPU time | 63.72 seconds |
| Started | Sep 11 08:28:15 AM UTC 24 |
| Finished | Sep 11 08:29:21 AM UTC 24 |
| Peak memory | 229636 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4230791606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.4230791606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.4256848887 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 193705384 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:28:15 AM UTC 24 |
| Finished | Sep 11 08:28:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256848887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.4256848887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.2588391460 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 191414170 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:28:15 AM UTC 24 |
| Finished | Sep 11 08:28:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2588391460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.2588391460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.85089042 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 223910842 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:28:15 AM UTC 24 |
| Finished | Sep 11 08:28:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=85089042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_iso.85089042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.3987087547 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 155474865 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:28:15 AM UTC 24 |
| Finished | Sep 11 08:28:18 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987087547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.3987087547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.120551028 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 176773772 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:28:15 AM UTC 24 |
| Finished | Sep 11 08:28:18 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=120551028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_out_trans_nak.120551028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.3999659750 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 149770923 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:28:17 AM UTC 24 |
| Finished | Sep 11 08:28:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3999659750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.3999659750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.3225541611 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 246847082 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:28:17 AM UTC 24 |
| Finished | Sep 11 08:28:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3225541611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.3225541611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.2064278617 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 156299209 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:28:18 AM UTC 24 |
| Finished | Sep 11 08:28:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064278617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.2064278617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.1804416355 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 28160636 ps |
| CPU time | 0.8 seconds |
| Started | Sep 11 08:28:18 AM UTC 24 |
| Finished | Sep 11 08:28:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1804416355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.1804416355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.32708867 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 20585183948 ps |
| CPU time | 53.16 seconds |
| Started | Sep 11 08:28:18 AM UTC 24 |
| Finished | Sep 11 08:29:13 AM UTC 24 |
| Peak memory | 231640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=32708867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_buffer.32708867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.243536073 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 168765979 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:28:18 AM UTC 24 |
| Finished | Sep 11 08:28:21 AM UTC 24 |
| Peak memory | 214820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=243536073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_pkt_received.243536073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.2634435528 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 231392828 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:28:18 AM UTC 24 |
| Finished | Sep 11 08:28:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634435528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.2634435528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.573667011 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 167872722 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:28:19 AM UTC 24 |
| Finished | Sep 11 08:28:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=573667011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_random_length_in_transaction.573667011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.2970933643 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 188590466 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:28:19 AM UTC 24 |
| Finished | Sep 11 08:28:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2970933643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.2970933643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.2222444034 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 162315263 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:28:19 AM UTC 24 |
| Finished | Sep 11 08:28:21 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222444034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.2222444034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.1308216608 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 362502132 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:28:19 AM UTC 24 |
| Finished | Sep 11 08:28:21 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308216608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_rx_full.1308216608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.2302091884 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 211379769 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:28:19 AM UTC 24 |
| Finished | Sep 11 08:28:21 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302091884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.2302091884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.2315384403 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 155710411 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:28:20 AM UTC 24 |
| Finished | Sep 11 08:28:23 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315384403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.2315384403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.20037873 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 248447175 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:28:20 AM UTC 24 |
| Finished | Sep 11 08:28:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=20037873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 23.usbdev_smoke.20037873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.2246624337 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 2001702435 ps |
| CPU time | 24.18 seconds |
| Started | Sep 11 08:28:20 AM UTC 24 |
| Finished | Sep 11 08:28:46 AM UTC 24 |
| Peak memory | 229380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246624337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.2246624337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.3609527844 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 177136020 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:28:20 AM UTC 24 |
| Finished | Sep 11 08:28:23 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609527844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.3609527844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.2796739716 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 187736856 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:28:20 AM UTC 24 |
| Finished | Sep 11 08:28:23 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2796739716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.2796739716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.254772912 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 811267753 ps |
| CPU time | 2.52 seconds |
| Started | Sep 11 08:28:22 AM UTC 24 |
| Finished | Sep 11 08:28:25 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=254772912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_stream_len_max.254772912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.2117916146 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 2651300359 ps |
| CPU time | 22.67 seconds |
| Started | Sep 11 08:28:20 AM UTC 24 |
| Finished | Sep 11 08:28:44 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117916146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_streaming_out.2117916146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.687701466 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 1530963921 ps |
| CPU time | 14.24 seconds |
| Started | Sep 11 08:28:08 AM UTC 24 |
| Finished | Sep 11 08:28:23 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=687701466 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.687701466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.552524091 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 477294336 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:37:01 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=552524091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_t x_rx_disruption.552524091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.1026988891 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 555149254 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:37:01 AM UTC 24 |
| Finished | Sep 11 08:37:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1026988891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.1026988891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.2815138354 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 601141341 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:37:04 AM UTC 24 |
| Finished | Sep 11 08:37:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2815138354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_ tx_rx_disruption.2815138354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.3274378414 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 563385513 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:37:04 AM UTC 24 |
| Finished | Sep 11 08:37:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3274378414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.3274378414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.3553916132 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 470538670 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:37:04 AM UTC 24 |
| Finished | Sep 11 08:37:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3553916132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_ tx_rx_disruption.3553916132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.1109309023 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 588044148 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:37:04 AM UTC 24 |
| Finished | Sep 11 08:37:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1109309023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.1109309023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.3243181039 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 478451838 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3243181039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_ tx_rx_disruption.3243181039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.1505120732 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 591916535 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1505120732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.1505120732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.4076813196 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 558575488 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4076813196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.4076813196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.2488974046 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 548235796 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2488974046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_ tx_rx_disruption.2488974046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.1627037406 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 38455367 ps |
| CPU time | 0.82 seconds |
| Started | Sep 11 08:28:39 AM UTC 24 |
| Finished | Sep 11 08:28:41 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1627037406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.1627037406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.2496786659 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 10719022334 ps |
| CPU time | 19.73 seconds |
| Started | Sep 11 08:28:22 AM UTC 24 |
| Finished | Sep 11 08:28:43 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496786659 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.2496786659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.4172674298 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 20601202623 ps |
| CPU time | 32.03 seconds |
| Started | Sep 11 08:28:22 AM UTC 24 |
| Finished | Sep 11 08:28:55 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172674298 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.4172674298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.2486161629 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 26345413461 ps |
| CPU time | 39.62 seconds |
| Started | Sep 11 08:28:22 AM UTC 24 |
| Finished | Sep 11 08:29:03 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2486161629 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.2486161629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.89778284 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 226664669 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:28:22 AM UTC 24 |
| Finished | Sep 11 08:28:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=89778284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_av_buffer.89778284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.2374549552 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 174976826 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:28:24 AM UTC 24 |
| Finished | Sep 11 08:28:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2374549552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.2374549552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.835119881 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 583789256 ps |
| CPU time | 3.21 seconds |
| Started | Sep 11 08:28:24 AM UTC 24 |
| Finished | Sep 11 08:28:28 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=835119881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_data_toggle_clear.835119881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.691548613 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 559884039 ps |
| CPU time | 2.05 seconds |
| Started | Sep 11 08:28:24 AM UTC 24 |
| Finished | Sep 11 08:28:27 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=691548613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.691548613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.1677528579 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 21328970066 ps |
| CPU time | 36.38 seconds |
| Started | Sep 11 08:28:24 AM UTC 24 |
| Finished | Sep 11 08:29:01 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677528579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.1677528579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.1646774889 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 2942281263 ps |
| CPU time | 20.67 seconds |
| Started | Sep 11 08:28:24 AM UTC 24 |
| Finished | Sep 11 08:28:46 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646774889 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.1646774889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.639581323 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 815834859 ps |
| CPU time | 2.46 seconds |
| Started | Sep 11 08:28:25 AM UTC 24 |
| Finished | Sep 11 08:28:29 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=639581323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_disable_endpoint.639581323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.1638721039 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 177966714 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:28:25 AM UTC 24 |
| Finished | Sep 11 08:28:28 AM UTC 24 |
| Peak memory | 214952 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1638721039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.1638721039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_enable.2391232699 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 35046849 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:28:25 AM UTC 24 |
| Finished | Sep 11 08:28:27 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391232699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.2391232699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.1437826835 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 899088454 ps |
| CPU time | 3.21 seconds |
| Started | Sep 11 08:28:25 AM UTC 24 |
| Finished | Sep 11 08:28:30 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437826835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.1437826835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.1085677716 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 295505240 ps |
| CPU time | 2.03 seconds |
| Started | Sep 11 08:28:27 AM UTC 24 |
| Finished | Sep 11 08:28:30 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1085677716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_fifo_levels.1085677716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.2661268864 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 231669632 ps |
| CPU time | 1.84 seconds |
| Started | Sep 11 08:28:27 AM UTC 24 |
| Finished | Sep 11 08:28:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2661268864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.2661268864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.1852889134 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 195561885 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:28:27 AM UTC 24 |
| Finished | Sep 11 08:28:30 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852889134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.1852889134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.934098754 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 145536885 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:28:27 AM UTC 24 |
| Finished | Sep 11 08:28:29 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=934098754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_in_stall.934098754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.2884465439 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 167486552 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:28:27 AM UTC 24 |
| Finished | Sep 11 08:28:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884465439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.2884465439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.695236180 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 5578388070 ps |
| CPU time | 150.69 seconds |
| Started | Sep 11 08:28:27 AM UTC 24 |
| Finished | Sep 11 08:31:00 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=695236180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.695236180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.1729658899 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 12734831210 ps |
| CPU time | 88.45 seconds |
| Started | Sep 11 08:28:28 AM UTC 24 |
| Finished | Sep 11 08:29:59 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729658899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.1729658899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.1684358427 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 191319637 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:28:28 AM UTC 24 |
| Finished | Sep 11 08:28:31 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684358427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_in_err.1684358427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.3042220292 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 12597220784 ps |
| CPU time | 20.26 seconds |
| Started | Sep 11 08:28:28 AM UTC 24 |
| Finished | Sep 11 08:28:50 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042220292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_resume.3042220292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.2322374429 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 8501426957 ps |
| CPU time | 16.7 seconds |
| Started | Sep 11 08:28:30 AM UTC 24 |
| Finished | Sep 11 08:28:48 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322374429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_link_suspend.2322374429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.3819481289 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 3962751488 ps |
| CPU time | 105.99 seconds |
| Started | Sep 11 08:28:30 AM UTC 24 |
| Finished | Sep 11 08:30:18 AM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3819481289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.3819481289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.270027158 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 3363402084 ps |
| CPU time | 33.49 seconds |
| Started | Sep 11 08:28:30 AM UTC 24 |
| Finished | Sep 11 08:29:05 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=270027158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.270027158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.1327347854 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 238590905 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:28:31 AM UTC 24 |
| Finished | Sep 11 08:28:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1327347854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.1327347854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.2764687131 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 193389795 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:28:31 AM UTC 24 |
| Finished | Sep 11 08:28:34 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764687131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.2764687131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.2239094955 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 2229127102 ps |
| CPU time | 16.5 seconds |
| Started | Sep 11 08:28:32 AM UTC 24 |
| Finished | Sep 11 08:28:49 AM UTC 24 |
| Peak memory | 234036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239094955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.2239094955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.1130200432 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 3570604106 ps |
| CPU time | 27.24 seconds |
| Started | Sep 11 08:28:32 AM UTC 24 |
| Finished | Sep 11 08:29:00 AM UTC 24 |
| Peak memory | 227584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130200432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.1130200432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.3227100809 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 170445211 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:28:32 AM UTC 24 |
| Finished | Sep 11 08:28:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3227100809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.3227100809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.789767165 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 147757755 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:28:32 AM UTC 24 |
| Finished | Sep 11 08:28:34 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=789767165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.789767165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.2155168835 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 234826441 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:28:32 AM UTC 24 |
| Finished | Sep 11 08:28:34 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155168835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.2155168835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.1830054308 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 165850383 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:28:32 AM UTC 24 |
| Finished | Sep 11 08:28:34 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830054308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_out_iso.1830054308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.2279741468 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 167219603 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:28:32 AM UTC 24 |
| Finished | Sep 11 08:28:34 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279741468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.2279741468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.318022686 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 202641081 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:28:32 AM UTC 24 |
| Finished | Sep 11 08:28:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=318022686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_out_trans_nak.318022686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.2019316908 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 206779985 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:28:34 AM UTC 24 |
| Finished | Sep 11 08:28:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019316908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_pending_in_trans.2019316908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.3386711926 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 243423567 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:28:34 AM UTC 24 |
| Finished | Sep 11 08:28:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3386711926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.3386711926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.4034783494 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 148171533 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:28:35 AM UTC 24 |
| Finished | Sep 11 08:28:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034783494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.4034783494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.1713885146 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 46884982 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:28:35 AM UTC 24 |
| Finished | Sep 11 08:28:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713885146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.1713885146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.1270272769 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 11125679435 ps |
| CPU time | 31.03 seconds |
| Started | Sep 11 08:28:35 AM UTC 24 |
| Finished | Sep 11 08:29:08 AM UTC 24 |
| Peak memory | 227728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270272769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.1270272769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.2285533 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 179212138 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:28:35 AM UTC 24 |
| Finished | Sep 11 08:28:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_pkt_received.2285533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.730980419 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 233819045 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:28:35 AM UTC 24 |
| Finished | Sep 11 08:28:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=730980419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_pkt_sent.730980419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.1064739073 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 235028437 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:28:35 AM UTC 24 |
| Finished | Sep 11 08:28:38 AM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064739073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.1064739073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.347218916 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 150537415 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:28:35 AM UTC 24 |
| Finished | Sep 11 08:28:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347218916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.347218916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.2028717107 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 171354472 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:28:35 AM UTC 24 |
| Finished | Sep 11 08:28:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028717107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.2028717107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.4109169178 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 340988822 ps |
| CPU time | 1.94 seconds |
| Started | Sep 11 08:28:37 AM UTC 24 |
| Finished | Sep 11 08:28:40 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109169178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_rx_full.4109169178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.471103467 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 164833015 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:28:37 AM UTC 24 |
| Finished | Sep 11 08:28:39 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=471103467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_setup_stage.471103467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.3827732902 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 160283774 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:28:37 AM UTC 24 |
| Finished | Sep 11 08:28:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827732902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.3827732902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.2597515763 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 239020708 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:28:39 AM UTC 24 |
| Finished | Sep 11 08:28:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597515763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.2597515763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.3662252082 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 1928772914 ps |
| CPU time | 13.21 seconds |
| Started | Sep 11 08:28:39 AM UTC 24 |
| Finished | Sep 11 08:28:53 AM UTC 24 |
| Peak memory | 234044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3662252082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.3662252082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.3652483814 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 188877699 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:28:39 AM UTC 24 |
| Finished | Sep 11 08:28:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652483814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.3652483814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.1328355422 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 161361836 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:28:39 AM UTC 24 |
| Finished | Sep 11 08:28:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328355422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.1328355422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.1601367593 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 1264514451 ps |
| CPU time | 5.54 seconds |
| Started | Sep 11 08:28:39 AM UTC 24 |
| Finished | Sep 11 08:28:45 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601367593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.1601367593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.3408162730 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 4134438888 ps |
| CPU time | 32.27 seconds |
| Started | Sep 11 08:28:39 AM UTC 24 |
| Finished | Sep 11 08:29:12 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3408162730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_streaming_out.3408162730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.834166134 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 599972744 ps |
| CPU time | 4.76 seconds |
| Started | Sep 11 08:28:24 AM UTC 24 |
| Finished | Sep 11 08:28:30 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=834166134 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.834166134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.800775296 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 603598027 ps |
| CPU time | 3.14 seconds |
| Started | Sep 11 08:28:39 AM UTC 24 |
| Finished | Sep 11 08:28:43 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=800775296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_tx _rx_disruption.800775296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.361584846 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 574303992 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=361584846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_t x_rx_disruption.361584846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.1673413873 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 574206132 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1673413873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_ tx_rx_disruption.1673413873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.1858111901 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 505550278 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1858111901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_ tx_rx_disruption.1858111901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.2760581267 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 580328243 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2760581267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_ tx_rx_disruption.2760581267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.2170596364 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 485599323 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2170596364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.2170596364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.2477541627 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 559965552 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:15 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2477541627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_ tx_rx_disruption.2477541627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.352037050 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 547775080 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=352037050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_t x_rx_disruption.352037050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.1662396761 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 594894090 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1662396761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.1662396761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.2826959338 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 566121674 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2826959338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.2826959338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.507433535 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 452993501 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:37:06 AM UTC 24 |
| Finished | Sep 11 08:37:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=507433535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_t x_rx_disruption.507433535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.766046581 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 37077391 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:28:57 AM UTC 24 |
| Finished | Sep 11 08:28:59 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=766046581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.766046581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.4106568350 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 11804784001 ps |
| CPU time | 16 seconds |
| Started | Sep 11 08:28:40 AM UTC 24 |
| Finished | Sep 11 08:28:58 AM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106568350 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.4106568350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.956798585 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 14538826205 ps |
| CPU time | 27.89 seconds |
| Started | Sep 11 08:28:40 AM UTC 24 |
| Finished | Sep 11 08:29:10 AM UTC 24 |
| Peak memory | 227272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=956798585 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.956798585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.755869855 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 29318671604 ps |
| CPU time | 51.41 seconds |
| Started | Sep 11 08:28:40 AM UTC 24 |
| Finished | Sep 11 08:29:33 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=755869855 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.755869855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.2191064722 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 178279990 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:28:41 AM UTC 24 |
| Finished | Sep 11 08:28:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191064722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.2191064722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.1897334667 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 179967636 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:28:41 AM UTC 24 |
| Finished | Sep 11 08:28:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897334667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.1897334667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.675546650 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 210537242 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:28:41 AM UTC 24 |
| Finished | Sep 11 08:28:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=675546650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_data_toggle_clear.675546650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.2309039864 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 622821383 ps |
| CPU time | 2.67 seconds |
| Started | Sep 11 08:28:43 AM UTC 24 |
| Finished | Sep 11 08:28:46 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309039864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.2309039864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.670671694 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 14239548048 ps |
| CPU time | 26.49 seconds |
| Started | Sep 11 08:28:43 AM UTC 24 |
| Finished | Sep 11 08:29:10 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=670671694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_device_address.670671694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.2164289651 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 1953912705 ps |
| CPU time | 43.51 seconds |
| Started | Sep 11 08:28:43 AM UTC 24 |
| Finished | Sep 11 08:29:28 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164289651 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.2164289651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.3286070196 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 682030724 ps |
| CPU time | 1.98 seconds |
| Started | Sep 11 08:28:43 AM UTC 24 |
| Finished | Sep 11 08:28:46 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3286070196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.3286070196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.3449533303 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 159679376 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:28:43 AM UTC 24 |
| Finished | Sep 11 08:28:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449533303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_disconnected.3449533303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_enable.1957123572 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 52048824 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:28:44 AM UTC 24 |
| Finished | Sep 11 08:28:46 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1957123572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_enable.1957123572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.662461610 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 921047042 ps |
| CPU time | 3.65 seconds |
| Started | Sep 11 08:28:44 AM UTC 24 |
| Finished | Sep 11 08:28:49 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=662461610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.662461610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.425083777 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 610308113 ps |
| CPU time | 2.89 seconds |
| Started | Sep 11 08:28:44 AM UTC 24 |
| Finished | Sep 11 08:28:48 AM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=425083777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.425083777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.4060715005 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 272028136 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:28:44 AM UTC 24 |
| Finished | Sep 11 08:28:46 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060715005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_fifo_levels.4060715005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.2921073771 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 258463548 ps |
| CPU time | 2.69 seconds |
| Started | Sep 11 08:28:44 AM UTC 24 |
| Finished | Sep 11 08:28:48 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2921073771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_fifo_rst.2921073771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.530012217 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 153679328 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:28:46 AM UTC 24 |
| Finished | Sep 11 08:28:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=530012217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.530012217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.443123952 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 144118699 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:28:47 AM UTC 24 |
| Finished | Sep 11 08:28:49 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=443123952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_in_stall.443123952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.3029878106 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 256852842 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:28:47 AM UTC 24 |
| Finished | Sep 11 08:28:50 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029878106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.3029878106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.2769197742 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 4274038421 ps |
| CPU time | 32.37 seconds |
| Started | Sep 11 08:28:46 AM UTC 24 |
| Finished | Sep 11 08:29:20 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769197742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.2769197742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.2033566498 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 11393735475 ps |
| CPU time | 80.91 seconds |
| Started | Sep 11 08:28:47 AM UTC 24 |
| Finished | Sep 11 08:30:10 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2033566498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.2033566498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.770749833 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 194430096 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:28:47 AM UTC 24 |
| Finished | Sep 11 08:28:50 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=770749833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_link_in_err.770749833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.2850566660 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 26081653140 ps |
| CPU time | 51.68 seconds |
| Started | Sep 11 08:28:47 AM UTC 24 |
| Finished | Sep 11 08:29:41 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850566660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.2850566660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.2160711089 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 8365212971 ps |
| CPU time | 13.14 seconds |
| Started | Sep 11 08:28:47 AM UTC 24 |
| Finished | Sep 11 08:29:02 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160711089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.2160711089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.2856099175 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 5700248631 ps |
| CPU time | 48.13 seconds |
| Started | Sep 11 08:28:47 AM UTC 24 |
| Finished | Sep 11 08:29:37 AM UTC 24 |
| Peak memory | 234204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856099175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.2856099175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.2983343823 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 2604827833 ps |
| CPU time | 21.14 seconds |
| Started | Sep 11 08:28:49 AM UTC 24 |
| Finished | Sep 11 08:29:11 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2983343823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.2983343823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.2549582655 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 251382375 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:28:49 AM UTC 24 |
| Finished | Sep 11 08:28:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549582655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.2549582655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.339577713 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 271341311 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:28:49 AM UTC 24 |
| Finished | Sep 11 08:28:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=339577713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.339577713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.1661896514 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 2438323835 ps |
| CPU time | 62.11 seconds |
| Started | Sep 11 08:28:49 AM UTC 24 |
| Finished | Sep 11 08:29:52 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1661896514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.1661896514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.27175259 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 151407514 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:28:50 AM UTC 24 |
| Finished | Sep 11 08:28:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=27175259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.27175259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.4266055170 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 141926746 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:28:50 AM UTC 24 |
| Finished | Sep 11 08:28:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4266055170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.4266055170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.3859868941 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 218112937 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:28:51 AM UTC 24 |
| Finished | Sep 11 08:28:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859868941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.3859868941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.3071034404 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 179814370 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:28:51 AM UTC 24 |
| Finished | Sep 11 08:28:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071034404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_out_iso.3071034404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.3361595116 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 153593999 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:28:51 AM UTC 24 |
| Finished | Sep 11 08:28:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361595116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_out_stall.3361595116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.1717677226 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 167278759 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:28:51 AM UTC 24 |
| Finished | Sep 11 08:28:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717677226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.1717677226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.960916323 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 147943497 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:28:51 AM UTC 24 |
| Finished | Sep 11 08:28:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=960916323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pending_in_trans.960916323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.874756704 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 236881408 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:28:52 AM UTC 24 |
| Finished | Sep 11 08:28:54 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=874756704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.874756704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.1794581962 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 144145890 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:28:52 AM UTC 24 |
| Finished | Sep 11 08:28:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1794581962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.1794581962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.203906892 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 36259954 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:28:52 AM UTC 24 |
| Finished | Sep 11 08:28:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=203906892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_phy_pins_sense.203906892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.817064086 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 15100249456 ps |
| CPU time | 44.3 seconds |
| Started | Sep 11 08:28:53 AM UTC 24 |
| Finished | Sep 11 08:29:39 AM UTC 24 |
| Peak memory | 227516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=817064086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_pkt_buffer.817064086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.1944222839 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 175113986 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:28:53 AM UTC 24 |
| Finished | Sep 11 08:28:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944222839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.1944222839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.1772192288 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 251229854 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:28:53 AM UTC 24 |
| Finished | Sep 11 08:28:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772192288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.1772192288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.1036191639 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 165687893 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:28:53 AM UTC 24 |
| Finished | Sep 11 08:28:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036191639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.1036191639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.1976041766 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 236060421 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:28:55 AM UTC 24 |
| Finished | Sep 11 08:28:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976041766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.1976041766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.2862792562 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 149879096 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:28:55 AM UTC 24 |
| Finished | Sep 11 08:28:58 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2862792562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.2862792562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.4103083918 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 303443248 ps |
| CPU time | 1.8 seconds |
| Started | Sep 11 08:28:55 AM UTC 24 |
| Finished | Sep 11 08:28:58 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103083918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.4103083918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.2310655435 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 187288319 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:28:55 AM UTC 24 |
| Finished | Sep 11 08:28:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310655435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.2310655435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.2537191850 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 173624732 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:28:55 AM UTC 24 |
| Finished | Sep 11 08:28:58 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537191850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 25.usbdev_setup_trans_ignored.2537191850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.2802915717 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 198485434 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:28:55 AM UTC 24 |
| Finished | Sep 11 08:28:58 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802915717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.2802915717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.29482214 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 2751875130 ps |
| CPU time | 27.05 seconds |
| Started | Sep 11 08:28:55 AM UTC 24 |
| Finished | Sep 11 08:29:24 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=29482214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.29482214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.1175607410 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 149814654 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:28:55 AM UTC 24 |
| Finished | Sep 11 08:28:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175607410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.1175607410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.362851836 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 185878787 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:28:57 AM UTC 24 |
| Finished | Sep 11 08:29:00 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=362851836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_stall_trans.362851836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.2006939872 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 972983225 ps |
| CPU time | 3.17 seconds |
| Started | Sep 11 08:28:57 AM UTC 24 |
| Finished | Sep 11 08:29:01 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2006939872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.2006939872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.580772031 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 1787200961 ps |
| CPU time | 17.44 seconds |
| Started | Sep 11 08:28:57 AM UTC 24 |
| Finished | Sep 11 08:29:16 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580772031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_streaming_out.580772031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.1850394047 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 1319997263 ps |
| CPU time | 29.12 seconds |
| Started | Sep 11 08:28:43 AM UTC 24 |
| Finished | Sep 11 08:29:13 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850394047 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.1850394047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.3039031741 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 663517819 ps |
| CPU time | 3.33 seconds |
| Started | Sep 11 08:28:57 AM UTC 24 |
| Finished | Sep 11 08:29:02 AM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3039031741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.3039031741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.160563364 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 581808741 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=160563364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_t x_rx_disruption.160563364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.965796479 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 504865094 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=965796479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_t x_rx_disruption.965796479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.3008962474 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 605814887 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3008962474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_ tx_rx_disruption.3008962474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.920935584 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 520983258 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=920935584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_t x_rx_disruption.920935584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.2574412874 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 510637602 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2574412874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_ tx_rx_disruption.2574412874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.1445542398 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 534440407 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1445542398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.1445542398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.3341403813 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 486722239 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3341403813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_ tx_rx_disruption.3341403813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.2598038252 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 444409795 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:10 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2598038252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_ tx_rx_disruption.2598038252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.1315972721 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 491128277 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1315972721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_ tx_rx_disruption.1315972721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.3728725234 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 513093585 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3728725234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_ tx_rx_disruption.3728725234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.768845721 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 56969524 ps |
| CPU time | 0.95 seconds |
| Started | Sep 11 08:29:16 AM UTC 24 |
| Finished | Sep 11 08:29:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=768845721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.768845721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.651162892 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 10735516501 ps |
| CPU time | 21.85 seconds |
| Started | Sep 11 08:28:59 AM UTC 24 |
| Finished | Sep 11 08:29:22 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=651162892 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.651162892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.276842750 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 14102452199 ps |
| CPU time | 18.9 seconds |
| Started | Sep 11 08:28:59 AM UTC 24 |
| Finished | Sep 11 08:29:19 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=276842750 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.276842750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.1943046881 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 31074242644 ps |
| CPU time | 37.22 seconds |
| Started | Sep 11 08:28:59 AM UTC 24 |
| Finished | Sep 11 08:29:38 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943046881 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.1943046881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.948840806 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 186317799 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:28:59 AM UTC 24 |
| Finished | Sep 11 08:29:02 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=948840806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_av_buffer.948840806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.1024709598 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 223522840 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:28:59 AM UTC 24 |
| Finished | Sep 11 08:29:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024709598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.1024709598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.243092582 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 222803420 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:28:59 AM UTC 24 |
| Finished | Sep 11 08:29:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=243092582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_data_toggle_clear.243092582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.521439341 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 353866475 ps |
| CPU time | 2.22 seconds |
| Started | Sep 11 08:28:59 AM UTC 24 |
| Finished | Sep 11 08:29:03 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=521439341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.521439341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.132010457 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 13534350879 ps |
| CPU time | 24.42 seconds |
| Started | Sep 11 08:28:59 AM UTC 24 |
| Finished | Sep 11 08:29:25 AM UTC 24 |
| Peak memory | 217208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=132010457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_device_address.132010457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.172459422 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 303303099 ps |
| CPU time | 5.22 seconds |
| Started | Sep 11 08:29:00 AM UTC 24 |
| Finished | Sep 11 08:29:06 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=172459422 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.172459422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.3483000375 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 523300828 ps |
| CPU time | 1.87 seconds |
| Started | Sep 11 08:29:00 AM UTC 24 |
| Finished | Sep 11 08:29:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483000375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.3483000375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.1927797898 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 162635932 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:29:03 AM UTC 24 |
| Finished | Sep 11 08:29:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927797898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.1927797898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_enable.277857550 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 86726893 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:29:03 AM UTC 24 |
| Finished | Sep 11 08:29:05 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=277857550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_enable.277857550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.1158804660 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 770972894 ps |
| CPU time | 3.79 seconds |
| Started | Sep 11 08:29:03 AM UTC 24 |
| Finished | Sep 11 08:29:08 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158804660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.1158804660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.454163102 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 701640974 ps |
| CPU time | 3.11 seconds |
| Started | Sep 11 08:29:03 AM UTC 24 |
| Finished | Sep 11 08:29:07 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=454163102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.454163102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.2594920570 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 173693702 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:29:03 AM UTC 24 |
| Finished | Sep 11 08:29:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594920570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_fifo_levels.2594920570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.3829197304 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 291353746 ps |
| CPU time | 2.85 seconds |
| Started | Sep 11 08:29:03 AM UTC 24 |
| Finished | Sep 11 08:29:07 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829197304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.3829197304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.3416011100 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 235880558 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:29:03 AM UTC 24 |
| Finished | Sep 11 08:29:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416011100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.3416011100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.328139377 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 160225239 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:29:03 AM UTC 24 |
| Finished | Sep 11 08:29:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=328139377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_in_stall.328139377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.1092003651 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 266439048 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:29:04 AM UTC 24 |
| Finished | Sep 11 08:29:07 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092003651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.1092003651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.3724681871 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 3525812471 ps |
| CPU time | 97.27 seconds |
| Started | Sep 11 08:29:03 AM UTC 24 |
| Finished | Sep 11 08:30:43 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724681871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.3724681871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.1237747976 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 11378752467 ps |
| CPU time | 127.82 seconds |
| Started | Sep 11 08:29:04 AM UTC 24 |
| Finished | Sep 11 08:31:15 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1237747976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.1237747976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.2235375068 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 226338513 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:29:04 AM UTC 24 |
| Finished | Sep 11 08:29:07 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235375068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.2235375068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.3581690535 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 30139176797 ps |
| CPU time | 52.63 seconds |
| Started | Sep 11 08:29:06 AM UTC 24 |
| Finished | Sep 11 08:30:00 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581690535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.3581690535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.1675673907 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 3702439316 ps |
| CPU time | 7.04 seconds |
| Started | Sep 11 08:29:06 AM UTC 24 |
| Finished | Sep 11 08:29:14 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1675673907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_link_suspend.1675673907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.3145290824 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 4935628458 ps |
| CPU time | 36.58 seconds |
| Started | Sep 11 08:29:06 AM UTC 24 |
| Finished | Sep 11 08:29:44 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3145290824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.3145290824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.4113956775 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 3171768947 ps |
| CPU time | 25.99 seconds |
| Started | Sep 11 08:29:06 AM UTC 24 |
| Finished | Sep 11 08:29:33 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4113956775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.4113956775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.1747230732 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 253734012 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:29:07 AM UTC 24 |
| Finished | Sep 11 08:29:10 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747230732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.1747230732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.1541964744 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 187174435 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:29:07 AM UTC 24 |
| Finished | Sep 11 08:29:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541964744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.1541964744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.1176192948 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 2207277579 ps |
| CPU time | 21.36 seconds |
| Started | Sep 11 08:29:07 AM UTC 24 |
| Finished | Sep 11 08:29:30 AM UTC 24 |
| Peak memory | 229436 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176192948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.1176192948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.1468931936 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 180838791 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:29:08 AM UTC 24 |
| Finished | Sep 11 08:29:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1468931936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.1468931936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.532048097 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 147812325 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:29:08 AM UTC 24 |
| Finished | Sep 11 08:29:10 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=532048097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.532048097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.1698571688 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 192259687 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:29:09 AM UTC 24 |
| Finished | Sep 11 08:29:12 AM UTC 24 |
| Peak memory | 214896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698571688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.1698571688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.1694279744 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 153293945 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:29:09 AM UTC 24 |
| Finished | Sep 11 08:29:12 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694279744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_out_stall.1694279744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.2777305408 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 163627631 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:29:09 AM UTC 24 |
| Finished | Sep 11 08:29:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777305408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.2777305408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.4229832911 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 174578658 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:29:09 AM UTC 24 |
| Finished | Sep 11 08:29:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229832911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_pending_in_trans.4229832911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.3281702343 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 222758133 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:29:11 AM UTC 24 |
| Finished | Sep 11 08:29:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3281702343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.3281702343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.3247591003 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 165669555 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:29:11 AM UTC 24 |
| Finished | Sep 11 08:29:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247591003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.3247591003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.252468911 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 31085038 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:29:11 AM UTC 24 |
| Finished | Sep 11 08:29:13 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=252468911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_phy_pins_sense.252468911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.4184373285 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 11641785851 ps |
| CPU time | 30.69 seconds |
| Started | Sep 11 08:29:11 AM UTC 24 |
| Finished | Sep 11 08:29:43 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4184373285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.4184373285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.3015374368 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 158769331 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:29:12 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015374368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.3015374368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.732186506 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 161495845 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:29:13 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=732186506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_pkt_sent.732186506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.2559684888 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 168964469 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:29:13 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559684888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.2559684888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.1272860042 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 196680687 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:29:13 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1272860042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.1272860042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.2246370570 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 149605642 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:29:13 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246370570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.2246370570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.1709197567 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 316794754 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:29:13 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709197567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.1709197567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.942691697 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 219436783 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:29:13 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942691697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_setup_stage.942691697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.1654500536 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 177189432 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:29:13 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654500536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.1654500536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.315263388 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 165745514 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:29:13 AM UTC 24 |
| Finished | Sep 11 08:29:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=315263388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.315263388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.2437138833 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 2226717147 ps |
| CPU time | 20.37 seconds |
| Started | Sep 11 08:29:15 AM UTC 24 |
| Finished | Sep 11 08:29:36 AM UTC 24 |
| Peak memory | 234324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437138833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.2437138833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.435303667 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 144914558 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:29:15 AM UTC 24 |
| Finished | Sep 11 08:29:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=435303667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.435303667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.1503340930 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 165365030 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:29:15 AM UTC 24 |
| Finished | Sep 11 08:29:17 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503340930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.1503340930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.565732805 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 388509304 ps |
| CPU time | 2 seconds |
| Started | Sep 11 08:29:15 AM UTC 24 |
| Finished | Sep 11 08:29:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=565732805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_stream_len_max.565732805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.2140323468 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 2156662306 ps |
| CPU time | 16.02 seconds |
| Started | Sep 11 08:29:15 AM UTC 24 |
| Finished | Sep 11 08:29:32 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140323468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.2140323468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.3100413932 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 1078986734 ps |
| CPU time | 9.3 seconds |
| Started | Sep 11 08:29:00 AM UTC 24 |
| Finished | Sep 11 08:29:10 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100413932 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.3100413932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.4013063100 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 560912334 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:29:15 AM UTC 24 |
| Finished | Sep 11 08:29:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4013063100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.4013063100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.4048890317 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 586228587 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4048890317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.4048890317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.416939822 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 679630136 ps |
| CPU time | 2 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=416939822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_t x_rx_disruption.416939822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.3547353355 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 477247035 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3547353355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.3547353355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.369975690 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 438210489 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:37:08 AM UTC 24 |
| Finished | Sep 11 08:37:11 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=369975690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_t x_rx_disruption.369975690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.2902693895 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 542684642 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:37:10 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 217760 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2902693895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_ tx_rx_disruption.2902693895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.3392578900 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 474290185 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:37:10 AM UTC 24 |
| Finished | Sep 11 08:37:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3392578900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.3392578900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.1177772930 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 641629566 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:37:12 AM UTC 24 |
| Finished | Sep 11 08:37:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1177772930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.1177772930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.2433026044 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 533163843 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:37:12 AM UTC 24 |
| Finished | Sep 11 08:37:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2433026044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.2433026044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.810774257 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 447727269 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:37:12 AM UTC 24 |
| Finished | Sep 11 08:37:15 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=810774257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_t x_rx_disruption.810774257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.339335714 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 502665498 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:37:12 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=339335714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_t x_rx_disruption.339335714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.1785346403 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 37007265 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:29:30 AM UTC 24 |
| Finished | Sep 11 08:29:32 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785346403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.1785346403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.112658767 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 8880820745 ps |
| CPU time | 15.16 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:33 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=112658767 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.112658767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.697373917 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 15349513166 ps |
| CPU time | 23.02 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:41 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=697373917 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.697373917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.1247975969 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 31507470507 ps |
| CPU time | 44.4 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:30:02 AM UTC 24 |
| Peak memory | 217200 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247975969 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.1247975969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.1361016030 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 153699497 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361016030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.1361016030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.2268873060 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 144060852 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268873060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_bitstuff_err.2268873060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.3296961823 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 213302759 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3296961823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.3296961823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.2992012717 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 843866353 ps |
| CPU time | 2.57 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:20 AM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992012717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.2992012717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.3960558211 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 43052890532 ps |
| CPU time | 81.02 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:30:40 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960558211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_address.3960558211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.3872086474 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 1560891939 ps |
| CPU time | 34.75 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:53 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872086474 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.3872086474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.3734824744 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 777904959 ps |
| CPU time | 2.14 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:20 AM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734824744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.3734824744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.3255967427 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 140244069 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255967427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.3255967427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_enable.354162558 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 67970489 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354162558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_enable.354162558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.2366512816 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 799900505 ps |
| CPU time | 2.67 seconds |
| Started | Sep 11 08:29:18 AM UTC 24 |
| Finished | Sep 11 08:29:22 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366512816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.2366512816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.2823834179 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 403700388 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:29:18 AM UTC 24 |
| Finished | Sep 11 08:29:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823834179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.2823834179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.2045334545 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 286072757 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:29:18 AM UTC 24 |
| Finished | Sep 11 08:29:21 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2045334545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_fifo_levels.2045334545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.1193949295 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 284388346 ps |
| CPU time | 3.08 seconds |
| Started | Sep 11 08:29:18 AM UTC 24 |
| Finished | Sep 11 08:29:23 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193949295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_fifo_rst.1193949295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.4048190016 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 225715856 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:29:19 AM UTC 24 |
| Finished | Sep 11 08:29:21 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048190016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.4048190016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.1912617414 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 140260524 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:29:20 AM UTC 24 |
| Finished | Sep 11 08:29:22 AM UTC 24 |
| Peak memory | 214748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912617414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.1912617414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.1956369668 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 236918409 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:29:20 AM UTC 24 |
| Finished | Sep 11 08:29:23 AM UTC 24 |
| Peak memory | 214836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956369668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.1956369668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.90588528 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 5187133492 ps |
| CPU time | 140.73 seconds |
| Started | Sep 11 08:29:19 AM UTC 24 |
| Finished | Sep 11 08:31:42 AM UTC 24 |
| Peak memory | 229780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=90588528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.90588528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.2577813848 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 11082819307 ps |
| CPU time | 78.1 seconds |
| Started | Sep 11 08:29:20 AM UTC 24 |
| Finished | Sep 11 08:30:40 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2577813848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.2577813848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.1382692095 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 212189534 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:29:20 AM UTC 24 |
| Finished | Sep 11 08:29:23 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382692095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.1382692095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.1554479581 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 28180468425 ps |
| CPU time | 48.44 seconds |
| Started | Sep 11 08:29:20 AM UTC 24 |
| Finished | Sep 11 08:30:10 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554479581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.1554479581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.3740831491 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 11158011407 ps |
| CPU time | 16.88 seconds |
| Started | Sep 11 08:29:20 AM UTC 24 |
| Finished | Sep 11 08:29:38 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740831491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_link_suspend.3740831491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.1187615820 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 2702810209 ps |
| CPU time | 67.17 seconds |
| Started | Sep 11 08:29:20 AM UTC 24 |
| Finished | Sep 11 08:30:29 AM UTC 24 |
| Peak memory | 227692 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187615820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.1187615820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.2766048536 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 3705534698 ps |
| CPU time | 96.21 seconds |
| Started | Sep 11 08:29:22 AM UTC 24 |
| Finished | Sep 11 08:31:00 AM UTC 24 |
| Peak memory | 227332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766048536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.2766048536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.3372080636 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 252188290 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:29:22 AM UTC 24 |
| Finished | Sep 11 08:29:25 AM UTC 24 |
| Peak memory | 214612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372080636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.3372080636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.2308933726 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 258594558 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:29:22 AM UTC 24 |
| Finished | Sep 11 08:29:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308933726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.2308933726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.4026513294 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 2621856619 ps |
| CPU time | 72.35 seconds |
| Started | Sep 11 08:29:22 AM UTC 24 |
| Finished | Sep 11 08:30:36 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026513294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.4026513294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.1595656975 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 153480769 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:29:22 AM UTC 24 |
| Finished | Sep 11 08:29:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595656975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.1595656975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.4044870051 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 176886571 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:29:22 AM UTC 24 |
| Finished | Sep 11 08:29:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044870051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.4044870051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.949681351 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 263786292 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:29:22 AM UTC 24 |
| Finished | Sep 11 08:29:25 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=949681351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_nak_trans.949681351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.68559613 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 147214357 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:29:22 AM UTC 24 |
| Finished | Sep 11 08:29:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=68559613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_out_iso.68559613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.2451545701 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 178351867 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:29:24 AM UTC 24 |
| Finished | Sep 11 08:29:27 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451545701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.2451545701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.1830965224 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 193564264 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:29:24 AM UTC 24 |
| Finished | Sep 11 08:29:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830965224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_out_trans_nak.1830965224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.1222135091 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 223250546 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:29:24 AM UTC 24 |
| Finished | Sep 11 08:29:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222135091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.1222135091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.1225870272 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 238946642 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:29:24 AM UTC 24 |
| Finished | Sep 11 08:29:27 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225870272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.1225870272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.2798080139 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 148283199 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:29:24 AM UTC 24 |
| Finished | Sep 11 08:29:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2798080139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.2798080139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.803243838 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 67878054 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:29:24 AM UTC 24 |
| Finished | Sep 11 08:29:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=803243838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_phy_pins_sense.803243838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.2950292034 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 19309073039 ps |
| CPU time | 56.42 seconds |
| Started | Sep 11 08:29:24 AM UTC 24 |
| Finished | Sep 11 08:30:22 AM UTC 24 |
| Peak memory | 234256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950292034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.2950292034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.502386945 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 181451486 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:29:26 AM UTC 24 |
| Finished | Sep 11 08:29:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=502386945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_pkt_received.502386945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.473616984 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 161371181 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:29:26 AM UTC 24 |
| Finished | Sep 11 08:29:28 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=473616984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_pkt_sent.473616984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.81170236 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 274559777 ps |
| CPU time | 1.2 seconds |
| Started | Sep 11 08:29:26 AM UTC 24 |
| Finished | Sep 11 08:29:29 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=81170236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_random_length_in_transaction.81170236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.655256243 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 220227360 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:29:26 AM UTC 24 |
| Finished | Sep 11 08:29:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=655256243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.655256243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.1637316034 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 215547533 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:29:26 AM UTC 24 |
| Finished | Sep 11 08:29:29 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637316034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.1637316034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.3024192252 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 263449554 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:29:26 AM UTC 24 |
| Finished | Sep 11 08:29:29 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024192252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.3024192252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.973494688 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 158454295 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:29:26 AM UTC 24 |
| Finished | Sep 11 08:29:29 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973494688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_setup_stage.973494688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.3799373460 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 157181055 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:29:26 AM UTC 24 |
| Finished | Sep 11 08:29:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799373460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.3799373460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.480858187 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 219376628 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:29:26 AM UTC 24 |
| Finished | Sep 11 08:29:29 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=480858187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.480858187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.4035269058 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 3738688127 ps |
| CPU time | 27.05 seconds |
| Started | Sep 11 08:29:28 AM UTC 24 |
| Finished | Sep 11 08:29:56 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4035269058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.4035269058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.775654283 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 211239195 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:29:28 AM UTC 24 |
| Finished | Sep 11 08:29:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=775654283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.775654283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.3647711710 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 197508563 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:29:28 AM UTC 24 |
| Finished | Sep 11 08:29:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3647711710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.3647711710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.615783452 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 766555128 ps |
| CPU time | 3.22 seconds |
| Started | Sep 11 08:29:28 AM UTC 24 |
| Finished | Sep 11 08:29:32 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=615783452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_stream_len_max.615783452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.1841829926 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 3261879484 ps |
| CPU time | 24.27 seconds |
| Started | Sep 11 08:29:28 AM UTC 24 |
| Finished | Sep 11 08:29:54 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841829926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.1841829926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.96553133 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 970078261 ps |
| CPU time | 22.15 seconds |
| Started | Sep 11 08:29:17 AM UTC 24 |
| Finished | Sep 11 08:29:40 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=96553133 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.96553133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.2191578356 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 657622893 ps |
| CPU time | 2.29 seconds |
| Started | Sep 11 08:29:28 AM UTC 24 |
| Finished | Sep 11 08:29:31 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2191578356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_t x_rx_disruption.2191578356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.3576583745 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 593701853 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:37:12 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3576583745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.3576583745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.1892958427 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 605254518 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:37:12 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1892958427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.1892958427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.3356172847 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 503216119 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:37:12 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3356172847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.3356172847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.4284936745 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 613671838 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:37:13 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4284936745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.4284936745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.2817744335 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 605086304 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:37:13 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2817744335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.2817744335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.2852786917 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 627393724 ps |
| CPU time | 1.88 seconds |
| Started | Sep 11 08:37:13 AM UTC 24 |
| Finished | Sep 11 08:37:26 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2852786917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_ tx_rx_disruption.2852786917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.2034481900 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 593227426 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:37:13 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2034481900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.2034481900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.622023053 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 46750706 ps |
| CPU time | 0.96 seconds |
| Started | Sep 11 08:29:45 AM UTC 24 |
| Finished | Sep 11 08:29:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=622023053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.622023053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.2573845951 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 9625148926 ps |
| CPU time | 16.89 seconds |
| Started | Sep 11 08:29:30 AM UTC 24 |
| Finished | Sep 11 08:29:48 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573845951 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.2573845951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.2798352919 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 15311722915 ps |
| CPU time | 27.23 seconds |
| Started | Sep 11 08:29:30 AM UTC 24 |
| Finished | Sep 11 08:29:58 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2798352919 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.2798352919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.320697516 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 25650402589 ps |
| CPU time | 31.51 seconds |
| Started | Sep 11 08:29:30 AM UTC 24 |
| Finished | Sep 11 08:30:03 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=320697516 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.320697516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.4147304486 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 153884072 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:29:30 AM UTC 24 |
| Finished | Sep 11 08:29:32 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147304486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_av_buffer.4147304486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.3943252028 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 197096740 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:29:30 AM UTC 24 |
| Finished | Sep 11 08:29:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3943252028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.3943252028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.3457325197 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 471136781 ps |
| CPU time | 2.65 seconds |
| Started | Sep 11 08:29:30 AM UTC 24 |
| Finished | Sep 11 08:29:34 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457325197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.3457325197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.1217903251 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 1004559459 ps |
| CPU time | 3.83 seconds |
| Started | Sep 11 08:29:30 AM UTC 24 |
| Finished | Sep 11 08:29:35 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217903251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.1217903251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.1970189633 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 35172047031 ps |
| CPU time | 69.12 seconds |
| Started | Sep 11 08:29:30 AM UTC 24 |
| Finished | Sep 11 08:30:41 AM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1970189633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.1970189633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.3969062996 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 2255778035 ps |
| CPU time | 13.82 seconds |
| Started | Sep 11 08:29:32 AM UTC 24 |
| Finished | Sep 11 08:29:47 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3969062996 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.3969062996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.554140083 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 842433637 ps |
| CPU time | 3.44 seconds |
| Started | Sep 11 08:29:32 AM UTC 24 |
| Finished | Sep 11 08:29:37 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=554140083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_disable_endpoint.554140083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.3186402576 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 139434169 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:29:32 AM UTC 24 |
| Finished | Sep 11 08:29:35 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186402576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.3186402576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_enable.2783503450 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 37923906 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:29:33 AM UTC 24 |
| Finished | Sep 11 08:29:35 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2783503450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.2783503450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.2295034439 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 841512362 ps |
| CPU time | 3.59 seconds |
| Started | Sep 11 08:29:33 AM UTC 24 |
| Finished | Sep 11 08:29:37 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295034439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.2295034439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.179115183 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 305049175 ps |
| CPU time | 1.82 seconds |
| Started | Sep 11 08:29:33 AM UTC 24 |
| Finished | Sep 11 08:29:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179115183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.179115183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.2482993235 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 316993708 ps |
| CPU time | 3.01 seconds |
| Started | Sep 11 08:29:34 AM UTC 24 |
| Finished | Sep 11 08:29:38 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2482993235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.2482993235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.3071406729 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 207109632 ps |
| CPU time | 1.95 seconds |
| Started | Sep 11 08:29:34 AM UTC 24 |
| Finished | Sep 11 08:29:37 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071406729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.3071406729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.4241053061 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 196978450 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:29:35 AM UTC 24 |
| Finished | Sep 11 08:29:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4241053061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.4241053061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.3029911311 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 203865551 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:29:35 AM UTC 24 |
| Finished | Sep 11 08:29:37 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029911311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.3029911311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.412749647 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 4126278686 ps |
| CPU time | 39.25 seconds |
| Started | Sep 11 08:29:34 AM UTC 24 |
| Finished | Sep 11 08:30:15 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=412749647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.412749647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.3340879017 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 5794478544 ps |
| CPU time | 62.9 seconds |
| Started | Sep 11 08:29:35 AM UTC 24 |
| Finished | Sep 11 08:30:39 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3340879017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.3340879017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.2181834132 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 275189315 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:29:35 AM UTC 24 |
| Finished | Sep 11 08:29:37 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181834132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.2181834132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.3481345172 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 8815035613 ps |
| CPU time | 15.18 seconds |
| Started | Sep 11 08:29:36 AM UTC 24 |
| Finished | Sep 11 08:29:52 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481345172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.3481345172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.2987235645 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 5027128580 ps |
| CPU time | 10.12 seconds |
| Started | Sep 11 08:29:36 AM UTC 24 |
| Finished | Sep 11 08:29:47 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987235645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.2987235645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.1513603199 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 2961251864 ps |
| CPU time | 26.56 seconds |
| Started | Sep 11 08:29:36 AM UTC 24 |
| Finished | Sep 11 08:30:04 AM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513603199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.1513603199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.1138341744 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 1867452500 ps |
| CPU time | 15.24 seconds |
| Started | Sep 11 08:29:36 AM UTC 24 |
| Finished | Sep 11 08:29:52 AM UTC 24 |
| Peak memory | 234028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138341744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.1138341744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.2570929815 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 241816891 ps |
| CPU time | 1.85 seconds |
| Started | Sep 11 08:29:38 AM UTC 24 |
| Finished | Sep 11 08:29:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570929815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.2570929815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.2908493335 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 194854675 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:29:38 AM UTC 24 |
| Finished | Sep 11 08:29:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2908493335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.2908493335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.726457395 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 2047149041 ps |
| CPU time | 20.82 seconds |
| Started | Sep 11 08:29:38 AM UTC 24 |
| Finished | Sep 11 08:30:00 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726457395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.726457395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.56919631 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 152289848 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:29:38 AM UTC 24 |
| Finished | Sep 11 08:29:40 AM UTC 24 |
| Peak memory | 214844 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56919631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.56919631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.1850108381 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 157285949 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:29:38 AM UTC 24 |
| Finished | Sep 11 08:29:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850108381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.1850108381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.1204509001 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 194650090 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:29:39 AM UTC 24 |
| Finished | Sep 11 08:29:42 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204509001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.1204509001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.3403938717 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 171177587 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:29:39 AM UTC 24 |
| Finished | Sep 11 08:29:42 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403938717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.3403938717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.172338898 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 196604470 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:29:39 AM UTC 24 |
| Finished | Sep 11 08:29:42 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172338898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_out_stall.172338898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.1037195589 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 155550907 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:29:39 AM UTC 24 |
| Finished | Sep 11 08:29:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1037195589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_out_trans_nak.1037195589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.2397550136 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 157553848 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:29:39 AM UTC 24 |
| Finished | Sep 11 08:29:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2397550136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.2397550136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.1709215142 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 179890209 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:29:40 AM UTC 24 |
| Finished | Sep 11 08:29:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709215142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.1709215142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.1754457130 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 148859110 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:29:40 AM UTC 24 |
| Finished | Sep 11 08:29:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1754457130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.1754457130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.1689439572 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 68565620 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:29:41 AM UTC 24 |
| Finished | Sep 11 08:29:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689439572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.1689439572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.3542165804 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 15686459181 ps |
| CPU time | 46.81 seconds |
| Started | Sep 11 08:29:41 AM UTC 24 |
| Finished | Sep 11 08:30:30 AM UTC 24 |
| Peak memory | 231628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542165804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_pkt_buffer.3542165804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.4051002591 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 164564997 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:29:41 AM UTC 24 |
| Finished | Sep 11 08:29:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051002591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_pkt_received.4051002591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.4208933252 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 249262936 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:29:41 AM UTC 24 |
| Finished | Sep 11 08:29:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208933252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_pkt_sent.4208933252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.1156103048 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 233060559 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:29:42 AM UTC 24 |
| Finished | Sep 11 08:29:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1156103048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.1156103048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.1671065646 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 209151848 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:29:42 AM UTC 24 |
| Finished | Sep 11 08:29:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671065646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.1671065646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.1005772662 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 204547952 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:29:43 AM UTC 24 |
| Finished | Sep 11 08:29:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005772662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_rx_crc_err.1005772662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.1414948951 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 374425035 ps |
| CPU time | 1.94 seconds |
| Started | Sep 11 08:29:43 AM UTC 24 |
| Finished | Sep 11 08:29:46 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414948951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_rx_full.1414948951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.1389124865 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 175779035 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:29:43 AM UTC 24 |
| Finished | Sep 11 08:29:46 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389124865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_setup_stage.1389124865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.667808259 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 145571723 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:29:43 AM UTC 24 |
| Finished | Sep 11 08:29:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=667808259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 28.usbdev_setup_trans_ignored.667808259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.3091518329 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 205299188 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:29:43 AM UTC 24 |
| Finished | Sep 11 08:29:46 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091518329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.3091518329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.1286742633 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 2443145851 ps |
| CPU time | 25.9 seconds |
| Started | Sep 11 08:29:43 AM UTC 24 |
| Finished | Sep 11 08:30:11 AM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286742633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.1286742633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.4242650182 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 186261046 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:29:43 AM UTC 24 |
| Finished | Sep 11 08:29:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4242650182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.4242650182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.3316115201 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 208224715 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:29:43 AM UTC 24 |
| Finished | Sep 11 08:29:46 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316115201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.3316115201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.3654167744 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 850459506 ps |
| CPU time | 2.84 seconds |
| Started | Sep 11 08:29:45 AM UTC 24 |
| Finished | Sep 11 08:29:49 AM UTC 24 |
| Peak memory | 217208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3654167744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.3654167744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.2137143488 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 3253063291 ps |
| CPU time | 23.02 seconds |
| Started | Sep 11 08:29:44 AM UTC 24 |
| Finished | Sep 11 08:30:08 AM UTC 24 |
| Peak memory | 234156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137143488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.2137143488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.3319261028 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 3661437051 ps |
| CPU time | 24.78 seconds |
| Started | Sep 11 08:29:32 AM UTC 24 |
| Finished | Sep 11 08:29:58 AM UTC 24 |
| Peak memory | 217276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3319261028 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.3319261028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.1334689017 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 493980875 ps |
| CPU time | 2.56 seconds |
| Started | Sep 11 08:29:45 AM UTC 24 |
| Finished | Sep 11 08:29:49 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1334689017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.1334689017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.2154330293 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 58256770 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:30:01 AM UTC 24 |
| Finished | Sep 11 08:30:03 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154330293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.2154330293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.4266468476 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 4361627505 ps |
| CPU time | 6.93 seconds |
| Started | Sep 11 08:29:45 AM UTC 24 |
| Finished | Sep 11 08:29:54 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4266468476 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.4266468476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.2949400416 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 20237685813 ps |
| CPU time | 27.29 seconds |
| Started | Sep 11 08:29:45 AM UTC 24 |
| Finished | Sep 11 08:30:14 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949400416 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.2949400416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.1113493482 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 25161025661 ps |
| CPU time | 33.33 seconds |
| Started | Sep 11 08:29:45 AM UTC 24 |
| Finished | Sep 11 08:30:20 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1113493482 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.1113493482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.4257478955 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 165414670 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:29:47 AM UTC 24 |
| Finished | Sep 11 08:29:49 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4257478955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.4257478955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.2300318647 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 151187631 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:29:47 AM UTC 24 |
| Finished | Sep 11 08:29:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300318647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.2300318647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.2824156450 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 403652666 ps |
| CPU time | 2.41 seconds |
| Started | Sep 11 08:29:47 AM UTC 24 |
| Finished | Sep 11 08:29:50 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2824156450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.2824156450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.1401492053 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 509893209 ps |
| CPU time | 2.59 seconds |
| Started | Sep 11 08:29:47 AM UTC 24 |
| Finished | Sep 11 08:29:50 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401492053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.1401492053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.1726915201 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 31272991412 ps |
| CPU time | 51.63 seconds |
| Started | Sep 11 08:29:47 AM UTC 24 |
| Finished | Sep 11 08:30:40 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726915201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.1726915201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.639687924 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 1551974123 ps |
| CPU time | 15.39 seconds |
| Started | Sep 11 08:29:47 AM UTC 24 |
| Finished | Sep 11 08:30:03 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=639687924 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.639687924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.144527338 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 663846340 ps |
| CPU time | 2.62 seconds |
| Started | Sep 11 08:29:48 AM UTC 24 |
| Finished | Sep 11 08:29:52 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144527338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_disable_endpoint.144527338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.2728771220 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 153105633 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:29:48 AM UTC 24 |
| Finished | Sep 11 08:29:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728771220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.2728771220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_enable.474533371 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 32157297 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:29:48 AM UTC 24 |
| Finished | Sep 11 08:29:50 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=474533371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_enable.474533371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.862366192 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 963479993 ps |
| CPU time | 3.17 seconds |
| Started | Sep 11 08:29:48 AM UTC 24 |
| Finished | Sep 11 08:29:53 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=862366192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.862366192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.915405456 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 293083893 ps |
| CPU time | 1.92 seconds |
| Started | Sep 11 08:29:48 AM UTC 24 |
| Finished | Sep 11 08:29:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=915405456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.915405456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.2975498093 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 248941497 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:29:48 AM UTC 24 |
| Finished | Sep 11 08:29:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2975498093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_fifo_levels.2975498093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.528845271 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 183617425 ps |
| CPU time | 2.78 seconds |
| Started | Sep 11 08:29:50 AM UTC 24 |
| Finished | Sep 11 08:29:54 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528845271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_fifo_rst.528845271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.4102860306 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 163972521 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:29:50 AM UTC 24 |
| Finished | Sep 11 08:29:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102860306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.4102860306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.3999815739 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 142668543 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:29:50 AM UTC 24 |
| Finished | Sep 11 08:29:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3999815739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.3999815739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.1705975342 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 217935562 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:29:51 AM UTC 24 |
| Finished | Sep 11 08:29:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705975342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.1705975342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.51267685 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 4516940329 ps |
| CPU time | 47.18 seconds |
| Started | Sep 11 08:29:50 AM UTC 24 |
| Finished | Sep 11 08:30:39 AM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51267685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.51267685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.2319372483 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 10334851612 ps |
| CPU time | 79.04 seconds |
| Started | Sep 11 08:29:51 AM UTC 24 |
| Finished | Sep 11 08:31:12 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319372483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.2319372483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.2216281366 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 156322646 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:29:51 AM UTC 24 |
| Finished | Sep 11 08:29:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2216281366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.2216281366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.4151235683 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 7308202878 ps |
| CPU time | 14.23 seconds |
| Started | Sep 11 08:29:51 AM UTC 24 |
| Finished | Sep 11 08:30:07 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151235683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.4151235683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.514610232 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 9378101928 ps |
| CPU time | 14.33 seconds |
| Started | Sep 11 08:29:53 AM UTC 24 |
| Finished | Sep 11 08:30:08 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=514610232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_suspend.514610232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.4161659408 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 4383449558 ps |
| CPU time | 31.91 seconds |
| Started | Sep 11 08:29:53 AM UTC 24 |
| Finished | Sep 11 08:30:26 AM UTC 24 |
| Peak memory | 229744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161659408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.4161659408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.2155088844 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 3523664846 ps |
| CPU time | 90.53 seconds |
| Started | Sep 11 08:29:53 AM UTC 24 |
| Finished | Sep 11 08:31:25 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155088844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.2155088844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.3995710117 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 259951401 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:29:53 AM UTC 24 |
| Finished | Sep 11 08:29:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3995710117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.3995710117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.2364027485 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 191729614 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:29:53 AM UTC 24 |
| Finished | Sep 11 08:29:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2364027485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.2364027485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.508924439 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 2387590769 ps |
| CPU time | 61.21 seconds |
| Started | Sep 11 08:29:55 AM UTC 24 |
| Finished | Sep 11 08:30:57 AM UTC 24 |
| Peak memory | 227680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=508924439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.508924439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.1323036445 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 158974146 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:29:55 AM UTC 24 |
| Finished | Sep 11 08:29:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323036445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.1323036445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.3221164062 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 141010434 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:29:55 AM UTC 24 |
| Finished | Sep 11 08:29:57 AM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3221164062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.3221164062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.3618272667 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 192090261 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:29:55 AM UTC 24 |
| Finished | Sep 11 08:29:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618272667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_nak_trans.3618272667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.2211824423 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 186430079 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:29:55 AM UTC 24 |
| Finished | Sep 11 08:29:57 AM UTC 24 |
| Peak memory | 214776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211824423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.2211824423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.2851401788 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 165170239 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:29:55 AM UTC 24 |
| Finished | Sep 11 08:29:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2851401788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_out_stall.2851401788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.349644324 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 231306842 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:29:55 AM UTC 24 |
| Finished | Sep 11 08:29:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=349644324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_out_trans_nak.349644324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.4291901424 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 142942368 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:29:55 AM UTC 24 |
| Finished | Sep 11 08:29:57 AM UTC 24 |
| Peak memory | 214876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291901424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.4291901424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.1194703435 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 228029514 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:29:55 AM UTC 24 |
| Finished | Sep 11 08:29:57 AM UTC 24 |
| Peak memory | 214860 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194703435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.1194703435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.1240046650 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 141518209 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:29:55 AM UTC 24 |
| Finished | Sep 11 08:29:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240046650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.1240046650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.881686205 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 36226525 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:29:56 AM UTC 24 |
| Finished | Sep 11 08:29:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=881686205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_phy_pins_sense.881686205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.349690972 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 16407603784 ps |
| CPU time | 46.04 seconds |
| Started | Sep 11 08:29:56 AM UTC 24 |
| Finished | Sep 11 08:30:44 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=349690972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_pkt_buffer.349690972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.850401735 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 191538170 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:29:57 AM UTC 24 |
| Finished | Sep 11 08:29:59 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=850401735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_pkt_received.850401735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.2754133666 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 176863969 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:29:57 AM UTC 24 |
| Finished | Sep 11 08:30:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754133666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.2754133666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.3609125577 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 270556355 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:29:57 AM UTC 24 |
| Finished | Sep 11 08:30:00 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609125577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_random_length_in_transaction.3609125577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.3410075155 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 161163079 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:29:57 AM UTC 24 |
| Finished | Sep 11 08:30:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410075155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.3410075155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.4279636919 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 146508547 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:29:59 AM UTC 24 |
| Finished | Sep 11 08:30:01 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279636919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.4279636919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.1885957729 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 350385847 ps |
| CPU time | 2.15 seconds |
| Started | Sep 11 08:29:59 AM UTC 24 |
| Finished | Sep 11 08:30:02 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885957729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.1885957729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.595268217 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 148301727 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:29:59 AM UTC 24 |
| Finished | Sep 11 08:30:01 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=595268217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_setup_stage.595268217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.2328333481 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 151081642 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:29:59 AM UTC 24 |
| Finished | Sep 11 08:30:02 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2328333481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.2328333481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.2190276019 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 275089972 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:29:59 AM UTC 24 |
| Finished | Sep 11 08:30:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2190276019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.2190276019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.3999809767 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 3850822165 ps |
| CPU time | 98.89 seconds |
| Started | Sep 11 08:29:59 AM UTC 24 |
| Finished | Sep 11 08:31:40 AM UTC 24 |
| Peak memory | 234212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3999809767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.3999809767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.94831054 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 182026077 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:29:59 AM UTC 24 |
| Finished | Sep 11 08:30:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=94831054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.94831054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.634271102 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 187413598 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:29:59 AM UTC 24 |
| Finished | Sep 11 08:30:02 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=634271102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_stall_trans.634271102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.4239716747 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 1106358113 ps |
| CPU time | 5.19 seconds |
| Started | Sep 11 08:30:01 AM UTC 24 |
| Finished | Sep 11 08:30:07 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239716747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.4239716747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.3159498450 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 1627615892 ps |
| CPU time | 11.92 seconds |
| Started | Sep 11 08:30:01 AM UTC 24 |
| Finished | Sep 11 08:30:14 AM UTC 24 |
| Peak memory | 227332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159498450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.3159498450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.532391282 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 464885425 ps |
| CPU time | 8.83 seconds |
| Started | Sep 11 08:29:47 AM UTC 24 |
| Finished | Sep 11 08:29:57 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=532391282 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.532391282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.3196607994 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 425648075 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:30:01 AM UTC 24 |
| Finished | Sep 11 08:30:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3196607994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.3196607994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.862224844 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 502048388 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:37:13 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=862224844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_t x_rx_disruption.862224844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.1138213244 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 633821974 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:37:13 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1138213244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.1138213244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.1096943471 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 561644931 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:37:13 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1096943471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.1096943471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.2366452170 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 501969876 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:37:13 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2366452170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.2366452170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.3027814299 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 576030349 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:37:13 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3027814299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_ tx_rx_disruption.3027814299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.1958694174 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 488502475 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1958694174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_ tx_rx_disruption.1958694174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.482219883 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 555013045 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=482219883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_t x_rx_disruption.482219883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.3327653236 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 576462245 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3327653236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.3327653236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.1981193418 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 513457559 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1981193418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_ tx_rx_disruption.1981193418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.1591254106 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 558300419 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1591254106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_ tx_rx_disruption.1591254106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.278058457 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 53846418 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:20:16 AM UTC 24 |
| Finished | Sep 11 08:20:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=278058457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.278058457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.230491892 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 11129037919 ps |
| CPU time | 26.98 seconds |
| Started | Sep 11 08:19:18 AM UTC 24 |
| Finished | Sep 11 08:19:46 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=230491892 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.230491892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.10578838 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 20036984709 ps |
| CPU time | 34.64 seconds |
| Started | Sep 11 08:19:20 AM UTC 24 |
| Finished | Sep 11 08:19:56 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=10578838 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.10578838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.3053040968 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 25257418259 ps |
| CPU time | 53.24 seconds |
| Started | Sep 11 08:19:20 AM UTC 24 |
| Finished | Sep 11 08:20:15 AM UTC 24 |
| Peak memory | 227488 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3053040968 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.3053040968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.2199297207 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 186393421 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:19:20 AM UTC 24 |
| Finished | Sep 11 08:19:23 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199297207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.2199297207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.3794595675 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 158343535 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:19:21 AM UTC 24 |
| Finished | Sep 11 08:19:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3794595675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.3794595675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.2696195003 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 162305564 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:19:21 AM UTC 24 |
| Finished | Sep 11 08:19:23 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696195003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.2696195003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.269367211 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 142540134 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:19:22 AM UTC 24 |
| Finished | Sep 11 08:19:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269367211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_bitstuff_err.269367211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.2194106621 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 368096738 ps |
| CPU time | 2.29 seconds |
| Started | Sep 11 08:19:23 AM UTC 24 |
| Finished | Sep 11 08:19:26 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2194106621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_data_toggle_clear.2194106621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.3408684968 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 996098509 ps |
| CPU time | 4.23 seconds |
| Started | Sep 11 08:19:24 AM UTC 24 |
| Finished | Sep 11 08:19:29 AM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3408684968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.3408684968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.1200450012 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 47792373366 ps |
| CPU time | 86.91 seconds |
| Started | Sep 11 08:19:25 AM UTC 24 |
| Finished | Sep 11 08:20:54 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200450012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.1200450012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.982630128 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 2164105201 ps |
| CPU time | 19.76 seconds |
| Started | Sep 11 08:19:25 AM UTC 24 |
| Finished | Sep 11 08:19:46 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=982630128 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.982630128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.476795603 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 708788211 ps |
| CPU time | 3.13 seconds |
| Started | Sep 11 08:19:27 AM UTC 24 |
| Finished | Sep 11 08:19:31 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476795603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_disable_endpoint.476795603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.739109373 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 142380515 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:19:30 AM UTC 24 |
| Finished | Sep 11 08:19:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=739109373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_disconnected.739109373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_enable.1086700542 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 68826682 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:19:30 AM UTC 24 |
| Finished | Sep 11 08:19:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086700542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_enable.1086700542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.800768476 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 1002805518 ps |
| CPU time | 3.04 seconds |
| Started | Sep 11 08:19:30 AM UTC 24 |
| Finished | Sep 11 08:19:34 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=800768476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.800768476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.186430756 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 278490060 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:19:34 AM UTC 24 |
| Finished | Sep 11 08:19:37 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=186430756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_fifo_rst.186430756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.365367650 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 100181563994 ps |
| CPU time | 189.66 seconds |
| Started | Sep 11 08:19:35 AM UTC 24 |
| Finished | Sep 11 08:22:47 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=365367650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.365367650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.2712755060 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 113120245824 ps |
| CPU time | 210.91 seconds |
| Started | Sep 11 08:19:35 AM UTC 24 |
| Finished | Sep 11 08:23:09 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2712755060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_hiclk_max.2712755060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.2962380820 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 99109082361 ps |
| CPU time | 207.93 seconds |
| Started | Sep 11 08:19:35 AM UTC 24 |
| Finished | Sep 11 08:23:06 AM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2962380820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.2962380820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.4274653236 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 113153403206 ps |
| CPU time | 258.18 seconds |
| Started | Sep 11 08:19:35 AM UTC 24 |
| Finished | Sep 11 08:23:57 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=4274653236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.4274653236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.2424802298 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 234703062 ps |
| CPU time | 1.95 seconds |
| Started | Sep 11 08:19:38 AM UTC 24 |
| Finished | Sep 11 08:19:41 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2424802298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.2424802298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.1409074282 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 149804904 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:19:40 AM UTC 24 |
| Finished | Sep 11 08:19:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1409074282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_stall.1409074282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.320600881 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 198394981 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:19:41 AM UTC 24 |
| Finished | Sep 11 08:19:44 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=320600881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_in_trans.320600881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.801201194 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 5254714603 ps |
| CPU time | 153.93 seconds |
| Started | Sep 11 08:19:36 AM UTC 24 |
| Finished | Sep 11 08:22:12 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=801201194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.801201194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.1447450173 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 10849148742 ps |
| CPU time | 68.03 seconds |
| Started | Sep 11 08:19:43 AM UTC 24 |
| Finished | Sep 11 08:20:53 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447450173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.1447450173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1242201568 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 228580022 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:19:44 AM UTC 24 |
| Finished | Sep 11 08:19:47 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242201568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.1242201568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.248198238 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 11996770645 ps |
| CPU time | 30.49 seconds |
| Started | Sep 11 08:19:45 AM UTC 24 |
| Finished | Sep 11 08:20:16 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=248198238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_link_resume.248198238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.2613240029 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 11276328825 ps |
| CPU time | 26.93 seconds |
| Started | Sep 11 08:19:47 AM UTC 24 |
| Finished | Sep 11 08:20:15 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613240029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.2613240029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.1260185363 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 3076057382 ps |
| CPU time | 33.49 seconds |
| Started | Sep 11 08:19:47 AM UTC 24 |
| Finished | Sep 11 08:20:22 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260185363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.1260185363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.3409506215 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 3541975146 ps |
| CPU time | 30.36 seconds |
| Started | Sep 11 08:19:47 AM UTC 24 |
| Finished | Sep 11 08:20:18 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409506215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.3409506215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.2909915051 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 313973273 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:19:48 AM UTC 24 |
| Finished | Sep 11 08:19:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2909915051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.2909915051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.2880518919 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 198356612 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:19:49 AM UTC 24 |
| Finished | Sep 11 08:19:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880518919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.2880518919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.4150301558 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 2439523213 ps |
| CPU time | 20.17 seconds |
| Started | Sep 11 08:19:49 AM UTC 24 |
| Finished | Sep 11 08:20:11 AM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150301558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.4150301558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.1697678867 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 1825033228 ps |
| CPU time | 21.64 seconds |
| Started | Sep 11 08:19:52 AM UTC 24 |
| Finished | Sep 11 08:20:15 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697678867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.1697678867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.3469380203 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 3282314948 ps |
| CPU time | 93.63 seconds |
| Started | Sep 11 08:19:52 AM UTC 24 |
| Finished | Sep 11 08:21:27 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469380203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.3469380203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.2463402142 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 154803451 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:19:53 AM UTC 24 |
| Finished | Sep 11 08:19:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463402142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.2463402142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.1282157963 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 167547140 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:19:53 AM UTC 24 |
| Finished | Sep 11 08:19:55 AM UTC 24 |
| Peak memory | 214904 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282157963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.1282157963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.1904075655 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 185300974 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:19:53 AM UTC 24 |
| Finished | Sep 11 08:19:55 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1904075655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.1904075655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.4289419354 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 196943369 ps |
| CPU time | 0.98 seconds |
| Started | Sep 11 08:19:54 AM UTC 24 |
| Finished | Sep 11 08:19:56 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4289419354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_out_iso.4289419354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.2113662222 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 157643754 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:19:56 AM UTC 24 |
| Finished | Sep 11 08:19:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113662222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_out_stall.2113662222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.1378952419 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 161926112 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:19:56 AM UTC 24 |
| Finished | Sep 11 08:19:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378952419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_out_trans_nak.1378952419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.490860144 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 154556599 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:19:56 AM UTC 24 |
| Finished | Sep 11 08:19:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=490860144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pending_in_trans.490860144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.867719206 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 257059501 ps |
| CPU time | 1.82 seconds |
| Started | Sep 11 08:19:57 AM UTC 24 |
| Finished | Sep 11 08:20:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=867719206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.867719206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.3148584562 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 212425076 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:19:57 AM UTC 24 |
| Finished | Sep 11 08:20:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148584562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.3148584562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.3055658438 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 227747883 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:19:58 AM UTC 24 |
| Finished | Sep 11 08:20:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055658438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.3055658438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.2434132214 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 49297553 ps |
| CPU time | 0.94 seconds |
| Started | Sep 11 08:19:59 AM UTC 24 |
| Finished | Sep 11 08:20:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434132214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.2434132214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.935697427 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 16581639229 ps |
| CPU time | 55.43 seconds |
| Started | Sep 11 08:20:00 AM UTC 24 |
| Finished | Sep 11 08:20:57 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=935697427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_pkt_buffer.935697427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.2987792869 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 162559246 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:20:00 AM UTC 24 |
| Finished | Sep 11 08:20:02 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987792869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_pkt_received.2987792869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.4272232772 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 193975570 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:20:00 AM UTC 24 |
| Finished | Sep 11 08:20:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272232772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_pkt_sent.4272232772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.2233811653 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 10549044406 ps |
| CPU time | 197.35 seconds |
| Started | Sep 11 08:20:02 AM UTC 24 |
| Finished | Sep 11 08:23:22 AM UTC 24 |
| Peak memory | 234292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2233811653 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.2233811653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.930197151 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 5938700942 ps |
| CPU time | 25 seconds |
| Started | Sep 11 08:20:02 AM UTC 24 |
| Finished | Sep 11 08:20:28 AM UTC 24 |
| Peak memory | 231648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=930197151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.930197151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.2047027602 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 11235562840 ps |
| CPU time | 77.41 seconds |
| Started | Sep 11 08:20:02 AM UTC 24 |
| Finished | Sep 11 08:21:21 AM UTC 24 |
| Peak memory | 234368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047027602 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.2047027602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.1334691679 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 235614914 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:20:00 AM UTC 24 |
| Finished | Sep 11 08:20:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334691679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.1334691679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.2595260176 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 217928867 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:20:02 AM UTC 24 |
| Finished | Sep 11 08:20:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2595260176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.2595260176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.3889432388 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 20169286680 ps |
| CPU time | 33.97 seconds |
| Started | Sep 11 08:20:02 AM UTC 24 |
| Finished | Sep 11 08:20:37 AM UTC 24 |
| Peak memory | 217276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3889432388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.3889432388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.1319530416 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 172658559 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:20:03 AM UTC 24 |
| Finished | Sep 11 08:20:05 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1319530416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.1319530416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.1917459086 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 305598085 ps |
| CPU time | 2.06 seconds |
| Started | Sep 11 08:20:03 AM UTC 24 |
| Finished | Sep 11 08:20:06 AM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917459086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_rx_full.1917459086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.506940876 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 250783149 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:20:03 AM UTC 24 |
| Finished | Sep 11 08:20:06 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506940876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_rx_pid_err.506940876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.1169251516 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 483845766 ps |
| CPU time | 2.21 seconds |
| Started | Sep 11 08:20:15 AM UTC 24 |
| Finished | Sep 11 08:20:18 AM UTC 24 |
| Peak memory | 251532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1169251516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.1169251516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.2735041806 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 395644895 ps |
| CPU time | 1.95 seconds |
| Started | Sep 11 08:20:04 AM UTC 24 |
| Finished | Sep 11 08:20:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735041806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.2735041806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.3413286221 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 341212648 ps |
| CPU time | 2.09 seconds |
| Started | Sep 11 08:20:05 AM UTC 24 |
| Finished | Sep 11 08:20:08 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413286221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.3413286221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.3014002543 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 200382544 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:20:06 AM UTC 24 |
| Finished | Sep 11 08:20:09 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014002543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_setup_stage.3014002543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.445095971 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 142457400 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:20:06 AM UTC 24 |
| Finished | Sep 11 08:20:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=445095971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_setup_trans_ignored.445095971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.2009936022 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 217696431 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:20:06 AM UTC 24 |
| Finished | Sep 11 08:20:09 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009936022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.2009936022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.2871015786 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 1927174807 ps |
| CPU time | 15.65 seconds |
| Started | Sep 11 08:20:09 AM UTC 24 |
| Finished | Sep 11 08:20:25 AM UTC 24 |
| Peak memory | 234056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871015786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.2871015786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.3044131660 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 148925494 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:20:10 AM UTC 24 |
| Finished | Sep 11 08:20:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044131660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.3044131660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.1717388803 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 171105426 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:20:10 AM UTC 24 |
| Finished | Sep 11 08:20:12 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717388803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.1717388803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.3964304678 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 824376835 ps |
| CPU time | 2.49 seconds |
| Started | Sep 11 08:20:11 AM UTC 24 |
| Finished | Sep 11 08:20:15 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3964304678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.3964304678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.183858956 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 2403455449 ps |
| CPU time | 25.14 seconds |
| Started | Sep 11 08:20:11 AM UTC 24 |
| Finished | Sep 11 08:20:38 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=183858956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_streaming_out.183858956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.1404312693 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 12314099676 ps |
| CPU time | 72.76 seconds |
| Started | Sep 11 08:20:12 AM UTC 24 |
| Finished | Sep 11 08:21:26 AM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1404312693 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.1404312693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.2948476356 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 3663618276 ps |
| CPU time | 25.87 seconds |
| Started | Sep 11 08:19:26 AM UTC 24 |
| Finished | Sep 11 08:19:53 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2948476356 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.2948476356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.2763886782 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 526891361 ps |
| CPU time | 2.92 seconds |
| Started | Sep 11 08:20:14 AM UTC 24 |
| Finished | Sep 11 08:20:18 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2763886782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.2763886782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.1869840450 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 40115183 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:30:17 AM UTC 24 |
| Finished | Sep 11 08:30:19 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869840450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.1869840450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.1159789457 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 11676407942 ps |
| CPU time | 16.15 seconds |
| Started | Sep 11 08:30:01 AM UTC 24 |
| Finished | Sep 11 08:30:19 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159789457 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.1159789457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.2121958548 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 20220961144 ps |
| CPU time | 29.45 seconds |
| Started | Sep 11 08:30:01 AM UTC 24 |
| Finished | Sep 11 08:30:32 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121958548 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.2121958548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.2204288461 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 26088087770 ps |
| CPU time | 39.95 seconds |
| Started | Sep 11 08:30:02 AM UTC 24 |
| Finished | Sep 11 08:30:43 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204288461 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.2204288461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.2311050785 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 158338011 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:30:02 AM UTC 24 |
| Finished | Sep 11 08:30:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2311050785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.2311050785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.3956741882 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 144967603 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:30:03 AM UTC 24 |
| Finished | Sep 11 08:30:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3956741882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_bitstuff_err.3956741882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.2484911465 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 204560318 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:30:03 AM UTC 24 |
| Finished | Sep 11 08:30:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484911465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.2484911465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.3003629248 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 1080704871 ps |
| CPU time | 3.11 seconds |
| Started | Sep 11 08:30:03 AM UTC 24 |
| Finished | Sep 11 08:30:07 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003629248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.3003629248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.3340919622 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 40317261344 ps |
| CPU time | 69.15 seconds |
| Started | Sep 11 08:30:03 AM UTC 24 |
| Finished | Sep 11 08:31:14 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3340919622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.3340919622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.2633763577 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 4753724064 ps |
| CPU time | 38.08 seconds |
| Started | Sep 11 08:30:03 AM UTC 24 |
| Finished | Sep 11 08:30:43 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2633763577 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.2633763577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.4109034066 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 620239146 ps |
| CPU time | 2.83 seconds |
| Started | Sep 11 08:30:03 AM UTC 24 |
| Finished | Sep 11 08:30:07 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109034066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_disable_endpoint.4109034066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.3704600331 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 148256561 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:30:05 AM UTC 24 |
| Finished | Sep 11 08:30:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704600331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.3704600331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_enable.3847379851 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 35038318 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:30:05 AM UTC 24 |
| Finished | Sep 11 08:30:07 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847379851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.3847379851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.1559999765 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 817932156 ps |
| CPU time | 4.11 seconds |
| Started | Sep 11 08:30:05 AM UTC 24 |
| Finished | Sep 11 08:30:10 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559999765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.1559999765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.3285846261 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 179524756 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:30:05 AM UTC 24 |
| Finished | Sep 11 08:30:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3285846261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.3285846261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.3862013372 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 148893671 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:30:05 AM UTC 24 |
| Finished | Sep 11 08:30:07 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862013372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_fifo_levels.3862013372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.3797255516 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 288855098 ps |
| CPU time | 2.8 seconds |
| Started | Sep 11 08:30:05 AM UTC 24 |
| Finished | Sep 11 08:30:09 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3797255516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.3797255516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.2198423321 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 229982403 ps |
| CPU time | 2.03 seconds |
| Started | Sep 11 08:30:05 AM UTC 24 |
| Finished | Sep 11 08:30:08 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198423321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.2198423321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.1206912912 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 143154305 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:30:06 AM UTC 24 |
| Finished | Sep 11 08:30:08 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206912912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.1206912912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.987707573 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 162781917 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:30:06 AM UTC 24 |
| Finished | Sep 11 08:30:08 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=987707573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_in_trans.987707573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.2989591723 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 3136130323 ps |
| CPU time | 23.98 seconds |
| Started | Sep 11 08:30:05 AM UTC 24 |
| Finished | Sep 11 08:30:30 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989591723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.2989591723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.2143021455 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 5062370411 ps |
| CPU time | 38.24 seconds |
| Started | Sep 11 08:30:07 AM UTC 24 |
| Finished | Sep 11 08:30:47 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143021455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.2143021455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.2911555638 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 216751198 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:30:07 AM UTC 24 |
| Finished | Sep 11 08:30:10 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911555638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.2911555638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.795252416 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 30291936202 ps |
| CPU time | 51.9 seconds |
| Started | Sep 11 08:30:08 AM UTC 24 |
| Finished | Sep 11 08:31:01 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=795252416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_link_resume.795252416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.3588914953 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 10876291382 ps |
| CPU time | 18.24 seconds |
| Started | Sep 11 08:30:09 AM UTC 24 |
| Finished | Sep 11 08:30:29 AM UTC 24 |
| Peak memory | 216800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588914953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.3588914953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.3406310530 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 3922475724 ps |
| CPU time | 103.86 seconds |
| Started | Sep 11 08:30:09 AM UTC 24 |
| Finished | Sep 11 08:31:55 AM UTC 24 |
| Peak memory | 229176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3406310530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.3406310530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.101801195 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 3700001830 ps |
| CPU time | 99.47 seconds |
| Started | Sep 11 08:30:09 AM UTC 24 |
| Finished | Sep 11 08:31:51 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=101801195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.101801195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.708587571 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 250441871 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:30:09 AM UTC 24 |
| Finished | Sep 11 08:30:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=708587571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.708587571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.1976809067 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 195998224 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:30:10 AM UTC 24 |
| Finished | Sep 11 08:30:12 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976809067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.1976809067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.3285564140 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 2967366617 ps |
| CPU time | 32.67 seconds |
| Started | Sep 11 08:30:10 AM UTC 24 |
| Finished | Sep 11 08:30:44 AM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3285564140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.3285564140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.3640673422 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 156612818 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:30:10 AM UTC 24 |
| Finished | Sep 11 08:30:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3640673422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.3640673422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.3955366937 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 152790477 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:30:10 AM UTC 24 |
| Finished | Sep 11 08:30:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955366937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.3955366937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.233857232 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 175727770 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:30:10 AM UTC 24 |
| Finished | Sep 11 08:30:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=233857232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_out_iso.233857232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.2158127635 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 149983347 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:30:10 AM UTC 24 |
| Finished | Sep 11 08:30:12 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2158127635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_out_stall.2158127635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.1378088610 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 181075774 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:30:11 AM UTC 24 |
| Finished | Sep 11 08:30:13 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378088610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.1378088610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.1700072715 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 154574599 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:30:11 AM UTC 24 |
| Finished | Sep 11 08:30:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700072715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.1700072715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.4269614183 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 217746667 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:30:11 AM UTC 24 |
| Finished | Sep 11 08:30:14 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269614183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.4269614183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.3767245239 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 141423349 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:30:11 AM UTC 24 |
| Finished | Sep 11 08:30:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767245239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.3767245239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.2035712158 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 41229363 ps |
| CPU time | 0.98 seconds |
| Started | Sep 11 08:30:11 AM UTC 24 |
| Finished | Sep 11 08:30:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2035712158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.2035712158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.3880493244 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 12935440404 ps |
| CPU time | 37.48 seconds |
| Started | Sep 11 08:30:13 AM UTC 24 |
| Finished | Sep 11 08:30:52 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880493244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.3880493244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.373724810 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 196038445 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:30:13 AM UTC 24 |
| Finished | Sep 11 08:30:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=373724810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_pkt_received.373724810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.222987582 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 259654294 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:30:13 AM UTC 24 |
| Finished | Sep 11 08:30:16 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=222987582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_pkt_sent.222987582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.21845411 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 224572379 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:30:13 AM UTC 24 |
| Finished | Sep 11 08:30:16 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21845411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_random_length_in_transaction.21845411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.290453753 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 203196921 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:30:13 AM UTC 24 |
| Finished | Sep 11 08:30:16 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=290453753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.290453753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.2815697830 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 221749871 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:30:13 AM UTC 24 |
| Finished | Sep 11 08:30:16 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815697830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_rx_crc_err.2815697830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.1212197610 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 366038020 ps |
| CPU time | 2.29 seconds |
| Started | Sep 11 08:30:15 AM UTC 24 |
| Finished | Sep 11 08:30:18 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1212197610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.1212197610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.1791715405 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 150926555 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:30:15 AM UTC 24 |
| Finished | Sep 11 08:30:17 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1791715405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.1791715405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.1359395218 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 155595670 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:30:15 AM UTC 24 |
| Finished | Sep 11 08:30:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359395218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.1359395218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.231748978 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 252655858 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:30:15 AM UTC 24 |
| Finished | Sep 11 08:30:18 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231748978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.231748978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.3425725634 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 2140805753 ps |
| CPU time | 21.15 seconds |
| Started | Sep 11 08:30:15 AM UTC 24 |
| Finished | Sep 11 08:30:38 AM UTC 24 |
| Peak memory | 234104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3425725634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.3425725634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.528092309 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 181004637 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:30:15 AM UTC 24 |
| Finished | Sep 11 08:30:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528092309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.528092309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.3872240504 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 189129985 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:30:15 AM UTC 24 |
| Finished | Sep 11 08:30:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872240504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.3872240504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.2264904574 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 337375481 ps |
| CPU time | 1.92 seconds |
| Started | Sep 11 08:30:17 AM UTC 24 |
| Finished | Sep 11 08:30:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264904574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.2264904574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.2420289907 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 2617362108 ps |
| CPU time | 19.87 seconds |
| Started | Sep 11 08:30:15 AM UTC 24 |
| Finished | Sep 11 08:30:36 AM UTC 24 |
| Peak memory | 234152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2420289907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.2420289907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.805214984 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 4791678638 ps |
| CPU time | 42.17 seconds |
| Started | Sep 11 08:30:03 AM UTC 24 |
| Finished | Sep 11 08:30:47 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=805214984 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.805214984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.876376572 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 512958396 ps |
| CPU time | 2.01 seconds |
| Started | Sep 11 08:30:17 AM UTC 24 |
| Finished | Sep 11 08:30:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=876376572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_tx _rx_disruption.876376572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.3427937985 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 504186806 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3427937985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.3427937985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.1564537821 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 595141864 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1564537821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.1564537821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.3958019424 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 542525546 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3958019424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_ tx_rx_disruption.3958019424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.2035598304 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 477137762 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2035598304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.2035598304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.949436812 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 611170771 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=949436812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_t x_rx_disruption.949436812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.1974814204 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 637044614 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1974814204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.1974814204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.1609484433 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 593130700 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1609484433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_ tx_rx_disruption.1609484433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.2782643135 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 46847602 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:30:35 AM UTC 24 |
| Finished | Sep 11 08:30:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782643135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.2782643135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.4218891128 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 4466311014 ps |
| CPU time | 12.51 seconds |
| Started | Sep 11 08:30:17 AM UTC 24 |
| Finished | Sep 11 08:30:31 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4218891128 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.4218891128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.2995011464 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 14211750412 ps |
| CPU time | 28.01 seconds |
| Started | Sep 11 08:30:17 AM UTC 24 |
| Finished | Sep 11 08:30:47 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995011464 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.2995011464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.115397017 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 24080948548 ps |
| CPU time | 34.4 seconds |
| Started | Sep 11 08:30:17 AM UTC 24 |
| Finished | Sep 11 08:30:53 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=115397017 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.115397017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.3605527065 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 161305443 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:30:19 AM UTC 24 |
| Finished | Sep 11 08:30:21 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605527065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.3605527065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.2509520190 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 188312416 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:30:19 AM UTC 24 |
| Finished | Sep 11 08:30:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2509520190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_bitstuff_err.2509520190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.968821316 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 335892000 ps |
| CPU time | 2.23 seconds |
| Started | Sep 11 08:30:19 AM UTC 24 |
| Finished | Sep 11 08:30:22 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=968821316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_data_toggle_clear.968821316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.537399722 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 630426595 ps |
| CPU time | 2.42 seconds |
| Started | Sep 11 08:30:19 AM UTC 24 |
| Finished | Sep 11 08:30:22 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=537399722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.537399722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.3259734320 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 26247996087 ps |
| CPU time | 48.48 seconds |
| Started | Sep 11 08:30:19 AM UTC 24 |
| Finished | Sep 11 08:31:09 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259734320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.3259734320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.3338822985 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 272780414 ps |
| CPU time | 5.81 seconds |
| Started | Sep 11 08:30:19 AM UTC 24 |
| Finished | Sep 11 08:30:26 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3338822985 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.3338822985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.561850243 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 807850383 ps |
| CPU time | 2.86 seconds |
| Started | Sep 11 08:30:21 AM UTC 24 |
| Finished | Sep 11 08:30:25 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561850243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_disable_endpoint.561850243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.2729764375 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 146550141 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:30:21 AM UTC 24 |
| Finished | Sep 11 08:30:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729764375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_disconnected.2729764375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_enable.3784090809 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 57602328 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:30:21 AM UTC 24 |
| Finished | Sep 11 08:30:23 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3784090809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.3784090809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.1888378206 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 903220641 ps |
| CPU time | 2.88 seconds |
| Started | Sep 11 08:30:21 AM UTC 24 |
| Finished | Sep 11 08:30:25 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888378206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.1888378206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.2542386550 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 167717271 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:30:21 AM UTC 24 |
| Finished | Sep 11 08:30:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542386550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.2542386550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_levels.3764527731 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 152915273 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:30:22 AM UTC 24 |
| Finished | Sep 11 08:30:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764527731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_fifo_levels.3764527731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.3746403980 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 378599964 ps |
| CPU time | 2.73 seconds |
| Started | Sep 11 08:30:22 AM UTC 24 |
| Finished | Sep 11 08:30:26 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3746403980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.3746403980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.3703636832 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 201802299 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:30:24 AM UTC 24 |
| Finished | Sep 11 08:30:26 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703636832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.3703636832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.723011914 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 166286713 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:30:24 AM UTC 24 |
| Finished | Sep 11 08:30:26 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=723011914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_in_stall.723011914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.2382199347 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 237815426 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:30:24 AM UTC 24 |
| Finished | Sep 11 08:30:26 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382199347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.2382199347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.311216152 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 3345445525 ps |
| CPU time | 32.83 seconds |
| Started | Sep 11 08:30:22 AM UTC 24 |
| Finished | Sep 11 08:30:57 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=311216152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.311216152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.519641543 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 8683702367 ps |
| CPU time | 65.16 seconds |
| Started | Sep 11 08:30:24 AM UTC 24 |
| Finished | Sep 11 08:31:31 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=519641543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.519641543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.3097611093 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 168119515 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:30:24 AM UTC 24 |
| Finished | Sep 11 08:30:27 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097611093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.3097611093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.1454873576 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 13072099525 ps |
| CPU time | 23.82 seconds |
| Started | Sep 11 08:30:24 AM UTC 24 |
| Finished | Sep 11 08:30:49 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454873576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.1454873576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.2390691552 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 3483078722 ps |
| CPU time | 7 seconds |
| Started | Sep 11 08:30:26 AM UTC 24 |
| Finished | Sep 11 08:30:34 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390691552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.2390691552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.2290659584 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 3065745079 ps |
| CPU time | 25.47 seconds |
| Started | Sep 11 08:30:26 AM UTC 24 |
| Finished | Sep 11 08:30:52 AM UTC 24 |
| Peak memory | 233876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290659584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.2290659584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.3349167564 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 1874770187 ps |
| CPU time | 18.54 seconds |
| Started | Sep 11 08:30:26 AM UTC 24 |
| Finished | Sep 11 08:30:46 AM UTC 24 |
| Peak memory | 229204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349167564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.3349167564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.3239662617 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 294598233 ps |
| CPU time | 1.9 seconds |
| Started | Sep 11 08:30:26 AM UTC 24 |
| Finished | Sep 11 08:30:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239662617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.3239662617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.1341567764 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 195843585 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:30:27 AM UTC 24 |
| Finished | Sep 11 08:30:30 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341567764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.1341567764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.689832045 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 2392340436 ps |
| CPU time | 63.34 seconds |
| Started | Sep 11 08:30:27 AM UTC 24 |
| Finished | Sep 11 08:31:32 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=689832045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.689832045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.866858778 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 152949065 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:30:27 AM UTC 24 |
| Finished | Sep 11 08:30:30 AM UTC 24 |
| Peak memory | 214868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=866858778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.866858778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.2456320429 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 150856201 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:30:27 AM UTC 24 |
| Finished | Sep 11 08:30:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456320429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.2456320429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.190155433 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 179919145 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:30:28 AM UTC 24 |
| Finished | Sep 11 08:30:30 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=190155433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_nak_trans.190155433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.1601970287 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 158398892 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:30:28 AM UTC 24 |
| Finished | Sep 11 08:30:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601970287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.1601970287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.3461862747 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 148083228 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:30:28 AM UTC 24 |
| Finished | Sep 11 08:30:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461862747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.3461862747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.2040713854 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 175107342 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:30:30 AM UTC 24 |
| Finished | Sep 11 08:30:32 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040713854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.2040713854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.3038616086 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 196448695 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:30:30 AM UTC 24 |
| Finished | Sep 11 08:30:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3038616086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.3038616086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.1710546441 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 196006899 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:30:30 AM UTC 24 |
| Finished | Sep 11 08:30:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710546441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.1710546441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.1497761994 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 143500792 ps |
| CPU time | 0.98 seconds |
| Started | Sep 11 08:30:32 AM UTC 24 |
| Finished | Sep 11 08:30:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497761994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.1497761994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.715555055 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 33926065 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:30:32 AM UTC 24 |
| Finished | Sep 11 08:30:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=715555055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_phy_pins_sense.715555055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.2455133322 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 8489335147 ps |
| CPU time | 25.85 seconds |
| Started | Sep 11 08:30:32 AM UTC 24 |
| Finished | Sep 11 08:30:59 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455133322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.2455133322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.2771652579 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 193911036 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:30:32 AM UTC 24 |
| Finished | Sep 11 08:30:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771652579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.2771652579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.4177034955 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 245668240 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:30:32 AM UTC 24 |
| Finished | Sep 11 08:30:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4177034955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.4177034955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.1964345379 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 209939231 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:30:32 AM UTC 24 |
| Finished | Sep 11 08:30:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1964345379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.1964345379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.1112600897 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 194872904 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:30:32 AM UTC 24 |
| Finished | Sep 11 08:30:35 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112600897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.1112600897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.3536437748 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 191402037 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:30:32 AM UTC 24 |
| Finished | Sep 11 08:30:34 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3536437748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.3536437748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.3673324427 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 401075263 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:30:32 AM UTC 24 |
| Finished | Sep 11 08:30:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673324427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.3673324427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.718787191 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 183259432 ps |
| CPU time | 0.95 seconds |
| Started | Sep 11 08:30:32 AM UTC 24 |
| Finished | Sep 11 08:30:34 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=718787191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_setup_stage.718787191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.3510406920 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 151335770 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:30:33 AM UTC 24 |
| Finished | Sep 11 08:30:36 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3510406920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.3510406920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.1661486769 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 243018118 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:30:34 AM UTC 24 |
| Finished | Sep 11 08:30:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1661486769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.1661486769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.1651983910 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 2681040628 ps |
| CPU time | 25.68 seconds |
| Started | Sep 11 08:30:34 AM UTC 24 |
| Finished | Sep 11 08:31:01 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651983910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.1651983910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.1460116696 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 183555188 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:30:34 AM UTC 24 |
| Finished | Sep 11 08:30:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1460116696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.1460116696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.1659709663 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 179859536 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:30:35 AM UTC 24 |
| Finished | Sep 11 08:30:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1659709663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.1659709663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.3809148232 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 459517398 ps |
| CPU time | 2.84 seconds |
| Started | Sep 11 08:30:35 AM UTC 24 |
| Finished | Sep 11 08:30:39 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3809148232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.3809148232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.3863758129 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 2319526795 ps |
| CPU time | 17.31 seconds |
| Started | Sep 11 08:30:35 AM UTC 24 |
| Finished | Sep 11 08:30:54 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863758129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.3863758129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.1338249729 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 1061079432 ps |
| CPU time | 8.94 seconds |
| Started | Sep 11 08:30:21 AM UTC 24 |
| Finished | Sep 11 08:30:31 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1338249729 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.1338249729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.4163116904 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 519062286 ps |
| CPU time | 2.58 seconds |
| Started | Sep 11 08:30:35 AM UTC 24 |
| Finished | Sep 11 08:30:39 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4163116904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.4163116904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.4096256379 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 549825862 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4096256379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_ tx_rx_disruption.4096256379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.3574522103 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 494512903 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:37:15 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3574522103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_ tx_rx_disruption.3574522103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.3010079593 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 528519472 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:37:17 AM UTC 24 |
| Finished | Sep 11 08:37:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3010079593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.3010079593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.259786319 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 539587804 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:37:17 AM UTC 24 |
| Finished | Sep 11 08:37:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=259786319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_t x_rx_disruption.259786319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.688606970 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 447294717 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:37:17 AM UTC 24 |
| Finished | Sep 11 08:37:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=688606970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_t x_rx_disruption.688606970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.3601772897 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 470609632 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:37:17 AM UTC 24 |
| Finished | Sep 11 08:37:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3601772897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.3601772897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.254222501 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 615781952 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:37:17 AM UTC 24 |
| Finished | Sep 11 08:37:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=254222501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_t x_rx_disruption.254222501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.687064545 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 576342592 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:37:17 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=687064545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_t x_rx_disruption.687064545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.312071704 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 498378700 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:37:17 AM UTC 24 |
| Finished | Sep 11 08:37:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=312071704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_t x_rx_disruption.312071704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.1530141533 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 448624006 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:37:17 AM UTC 24 |
| Finished | Sep 11 08:37:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1530141533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_ tx_rx_disruption.1530141533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.2154427966 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 111594975 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:30:51 AM UTC 24 |
| Finished | Sep 11 08:30:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154427966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.2154427966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.4292479629 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 11039179326 ps |
| CPU time | 18.14 seconds |
| Started | Sep 11 08:30:35 AM UTC 24 |
| Finished | Sep 11 08:30:55 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4292479629 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.4292479629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.468086310 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 16245757526 ps |
| CPU time | 21.2 seconds |
| Started | Sep 11 08:30:37 AM UTC 24 |
| Finished | Sep 11 08:30:59 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=468086310 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.468086310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.572136972 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 30535272671 ps |
| CPU time | 46.48 seconds |
| Started | Sep 11 08:30:37 AM UTC 24 |
| Finished | Sep 11 08:31:25 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=572136972 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.572136972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.3343668507 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 186319944 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:30:37 AM UTC 24 |
| Finished | Sep 11 08:30:39 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343668507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.3343668507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.1806985593 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 205031702 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:30:37 AM UTC 24 |
| Finished | Sep 11 08:30:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806985593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_bitstuff_err.1806985593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.462727405 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 562223004 ps |
| CPU time | 2.65 seconds |
| Started | Sep 11 08:30:37 AM UTC 24 |
| Finished | Sep 11 08:30:40 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=462727405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_data_toggle_clear.462727405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.1807987822 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 976439783 ps |
| CPU time | 3.35 seconds |
| Started | Sep 11 08:30:38 AM UTC 24 |
| Finished | Sep 11 08:30:43 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807987822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.1807987822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.4149270195 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 22491426654 ps |
| CPU time | 42.28 seconds |
| Started | Sep 11 08:30:38 AM UTC 24 |
| Finished | Sep 11 08:31:22 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4149270195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.4149270195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.3535960927 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 1097122001 ps |
| CPU time | 8.95 seconds |
| Started | Sep 11 08:30:38 AM UTC 24 |
| Finished | Sep 11 08:30:49 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535960927 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.3535960927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.3761905379 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 572753335 ps |
| CPU time | 2.07 seconds |
| Started | Sep 11 08:30:39 AM UTC 24 |
| Finished | Sep 11 08:30:42 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3761905379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.3761905379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.2991799026 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 139140242 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:30:39 AM UTC 24 |
| Finished | Sep 11 08:30:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2991799026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.2991799026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_enable.4110880911 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 49679263 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:30:39 AM UTC 24 |
| Finished | Sep 11 08:30:41 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4110880911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.4110880911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.2390710186 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 797408412 ps |
| CPU time | 2.71 seconds |
| Started | Sep 11 08:30:40 AM UTC 24 |
| Finished | Sep 11 08:30:44 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390710186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.2390710186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.3135113280 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 391696942 ps |
| CPU time | 2.02 seconds |
| Started | Sep 11 08:30:40 AM UTC 24 |
| Finished | Sep 11 08:30:43 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135113280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.3135113280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.3518248161 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 156831973 ps |
| CPU time | 2.05 seconds |
| Started | Sep 11 08:30:40 AM UTC 24 |
| Finished | Sep 11 08:30:44 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3518248161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_fifo_rst.3518248161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.1976700915 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 163056735 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:30:41 AM UTC 24 |
| Finished | Sep 11 08:30:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976700915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.1976700915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.4292315140 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 158698110 ps |
| CPU time | 1 seconds |
| Started | Sep 11 08:30:43 AM UTC 24 |
| Finished | Sep 11 08:30:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4292315140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.4292315140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.3560764964 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 177067420 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:30:43 AM UTC 24 |
| Finished | Sep 11 08:30:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560764964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_trans.3560764964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.1864478654 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 4582731690 ps |
| CPU time | 46.98 seconds |
| Started | Sep 11 08:30:41 AM UTC 24 |
| Finished | Sep 11 08:31:29 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864478654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.1864478654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.1128030123 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 3489905357 ps |
| CPU time | 24.59 seconds |
| Started | Sep 11 08:30:43 AM UTC 24 |
| Finished | Sep 11 08:31:10 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128030123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.1128030123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.1559884750 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 229215207 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:30:43 AM UTC 24 |
| Finished | Sep 11 08:30:46 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559884750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.1559884750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.2494504742 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 10538844587 ps |
| CPU time | 17.72 seconds |
| Started | Sep 11 08:30:43 AM UTC 24 |
| Finished | Sep 11 08:31:03 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494504742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.2494504742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.3624882347 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 8420418189 ps |
| CPU time | 14.75 seconds |
| Started | Sep 11 08:30:43 AM UTC 24 |
| Finished | Sep 11 08:31:00 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3624882347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.3624882347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.4220179493 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 3367382451 ps |
| CPU time | 85.06 seconds |
| Started | Sep 11 08:30:43 AM UTC 24 |
| Finished | Sep 11 08:32:11 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220179493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.4220179493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.579036940 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 3452172891 ps |
| CPU time | 30.6 seconds |
| Started | Sep 11 08:30:43 AM UTC 24 |
| Finished | Sep 11 08:31:16 AM UTC 24 |
| Peak memory | 227452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579036940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.579036940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.1593999767 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 253091885 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:30:44 AM UTC 24 |
| Finished | Sep 11 08:30:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593999767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.1593999767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.3497487480 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 237431227 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:30:44 AM UTC 24 |
| Finished | Sep 11 08:30:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3497487480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.3497487480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.1153123727 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 4346974716 ps |
| CPU time | 32.08 seconds |
| Started | Sep 11 08:30:45 AM UTC 24 |
| Finished | Sep 11 08:31:19 AM UTC 24 |
| Peak memory | 227724 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153123727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.1153123727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.657254119 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 154089763 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:30:45 AM UTC 24 |
| Finished | Sep 11 08:30:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=657254119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.657254119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.1258389849 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 160502737 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:30:45 AM UTC 24 |
| Finished | Sep 11 08:30:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258389849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.1258389849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.2415806618 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 213389843 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:30:45 AM UTC 24 |
| Finished | Sep 11 08:30:48 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415806618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.2415806618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.256640473 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 181040010 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:30:45 AM UTC 24 |
| Finished | Sep 11 08:30:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=256640473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_out_iso.256640473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.1540488871 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 186717636 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:30:45 AM UTC 24 |
| Finished | Sep 11 08:30:48 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1540488871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_out_stall.1540488871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.602682166 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 197670193 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:30:45 AM UTC 24 |
| Finished | Sep 11 08:30:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=602682166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_out_trans_nak.602682166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.3144555928 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 153598605 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:30:45 AM UTC 24 |
| Finished | Sep 11 08:30:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3144555928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_pending_in_trans.3144555928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.2520810507 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 217064463 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:30:45 AM UTC 24 |
| Finished | Sep 11 08:30:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2520810507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.2520810507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.2578768670 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 139818870 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:30:47 AM UTC 24 |
| Finished | Sep 11 08:30:49 AM UTC 24 |
| Peak memory | 214748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2578768670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.2578768670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.1533940790 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 58463356 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:30:47 AM UTC 24 |
| Finished | Sep 11 08:30:49 AM UTC 24 |
| Peak memory | 214836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1533940790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.1533940790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.4208951187 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 11882070294 ps |
| CPU time | 34.45 seconds |
| Started | Sep 11 08:30:47 AM UTC 24 |
| Finished | Sep 11 08:31:23 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208951187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.4208951187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.1517264263 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 216961667 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:30:47 AM UTC 24 |
| Finished | Sep 11 08:30:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1517264263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.1517264263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.1149365148 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 213787058 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:30:47 AM UTC 24 |
| Finished | Sep 11 08:30:49 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149365148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.1149365148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.1907665470 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 226688323 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:30:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907665470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.1907665470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.487578713 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 179568255 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:30:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487578713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.487578713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.159279102 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 152740052 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:30:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159279102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_rx_crc_err.159279102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.3488756086 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 264199234 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:30:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488756086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_rx_full.3488756086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.2541540331 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 160536035 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:30:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541540331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_setup_stage.2541540331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.750454199 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 211536444 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:30:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=750454199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 32.usbdev_setup_trans_ignored.750454199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.578804610 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 248389546 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:30:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=578804610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.578804610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.2973744819 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 1949618194 ps |
| CPU time | 13.83 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:31:04 AM UTC 24 |
| Peak memory | 234104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973744819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.2973744819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.3043417749 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 175698678 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:30:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3043417749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.3043417749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.3060221315 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 198667400 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:30:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3060221315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.3060221315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.1937340828 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 963211656 ps |
| CPU time | 3.52 seconds |
| Started | Sep 11 08:30:51 AM UTC 24 |
| Finished | Sep 11 08:30:55 AM UTC 24 |
| Peak memory | 217208 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1937340828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.1937340828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.1269821357 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 2623326386 ps |
| CPU time | 19.24 seconds |
| Started | Sep 11 08:30:49 AM UTC 24 |
| Finished | Sep 11 08:31:10 AM UTC 24 |
| Peak memory | 229768 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1269821357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_streaming_out.1269821357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.3062579171 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 1081727913 ps |
| CPU time | 8.84 seconds |
| Started | Sep 11 08:30:39 AM UTC 24 |
| Finished | Sep 11 08:30:48 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062579171 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.3062579171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.186173045 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 602258845 ps |
| CPU time | 2.14 seconds |
| Started | Sep 11 08:30:51 AM UTC 24 |
| Finished | Sep 11 08:30:54 AM UTC 24 |
| Peak memory | 216668 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=186173045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_tx _rx_disruption.186173045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.90094317 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 626461178 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:37:18 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=90094317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_tx _rx_disruption.90094317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.1184883735 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 560462732 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:37:20 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1184883735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_ tx_rx_disruption.1184883735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.3314940109 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 638034594 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:37:21 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 214812 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3314940109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_ tx_rx_disruption.3314940109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.1455262836 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 604015218 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:37:21 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1455262836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.1455262836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.1295275714 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 511935159 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:37:21 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1295275714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_ tx_rx_disruption.1295275714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.784958745 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 589074439 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:37:22 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=784958745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_t x_rx_disruption.784958745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.3342011800 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 556453933 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:37:22 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3342011800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.3342011800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.1021788082 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 530777667 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:37:22 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1021788082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_ tx_rx_disruption.1021788082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.3213549960 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 510927167 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:37:22 AM UTC 24 |
| Finished | Sep 11 08:37:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3213549960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.3213549960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.588299613 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 476377515 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:37:26 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=588299613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_t x_rx_disruption.588299613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.2040065721 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 32524908 ps |
| CPU time | 0.95 seconds |
| Started | Sep 11 08:31:05 AM UTC 24 |
| Finished | Sep 11 08:31:07 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040065721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.2040065721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.1896884419 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 7343515039 ps |
| CPU time | 11.77 seconds |
| Started | Sep 11 08:30:51 AM UTC 24 |
| Finished | Sep 11 08:31:04 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896884419 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.1896884419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.3258112040 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 15282965013 ps |
| CPU time | 19.88 seconds |
| Started | Sep 11 08:30:51 AM UTC 24 |
| Finished | Sep 11 08:31:12 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258112040 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.3258112040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.155292416 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 31236882330 ps |
| CPU time | 44.04 seconds |
| Started | Sep 11 08:30:51 AM UTC 24 |
| Finished | Sep 11 08:31:36 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=155292416 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.155292416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.4026588243 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 189188308 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:30:51 AM UTC 24 |
| Finished | Sep 11 08:30:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026588243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.4026588243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.2849601551 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 191380452 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:30:52 AM UTC 24 |
| Finished | Sep 11 08:30:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849601551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_bitstuff_err.2849601551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.3188953199 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 191048953 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:30:52 AM UTC 24 |
| Finished | Sep 11 08:30:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188953199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.3188953199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.1389215358 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 1400238537 ps |
| CPU time | 4.34 seconds |
| Started | Sep 11 08:30:52 AM UTC 24 |
| Finished | Sep 11 08:30:58 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389215358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.1389215358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.1355769434 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 39105237518 ps |
| CPU time | 73.82 seconds |
| Started | Sep 11 08:30:52 AM UTC 24 |
| Finished | Sep 11 08:32:08 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355769434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.1355769434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.747495671 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 2204702001 ps |
| CPU time | 13.37 seconds |
| Started | Sep 11 08:30:52 AM UTC 24 |
| Finished | Sep 11 08:31:07 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=747495671 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.747495671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.4193500775 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 888763076 ps |
| CPU time | 3.74 seconds |
| Started | Sep 11 08:30:53 AM UTC 24 |
| Finished | Sep 11 08:30:58 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4193500775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.4193500775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.495871419 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 159717248 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:30:53 AM UTC 24 |
| Finished | Sep 11 08:30:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=495871419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_disconnected.495871419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_enable.319685503 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 94068374 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:30:53 AM UTC 24 |
| Finished | Sep 11 08:30:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=319685503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_enable.319685503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.1738295830 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 788569258 ps |
| CPU time | 3.61 seconds |
| Started | Sep 11 08:30:54 AM UTC 24 |
| Finished | Sep 11 08:30:59 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738295830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.1738295830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.3117889306 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 151059574 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:30:54 AM UTC 24 |
| Finished | Sep 11 08:30:57 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3117889306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.3117889306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.1352133584 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 312405142 ps |
| CPU time | 2.52 seconds |
| Started | Sep 11 08:30:55 AM UTC 24 |
| Finished | Sep 11 08:30:58 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1352133584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.1352133584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.34598466 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 250185614 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:30:55 AM UTC 24 |
| Finished | Sep 11 08:30:58 AM UTC 24 |
| Peak memory | 227352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=34598466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.34598466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.210541024 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 179951041 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:30:55 AM UTC 24 |
| Finished | Sep 11 08:30:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=210541024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_in_stall.210541024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.3736902369 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 176196064 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:30:55 AM UTC 24 |
| Finished | Sep 11 08:30:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736902369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.3736902369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.1140365086 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 2565130323 ps |
| CPU time | 63.35 seconds |
| Started | Sep 11 08:30:55 AM UTC 24 |
| Finished | Sep 11 08:32:00 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140365086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.1140365086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.2041031368 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 9374147403 ps |
| CPU time | 111.42 seconds |
| Started | Sep 11 08:30:56 AM UTC 24 |
| Finished | Sep 11 08:32:50 AM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041031368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.2041031368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.353573147 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 183140245 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:30:56 AM UTC 24 |
| Finished | Sep 11 08:30:59 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=353573147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_link_in_err.353573147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.4293007153 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 26485053906 ps |
| CPU time | 44.45 seconds |
| Started | Sep 11 08:30:56 AM UTC 24 |
| Finished | Sep 11 08:31:42 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4293007153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_resume.4293007153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.219055324 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 10830288184 ps |
| CPU time | 18.15 seconds |
| Started | Sep 11 08:30:56 AM UTC 24 |
| Finished | Sep 11 08:31:16 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=219055324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_suspend.219055324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.1310396412 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 4732798917 ps |
| CPU time | 36.47 seconds |
| Started | Sep 11 08:30:56 AM UTC 24 |
| Finished | Sep 11 08:31:34 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310396412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.1310396412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.4103263587 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 1961521983 ps |
| CPU time | 19.02 seconds |
| Started | Sep 11 08:30:56 AM UTC 24 |
| Finished | Sep 11 08:31:17 AM UTC 24 |
| Peak memory | 229508 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103263587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.4103263587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.1917607388 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 230842855 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:30:58 AM UTC 24 |
| Finished | Sep 11 08:31:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917607388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.1917607388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.925707209 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 189666789 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:30:58 AM UTC 24 |
| Finished | Sep 11 08:31:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=925707209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.925707209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.1647094874 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 1669751931 ps |
| CPU time | 15.54 seconds |
| Started | Sep 11 08:30:58 AM UTC 24 |
| Finished | Sep 11 08:31:15 AM UTC 24 |
| Peak memory | 233956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647094874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.1647094874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.3481258595 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 157533407 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:30:58 AM UTC 24 |
| Finished | Sep 11 08:31:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481258595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.3481258595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.2315176432 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 147109944 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:30:58 AM UTC 24 |
| Finished | Sep 11 08:31:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315176432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.2315176432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.99206759 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 173178661 ps |
| CPU time | 1.02 seconds |
| Started | Sep 11 08:30:59 AM UTC 24 |
| Finished | Sep 11 08:31:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=99206759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_nak_trans.99206759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.1646734344 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 241128384 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:31:00 AM UTC 24 |
| Finished | Sep 11 08:31:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646734344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.1646734344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.2290696077 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 191395260 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:31:00 AM UTC 24 |
| Finished | Sep 11 08:31:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290696077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_out_stall.2290696077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.1814681432 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 222579111 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:31:00 AM UTC 24 |
| Finished | Sep 11 08:31:02 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814681432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_out_trans_nak.1814681432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.2113849216 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 216654110 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:31:00 AM UTC 24 |
| Finished | Sep 11 08:31:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113849216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.2113849216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.2576998412 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 199228753 ps |
| CPU time | 0.91 seconds |
| Started | Sep 11 08:31:00 AM UTC 24 |
| Finished | Sep 11 08:31:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576998412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.2576998412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.3707135731 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 152013554 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:31:02 AM UTC 24 |
| Finished | Sep 11 08:31:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707135731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.3707135731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.1427774441 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 43472723 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:31:02 AM UTC 24 |
| Finished | Sep 11 08:31:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427774441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.1427774441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.3776891170 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 5882466582 ps |
| CPU time | 17.05 seconds |
| Started | Sep 11 08:31:02 AM UTC 24 |
| Finished | Sep 11 08:31:20 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776891170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.3776891170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.2242385211 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 192951003 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:31:02 AM UTC 24 |
| Finished | Sep 11 08:31:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2242385211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.2242385211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.2309696327 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 222136729 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:31:02 AM UTC 24 |
| Finished | Sep 11 08:31:04 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309696327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.2309696327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.3859570017 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 186605151 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:31:02 AM UTC 24 |
| Finished | Sep 11 08:31:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859570017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_random_length_in_transaction.3859570017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.171754177 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 152744544 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:31:02 AM UTC 24 |
| Finished | Sep 11 08:31:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=171754177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.171754177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.3596133203 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 161119715 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:31:02 AM UTC 24 |
| Finished | Sep 11 08:31:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596133203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_rx_crc_err.3596133203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.590429789 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 303681217 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:31:02 AM UTC 24 |
| Finished | Sep 11 08:31:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=590429789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_rx_full.590429789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.1974815535 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 165673384 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:31:02 AM UTC 24 |
| Finished | Sep 11 08:31:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974815535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.1974815535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.1687071677 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 182562998 ps |
| CPU time | 0.95 seconds |
| Started | Sep 11 08:31:03 AM UTC 24 |
| Finished | Sep 11 08:31:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687071677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.1687071677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.735976340 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 208284352 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:31:03 AM UTC 24 |
| Finished | Sep 11 08:31:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=735976340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.735976340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.3826629339 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 2414544473 ps |
| CPU time | 18.67 seconds |
| Started | Sep 11 08:31:03 AM UTC 24 |
| Finished | Sep 11 08:31:24 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826629339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.3826629339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.3351191901 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 218749986 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:31:04 AM UTC 24 |
| Finished | Sep 11 08:31:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351191901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.3351191901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.1801722109 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 164642913 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:31:04 AM UTC 24 |
| Finished | Sep 11 08:31:06 AM UTC 24 |
| Peak memory | 216004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801722109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.1801722109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.2958838307 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 636446178 ps |
| CPU time | 1.96 seconds |
| Started | Sep 11 08:31:04 AM UTC 24 |
| Finished | Sep 11 08:31:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958838307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.2958838307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.1329665207 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 3763654902 ps |
| CPU time | 101.29 seconds |
| Started | Sep 11 08:31:04 AM UTC 24 |
| Finished | Sep 11 08:32:47 AM UTC 24 |
| Peak memory | 227720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329665207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.1329665207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.1630656346 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 883970228 ps |
| CPU time | 16.54 seconds |
| Started | Sep 11 08:30:53 AM UTC 24 |
| Finished | Sep 11 08:31:10 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1630656346 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.1630656346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.252028243 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 482141022 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:31:04 AM UTC 24 |
| Finished | Sep 11 08:31:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=252028243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_tx _rx_disruption.252028243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.3256552052 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 499251057 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:37:26 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3256552052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.3256552052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.3954367275 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 497910913 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:37:26 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3954367275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_ tx_rx_disruption.3954367275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.3504271707 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 488591622 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:37:26 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3504271707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_ tx_rx_disruption.3504271707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.1193939313 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 514420303 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:37:26 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1193939313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.1193939313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.3596100326 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 476568235 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:37:26 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3596100326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.3596100326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.257077712 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 474535634 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:37:26 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=257077712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_t x_rx_disruption.257077712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.1365886296 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 463938548 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:37:26 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1365886296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_ tx_rx_disruption.1365886296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.1547653885 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 563449001 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:37:26 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1547653885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.1547653885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.2207902021 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 456409731 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:37:27 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2207902021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_ tx_rx_disruption.2207902021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.3655031393 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 479959415 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:37:27 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3655031393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_ tx_rx_disruption.3655031393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.2194342812 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 65580461 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:31:18 AM UTC 24 |
| Finished | Sep 11 08:31:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2194342812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.2194342812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.2964343502 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 4186456596 ps |
| CPU time | 6.89 seconds |
| Started | Sep 11 08:31:05 AM UTC 24 |
| Finished | Sep 11 08:31:13 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964343502 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.2964343502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.2432939986 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 16058144589 ps |
| CPU time | 22.15 seconds |
| Started | Sep 11 08:31:05 AM UTC 24 |
| Finished | Sep 11 08:31:29 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432939986 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.2432939986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.4271119499 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 28771766178 ps |
| CPU time | 45.88 seconds |
| Started | Sep 11 08:31:05 AM UTC 24 |
| Finished | Sep 11 08:31:53 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271119499 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.4271119499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.2380616895 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 197302505 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:31:05 AM UTC 24 |
| Finished | Sep 11 08:31:08 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380616895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_av_buffer.2380616895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.2789339023 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 156810210 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:31:05 AM UTC 24 |
| Finished | Sep 11 08:31:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789339023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_bitstuff_err.2789339023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.2004853233 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 168094936 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:31:06 AM UTC 24 |
| Finished | Sep 11 08:31:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004853233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_data_toggle_clear.2004853233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.3815195388 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 806873136 ps |
| CPU time | 3.56 seconds |
| Started | Sep 11 08:31:06 AM UTC 24 |
| Finished | Sep 11 08:31:10 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815195388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.3815195388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.1783522668 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 19617043171 ps |
| CPU time | 37.68 seconds |
| Started | Sep 11 08:31:06 AM UTC 24 |
| Finished | Sep 11 08:31:45 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783522668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.1783522668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.819439539 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 4766461727 ps |
| CPU time | 40.78 seconds |
| Started | Sep 11 08:31:06 AM UTC 24 |
| Finished | Sep 11 08:31:48 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=819439539 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.819439539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.2864995809 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 498172343 ps |
| CPU time | 2.44 seconds |
| Started | Sep 11 08:31:07 AM UTC 24 |
| Finished | Sep 11 08:31:11 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864995809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.2864995809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.4071501033 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 143915030 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:31:07 AM UTC 24 |
| Finished | Sep 11 08:31:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4071501033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.4071501033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_enable.921972912 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 82586791 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:31:07 AM UTC 24 |
| Finished | Sep 11 08:31:09 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921972912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_enable.921972912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.2766503232 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 951440785 ps |
| CPU time | 3.79 seconds |
| Started | Sep 11 08:31:07 AM UTC 24 |
| Finished | Sep 11 08:31:12 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766503232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.2766503232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.777604341 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 413321502 ps |
| CPU time | 2.27 seconds |
| Started | Sep 11 08:31:07 AM UTC 24 |
| Finished | Sep 11 08:31:11 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=777604341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.777604341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.1698048248 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 223787586 ps |
| CPU time | 2.28 seconds |
| Started | Sep 11 08:31:09 AM UTC 24 |
| Finished | Sep 11 08:31:12 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698048248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_fifo_rst.1698048248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.265755230 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 234742484 ps |
| CPU time | 1.95 seconds |
| Started | Sep 11 08:31:09 AM UTC 24 |
| Finished | Sep 11 08:31:12 AM UTC 24 |
| Peak memory | 226040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=265755230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.265755230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.2723079869 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 137832065 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:31:09 AM UTC 24 |
| Finished | Sep 11 08:31:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723079869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.2723079869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.3673833066 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 261521464 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:31:09 AM UTC 24 |
| Finished | Sep 11 08:31:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673833066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_trans.3673833066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.792351239 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 5458297549 ps |
| CPU time | 46.58 seconds |
| Started | Sep 11 08:31:09 AM UTC 24 |
| Finished | Sep 11 08:31:57 AM UTC 24 |
| Peak memory | 228876 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=792351239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.792351239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.1801250350 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 6581465733 ps |
| CPU time | 44.6 seconds |
| Started | Sep 11 08:31:09 AM UTC 24 |
| Finished | Sep 11 08:31:55 AM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801250350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.1801250350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.1869596984 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 210606297 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:31:11 AM UTC 24 |
| Finished | Sep 11 08:31:13 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869596984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.1869596984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.2615567204 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 34372933656 ps |
| CPU time | 59.5 seconds |
| Started | Sep 11 08:31:11 AM UTC 24 |
| Finished | Sep 11 08:32:12 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2615567204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.2615567204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.90474674 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 5308200776 ps |
| CPU time | 7.29 seconds |
| Started | Sep 11 08:31:11 AM UTC 24 |
| Finished | Sep 11 08:31:19 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=90474674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_link_suspend.90474674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.1816197124 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 3840884303 ps |
| CPU time | 28.01 seconds |
| Started | Sep 11 08:31:11 AM UTC 24 |
| Finished | Sep 11 08:31:40 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1816197124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.1816197124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.2077344239 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 3152489617 ps |
| CPU time | 88.53 seconds |
| Started | Sep 11 08:31:11 AM UTC 24 |
| Finished | Sep 11 08:32:41 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2077344239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.2077344239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.2667160012 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 237201465 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:31:11 AM UTC 24 |
| Finished | Sep 11 08:31:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667160012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.2667160012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.2067171078 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 199538515 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:31:12 AM UTC 24 |
| Finished | Sep 11 08:31:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2067171078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.2067171078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.3911253799 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 2407989936 ps |
| CPU time | 60.68 seconds |
| Started | Sep 11 08:31:12 AM UTC 24 |
| Finished | Sep 11 08:32:15 AM UTC 24 |
| Peak memory | 234260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911253799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.3911253799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.1846370995 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 150244398 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:31:13 AM UTC 24 |
| Finished | Sep 11 08:31:15 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846370995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.1846370995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.3605779830 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 149825233 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:31:13 AM UTC 24 |
| Finished | Sep 11 08:31:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605779830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.3605779830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.3546891668 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 186135620 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:31:13 AM UTC 24 |
| Finished | Sep 11 08:31:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546891668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_nak_trans.3546891668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.159749755 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 179624739 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:31:13 AM UTC 24 |
| Finished | Sep 11 08:31:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159749755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_out_iso.159749755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.3897376256 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 155863374 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:31:13 AM UTC 24 |
| Finished | Sep 11 08:31:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897376256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.3897376256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.1135313198 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 243270417 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:31:13 AM UTC 24 |
| Finished | Sep 11 08:31:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135313198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_out_trans_nak.1135313198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.2594338316 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 173797801 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:31:14 AM UTC 24 |
| Finished | Sep 11 08:31:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594338316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.2594338316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.2926147001 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 245259860 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:31:14 AM UTC 24 |
| Finished | Sep 11 08:31:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926147001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.2926147001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.990889112 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 199912023 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:31:14 AM UTC 24 |
| Finished | Sep 11 08:31:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=990889112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.990889112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.200199026 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 68382241 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:31:14 AM UTC 24 |
| Finished | Sep 11 08:31:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=200199026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_phy_pins_sense.200199026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.3963837984 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 6740966524 ps |
| CPU time | 17.99 seconds |
| Started | Sep 11 08:31:14 AM UTC 24 |
| Finished | Sep 11 08:31:34 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963837984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.3963837984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.1271219149 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 173783874 ps |
| CPU time | 1.2 seconds |
| Started | Sep 11 08:31:14 AM UTC 24 |
| Finished | Sep 11 08:31:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271219149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_pkt_received.1271219149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.2795828064 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 173771519 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:31:16 AM UTC 24 |
| Finished | Sep 11 08:31:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2795828064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.2795828064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.2641766231 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 255024940 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:31:16 AM UTC 24 |
| Finished | Sep 11 08:31:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641766231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.2641766231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.1693971548 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 166592697 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:31:16 AM UTC 24 |
| Finished | Sep 11 08:31:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693971548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.1693971548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.1105447137 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 172042862 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:31:16 AM UTC 24 |
| Finished | Sep 11 08:31:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105447137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.1105447137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.2786460920 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 249837154 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:31:16 AM UTC 24 |
| Finished | Sep 11 08:31:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786460920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.2786460920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.447362755 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 162213032 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:31:16 AM UTC 24 |
| Finished | Sep 11 08:31:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=447362755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_setup_stage.447362755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.2905063685 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 164677911 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:31:17 AM UTC 24 |
| Finished | Sep 11 08:31:19 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905063685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.2905063685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.4244423255 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 240945311 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:31:17 AM UTC 24 |
| Finished | Sep 11 08:31:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244423255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.4244423255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.354040154 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 2496983598 ps |
| CPU time | 22.61 seconds |
| Started | Sep 11 08:31:17 AM UTC 24 |
| Finished | Sep 11 08:31:40 AM UTC 24 |
| Peak memory | 234384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=354040154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.354040154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.2822732430 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 192789202 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:31:17 AM UTC 24 |
| Finished | Sep 11 08:31:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822732430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.2822732430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.4000128365 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 182790532 ps |
| CPU time | 1.2 seconds |
| Started | Sep 11 08:31:18 AM UTC 24 |
| Finished | Sep 11 08:31:20 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000128365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.4000128365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.3632855022 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 1242566631 ps |
| CPU time | 3.32 seconds |
| Started | Sep 11 08:31:18 AM UTC 24 |
| Finished | Sep 11 08:31:22 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632855022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.3632855022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.503955550 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 3602352633 ps |
| CPU time | 27.81 seconds |
| Started | Sep 11 08:31:18 AM UTC 24 |
| Finished | Sep 11 08:31:47 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=503955550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_streaming_out.503955550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.3009157801 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 643001283 ps |
| CPU time | 11.25 seconds |
| Started | Sep 11 08:31:06 AM UTC 24 |
| Finished | Sep 11 08:31:18 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3009157801 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.3009157801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.3345281513 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 499308895 ps |
| CPU time | 2.48 seconds |
| Started | Sep 11 08:31:18 AM UTC 24 |
| Finished | Sep 11 08:31:22 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3345281513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_t x_rx_disruption.3345281513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.3468706912 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 492036661 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:37:27 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3468706912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_ tx_rx_disruption.3468706912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.1198028883 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 484618947 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:37:27 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1198028883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_ tx_rx_disruption.1198028883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.118068410 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 503764707 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:37:27 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=118068410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_t x_rx_disruption.118068410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.821306075 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 682456600 ps |
| CPU time | 1.87 seconds |
| Started | Sep 11 08:37:27 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=821306075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_t x_rx_disruption.821306075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.2021947720 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 545068994 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:37:27 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2021947720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_ tx_rx_disruption.2021947720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.3895179510 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 534983602 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:37:27 AM UTC 24 |
| Finished | Sep 11 08:37:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3895179510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.3895179510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.998464812 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 417326507 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:37:28 AM UTC 24 |
| Finished | Sep 11 08:37:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=998464812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_t x_rx_disruption.998464812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.318121047 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 680236155 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:37:31 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=318121047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_t x_rx_disruption.318121047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.2143580824 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 566419649 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:37:31 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2143580824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.2143580824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.2511124045 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 610312892 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:37:31 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2511124045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_ tx_rx_disruption.2511124045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.921837183 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 68323948 ps |
| CPU time | 0.91 seconds |
| Started | Sep 11 08:31:34 AM UTC 24 |
| Finished | Sep 11 08:31:36 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=921837183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.921837183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.744061709 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 8633773933 ps |
| CPU time | 17.42 seconds |
| Started | Sep 11 08:31:18 AM UTC 24 |
| Finished | Sep 11 08:31:37 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=744061709 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.744061709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.2085731143 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 15788909352 ps |
| CPU time | 25.82 seconds |
| Started | Sep 11 08:31:18 AM UTC 24 |
| Finished | Sep 11 08:31:45 AM UTC 24 |
| Peak memory | 227656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085731143 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.2085731143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.3771789196 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 29073046670 ps |
| CPU time | 38.49 seconds |
| Started | Sep 11 08:31:20 AM UTC 24 |
| Finished | Sep 11 08:32:00 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3771789196 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.3771789196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.84867961 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 150956013 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:31:20 AM UTC 24 |
| Finished | Sep 11 08:31:22 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84867961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_av_buffer.84867961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.1087517668 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 143280778 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:31:20 AM UTC 24 |
| Finished | Sep 11 08:31:23 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1087517668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.1087517668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.1971982908 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 545936938 ps |
| CPU time | 2.11 seconds |
| Started | Sep 11 08:31:20 AM UTC 24 |
| Finished | Sep 11 08:31:23 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1971982908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.1971982908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.2490755027 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 295211179 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:31:20 AM UTC 24 |
| Finished | Sep 11 08:31:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490755027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.2490755027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.1893146224 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 46900939764 ps |
| CPU time | 98.79 seconds |
| Started | Sep 11 08:31:20 AM UTC 24 |
| Finished | Sep 11 08:33:01 AM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893146224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.1893146224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.1631969232 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 1192397064 ps |
| CPU time | 26.73 seconds |
| Started | Sep 11 08:31:20 AM UTC 24 |
| Finished | Sep 11 08:31:48 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631969232 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.1631969232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.1829121152 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 738847911 ps |
| CPU time | 3.02 seconds |
| Started | Sep 11 08:31:21 AM UTC 24 |
| Finished | Sep 11 08:31:25 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1829121152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.1829121152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.912977077 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 137205158 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:31:21 AM UTC 24 |
| Finished | Sep 11 08:31:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=912977077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_disconnected.912977077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_enable.2212556699 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 34739633 ps |
| CPU time | 0.86 seconds |
| Started | Sep 11 08:31:21 AM UTC 24 |
| Finished | Sep 11 08:31:23 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212556699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_enable.2212556699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.2496985926 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 846986654 ps |
| CPU time | 2.82 seconds |
| Started | Sep 11 08:31:21 AM UTC 24 |
| Finished | Sep 11 08:31:25 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496985926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.2496985926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.2634060884 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 660867293 ps |
| CPU time | 2.49 seconds |
| Started | Sep 11 08:31:22 AM UTC 24 |
| Finished | Sep 11 08:31:26 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634060884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.2634060884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.2008786593 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 329420189 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:31:22 AM UTC 24 |
| Finished | Sep 11 08:31:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008786593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_fifo_levels.2008786593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.2409311506 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 442909163 ps |
| CPU time | 2.49 seconds |
| Started | Sep 11 08:31:22 AM UTC 24 |
| Finished | Sep 11 08:31:26 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409311506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.2409311506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.2028347798 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 198992501 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:31:22 AM UTC 24 |
| Finished | Sep 11 08:31:25 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028347798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.2028347798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.1855363382 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 144485776 ps |
| CPU time | 0.98 seconds |
| Started | Sep 11 08:31:25 AM UTC 24 |
| Finished | Sep 11 08:31:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855363382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_stall.1855363382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.3714940877 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 199559194 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:31:25 AM UTC 24 |
| Finished | Sep 11 08:31:27 AM UTC 24 |
| Peak memory | 216464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3714940877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_trans.3714940877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.1968722077 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 3701095298 ps |
| CPU time | 95.76 seconds |
| Started | Sep 11 08:31:22 AM UTC 24 |
| Finished | Sep 11 08:33:00 AM UTC 24 |
| Peak memory | 229764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968722077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.1968722077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.2657811949 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 5655739449 ps |
| CPU time | 36.33 seconds |
| Started | Sep 11 08:31:25 AM UTC 24 |
| Finished | Sep 11 08:32:03 AM UTC 24 |
| Peak memory | 216948 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657811949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.2657811949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.807985662 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 156272037 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:31:25 AM UTC 24 |
| Finished | Sep 11 08:31:27 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807985662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_link_in_err.807985662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.3977090469 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 22867688605 ps |
| CPU time | 39.65 seconds |
| Started | Sep 11 08:31:25 AM UTC 24 |
| Finished | Sep 11 08:32:06 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977090469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.3977090469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.3434976125 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 3543410708 ps |
| CPU time | 5.72 seconds |
| Started | Sep 11 08:31:25 AM UTC 24 |
| Finished | Sep 11 08:31:32 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434976125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.3434976125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.1496452893 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 3480129662 ps |
| CPU time | 25 seconds |
| Started | Sep 11 08:31:25 AM UTC 24 |
| Finished | Sep 11 08:31:51 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496452893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.1496452893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.2544333670 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 2403279103 ps |
| CPU time | 16.1 seconds |
| Started | Sep 11 08:31:25 AM UTC 24 |
| Finished | Sep 11 08:31:42 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2544333670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.2544333670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.881908153 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 241630266 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:31:25 AM UTC 24 |
| Finished | Sep 11 08:31:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=881908153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.881908153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.2482377830 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 205120427 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:31:25 AM UTC 24 |
| Finished | Sep 11 08:31:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2482377830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.2482377830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.3325019646 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 2875845266 ps |
| CPU time | 77.34 seconds |
| Started | Sep 11 08:31:27 AM UTC 24 |
| Finished | Sep 11 08:32:46 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325019646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.3325019646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.1776625136 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 153495691 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:31:27 AM UTC 24 |
| Finished | Sep 11 08:31:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776625136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.1776625136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.1005153334 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 154498807 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:31:27 AM UTC 24 |
| Finished | Sep 11 08:31:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005153334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.1005153334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.725550540 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 195663155 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:31:27 AM UTC 24 |
| Finished | Sep 11 08:31:30 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=725550540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_nak_trans.725550540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.809187950 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 177076276 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:31:27 AM UTC 24 |
| Finished | Sep 11 08:31:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809187950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_out_iso.809187950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.489226783 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 175744982 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:31:27 AM UTC 24 |
| Finished | Sep 11 08:31:29 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=489226783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_out_stall.489226783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.1508733556 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 173937919 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:31:27 AM UTC 24 |
| Finished | Sep 11 08:31:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508733556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.1508733556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.1769504393 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 148978118 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:31:27 AM UTC 24 |
| Finished | Sep 11 08:31:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769504393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_pending_in_trans.1769504393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.1238538815 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 228084861 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:31:28 AM UTC 24 |
| Finished | Sep 11 08:31:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238538815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.1238538815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.3658648532 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 219675413 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:31:28 AM UTC 24 |
| Finished | Sep 11 08:31:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658648532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.3658648532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.3058243860 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 30423704 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:31:28 AM UTC 24 |
| Finished | Sep 11 08:31:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3058243860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.3058243860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.705825476 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 9527573030 ps |
| CPU time | 27.22 seconds |
| Started | Sep 11 08:31:28 AM UTC 24 |
| Finished | Sep 11 08:31:57 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=705825476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_pkt_buffer.705825476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.2108287239 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 230208673 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:31:29 AM UTC 24 |
| Finished | Sep 11 08:31:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108287239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.2108287239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.1274956909 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 193736709 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:31:30 AM UTC 24 |
| Finished | Sep 11 08:31:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274956909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.1274956909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.2876645632 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 221050867 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:31:30 AM UTC 24 |
| Finished | Sep 11 08:31:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876645632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.2876645632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.3985056618 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 211604789 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:31:30 AM UTC 24 |
| Finished | Sep 11 08:31:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985056618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.3985056618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.3665000813 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 134088871 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:31:30 AM UTC 24 |
| Finished | Sep 11 08:31:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665000813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_rx_crc_err.3665000813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.2311393961 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 243216823 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:31:30 AM UTC 24 |
| Finished | Sep 11 08:31:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2311393961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.2311393961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.1532074269 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 198497992 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:31:30 AM UTC 24 |
| Finished | Sep 11 08:31:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532074269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.1532074269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.663707993 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 155058363 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:31:30 AM UTC 24 |
| Finished | Sep 11 08:31:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=663707993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 35.usbdev_setup_trans_ignored.663707993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.2432113022 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 256496332 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:31:32 AM UTC 24 |
| Finished | Sep 11 08:31:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432113022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.2432113022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.523861501 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 1879889745 ps |
| CPU time | 17.58 seconds |
| Started | Sep 11 08:31:32 AM UTC 24 |
| Finished | Sep 11 08:31:51 AM UTC 24 |
| Peak memory | 234044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=523861501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.523861501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.3047939268 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 181233624 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:31:32 AM UTC 24 |
| Finished | Sep 11 08:31:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047939268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.3047939268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.865066234 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 191852889 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:31:32 AM UTC 24 |
| Finished | Sep 11 08:31:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=865066234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_stall_trans.865066234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.3231527298 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 252334618 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:31:32 AM UTC 24 |
| Finished | Sep 11 08:31:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3231527298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.3231527298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.404202654 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 3314665286 ps |
| CPU time | 32.31 seconds |
| Started | Sep 11 08:31:32 AM UTC 24 |
| Finished | Sep 11 08:32:06 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=404202654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_streaming_out.404202654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.2335679267 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 1123093205 ps |
| CPU time | 26.3 seconds |
| Started | Sep 11 08:31:21 AM UTC 24 |
| Finished | Sep 11 08:31:48 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335679267 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.2335679267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.3177037939 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 620960765 ps |
| CPU time | 2.31 seconds |
| Started | Sep 11 08:31:32 AM UTC 24 |
| Finished | Sep 11 08:31:36 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3177037939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_t x_rx_disruption.3177037939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.1503655190 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 436337064 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:37:31 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1503655190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_ tx_rx_disruption.1503655190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.338845907 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 483809164 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=338845907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_t x_rx_disruption.338845907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.3558832839 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 457349034 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3558832839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.3558832839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.1593533483 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 482826964 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1593533483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.1593533483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.2040661296 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 659471044 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2040661296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.2040661296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.2231811481 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 509177477 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2231811481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_ tx_rx_disruption.2231811481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.3723444431 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 569125880 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3723444431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.3723444431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.3501522438 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 530976993 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3501522438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.3501522438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.813706539 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 571311473 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=813706539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_t x_rx_disruption.813706539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.4182403887 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 581564562 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4182403887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_ tx_rx_disruption.4182403887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.244722024 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 51293522 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:31:50 AM UTC 24 |
| Finished | Sep 11 08:31:52 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=244722024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.244722024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.1746962431 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 8734597342 ps |
| CPU time | 17.5 seconds |
| Started | Sep 11 08:31:34 AM UTC 24 |
| Finished | Sep 11 08:31:53 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1746962431 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.1746962431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.376129660 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 13408324210 ps |
| CPU time | 23.29 seconds |
| Started | Sep 11 08:31:34 AM UTC 24 |
| Finished | Sep 11 08:31:59 AM UTC 24 |
| Peak memory | 226992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=376129660 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.376129660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.2917383453 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 24385258591 ps |
| CPU time | 35.76 seconds |
| Started | Sep 11 08:31:34 AM UTC 24 |
| Finished | Sep 11 08:32:11 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917383453 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.2917383453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.3067150042 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 184142137 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:31:34 AM UTC 24 |
| Finished | Sep 11 08:31:37 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067150042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.3067150042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.3529242446 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 143947757 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:31:34 AM UTC 24 |
| Finished | Sep 11 08:31:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3529242446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_bitstuff_err.3529242446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.2502999553 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 206530618 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:31:34 AM UTC 24 |
| Finished | Sep 11 08:31:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502999553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.2502999553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.1425817326 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 1070770104 ps |
| CPU time | 4.22 seconds |
| Started | Sep 11 08:31:34 AM UTC 24 |
| Finished | Sep 11 08:31:40 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1425817326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.1425817326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.1932943616 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 17084563253 ps |
| CPU time | 34.66 seconds |
| Started | Sep 11 08:31:36 AM UTC 24 |
| Finished | Sep 11 08:32:12 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932943616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.1932943616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.3786457389 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 622302110 ps |
| CPU time | 5.46 seconds |
| Started | Sep 11 08:31:36 AM UTC 24 |
| Finished | Sep 11 08:31:42 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3786457389 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.3786457389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.307848994 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 891772631 ps |
| CPU time | 4.13 seconds |
| Started | Sep 11 08:31:36 AM UTC 24 |
| Finished | Sep 11 08:31:41 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=307848994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_disable_endpoint.307848994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.64096430 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 154542705 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:31:36 AM UTC 24 |
| Finished | Sep 11 08:31:38 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=64096430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_disconnected.64096430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_enable.2968199321 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 63802527 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:31:36 AM UTC 24 |
| Finished | Sep 11 08:31:38 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968199321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.2968199321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.3618980722 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 910835910 ps |
| CPU time | 3.44 seconds |
| Started | Sep 11 08:31:38 AM UTC 24 |
| Finished | Sep 11 08:31:42 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618980722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.3618980722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.3403846065 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 283881399 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:31:38 AM UTC 24 |
| Finished | Sep 11 08:31:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403846065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.3403846065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.2297381014 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 300940748 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:31:38 AM UTC 24 |
| Finished | Sep 11 08:31:40 AM UTC 24 |
| Peak memory | 214928 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297381014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_fifo_levels.2297381014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.2784826229 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 378360872 ps |
| CPU time | 3.75 seconds |
| Started | Sep 11 08:31:38 AM UTC 24 |
| Finished | Sep 11 08:31:42 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2784826229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.2784826229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.3870084106 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 184093706 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:31:38 AM UTC 24 |
| Finished | Sep 11 08:31:40 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3870084106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.3870084106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.2099888884 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 189230350 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:31:38 AM UTC 24 |
| Finished | Sep 11 08:31:40 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099888884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.2099888884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.3979517469 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 260477759 ps |
| CPU time | 1.87 seconds |
| Started | Sep 11 08:31:39 AM UTC 24 |
| Finished | Sep 11 08:31:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979517469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.3979517469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.1311125335 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 3678350382 ps |
| CPU time | 35.24 seconds |
| Started | Sep 11 08:31:38 AM UTC 24 |
| Finished | Sep 11 08:32:14 AM UTC 24 |
| Peak memory | 234396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1311125335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.1311125335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.3024864621 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 5549733147 ps |
| CPU time | 44.86 seconds |
| Started | Sep 11 08:31:39 AM UTC 24 |
| Finished | Sep 11 08:32:25 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024864621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.3024864621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.1700995365 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 236250055 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:31:39 AM UTC 24 |
| Finished | Sep 11 08:31:42 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700995365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.1700995365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.2556906614 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 25904157453 ps |
| CPU time | 46.07 seconds |
| Started | Sep 11 08:31:40 AM UTC 24 |
| Finished | Sep 11 08:32:28 AM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556906614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_resume.2556906614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.40818342 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 8757760190 ps |
| CPU time | 12.1 seconds |
| Started | Sep 11 08:31:40 AM UTC 24 |
| Finished | Sep 11 08:31:54 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40818342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_link_suspend.40818342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.1195996686 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 3838383034 ps |
| CPU time | 104.67 seconds |
| Started | Sep 11 08:31:42 AM UTC 24 |
| Finished | Sep 11 08:33:29 AM UTC 24 |
| Peak memory | 234256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195996686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.1195996686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.901742153 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 2951655458 ps |
| CPU time | 23.04 seconds |
| Started | Sep 11 08:31:42 AM UTC 24 |
| Finished | Sep 11 08:32:06 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=901742153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.901742153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.2677179831 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 242168902 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:31:42 AM UTC 24 |
| Finished | Sep 11 08:31:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677179831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.2677179831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.1709614368 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 208620852 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:31:42 AM UTC 24 |
| Finished | Sep 11 08:31:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709614368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.1709614368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.1599563240 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 2938619680 ps |
| CPU time | 21.55 seconds |
| Started | Sep 11 08:31:42 AM UTC 24 |
| Finished | Sep 11 08:32:05 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599563240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.1599563240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.4047029125 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 146116785 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:31:42 AM UTC 24 |
| Finished | Sep 11 08:31:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4047029125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.4047029125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.4231826297 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 208532391 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:31:42 AM UTC 24 |
| Finished | Sep 11 08:31:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231826297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.4231826297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.3036406469 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 209933510 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:31:44 AM UTC 24 |
| Finished | Sep 11 08:31:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036406469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.3036406469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.2545652642 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 200589812 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:31:44 AM UTC 24 |
| Finished | Sep 11 08:31:46 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2545652642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.2545652642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.759224273 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 183693667 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:31:44 AM UTC 24 |
| Finished | Sep 11 08:31:47 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759224273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_out_stall.759224273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.38276566 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 158203454 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:31:44 AM UTC 24 |
| Finished | Sep 11 08:31:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=38276566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_out_trans_nak.38276566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.1798726083 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 198013653 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:31:44 AM UTC 24 |
| Finished | Sep 11 08:31:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798726083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_pending_in_trans.1798726083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.711806154 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 216009555 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:31:44 AM UTC 24 |
| Finished | Sep 11 08:31:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=711806154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.711806154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.4232425091 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 202110349 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:31:44 AM UTC 24 |
| Finished | Sep 11 08:31:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232425091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.4232425091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.3390329399 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 51941257 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:31:44 AM UTC 24 |
| Finished | Sep 11 08:31:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390329399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.3390329399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.4149426286 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 21879771154 ps |
| CPU time | 62.31 seconds |
| Started | Sep 11 08:31:46 AM UTC 24 |
| Finished | Sep 11 08:32:50 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4149426286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.4149426286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.2851439622 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 155501111 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:31:46 AM UTC 24 |
| Finished | Sep 11 08:31:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2851439622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.2851439622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.2436870618 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 218899167 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:31:46 AM UTC 24 |
| Finished | Sep 11 08:31:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2436870618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.2436870618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.3153879097 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 211097747 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:31:46 AM UTC 24 |
| Finished | Sep 11 08:31:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153879097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.3153879097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.10431052 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 179066518 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:31:46 AM UTC 24 |
| Finished | Sep 11 08:31:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=10431052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.10431052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.992925021 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 190808976 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:31:48 AM UTC 24 |
| Finished | Sep 11 08:31:50 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=992925021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_rx_crc_err.992925021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.415185882 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 267745793 ps |
| CPU time | 1.81 seconds |
| Started | Sep 11 08:31:48 AM UTC 24 |
| Finished | Sep 11 08:31:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415185882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_rx_full.415185882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.3969128158 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 150291148 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:31:48 AM UTC 24 |
| Finished | Sep 11 08:31:50 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3969128158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.3969128158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.465164896 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 186086797 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:31:48 AM UTC 24 |
| Finished | Sep 11 08:31:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=465164896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 36.usbdev_setup_trans_ignored.465164896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.3213022294 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 226713507 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:31:48 AM UTC 24 |
| Finished | Sep 11 08:31:50 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213022294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.3213022294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.887988985 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 3018635046 ps |
| CPU time | 24.59 seconds |
| Started | Sep 11 08:31:48 AM UTC 24 |
| Finished | Sep 11 08:32:14 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=887988985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.887988985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.3631274728 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 153497795 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:31:48 AM UTC 24 |
| Finished | Sep 11 08:31:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3631274728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.3631274728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.2300940719 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 178624219 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:31:48 AM UTC 24 |
| Finished | Sep 11 08:31:50 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300940719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.2300940719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.3706596731 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 682588174 ps |
| CPU time | 2.02 seconds |
| Started | Sep 11 08:31:49 AM UTC 24 |
| Finished | Sep 11 08:31:52 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706596731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.3706596731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.692076664 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 2047414589 ps |
| CPU time | 53.79 seconds |
| Started | Sep 11 08:31:48 AM UTC 24 |
| Finished | Sep 11 08:32:43 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=692076664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_streaming_out.692076664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.1541869362 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 1033801873 ps |
| CPU time | 20.61 seconds |
| Started | Sep 11 08:31:36 AM UTC 24 |
| Finished | Sep 11 08:31:58 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541869362 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.1541869362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.191716393 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 546792448 ps |
| CPU time | 2.02 seconds |
| Started | Sep 11 08:31:49 AM UTC 24 |
| Finished | Sep 11 08:31:52 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=191716393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_tx _rx_disruption.191716393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.3911693777 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 451353797 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3911693777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_ tx_rx_disruption.3911693777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.4024347173 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 561466811 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4024347173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.4024347173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.1907813611 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 514628148 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:37:32 AM UTC 24 |
| Finished | Sep 11 08:37:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1907813611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.1907813611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.3775647916 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 591388688 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:37:33 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3775647916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_ tx_rx_disruption.3775647916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.3146787895 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 466978645 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:37:33 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3146787895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_ tx_rx_disruption.3146787895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.3063905571 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 555989104 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:37:33 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3063905571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_ tx_rx_disruption.3063905571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.3613481145 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 583366887 ps |
| CPU time | 1.92 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3613481145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_ tx_rx_disruption.3613481145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.2657194042 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 597170171 ps |
| CPU time | 1.85 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2657194042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.2657194042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.2244373446 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 482479755 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2244373446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.2244373446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.2255453144 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 693738295 ps |
| CPU time | 1.88 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2255453144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.2255453144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.3285036086 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 55098204 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:32:03 AM UTC 24 |
| Finished | Sep 11 08:32:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3285036086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.3285036086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.2029559504 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 3917700174 ps |
| CPU time | 7.03 seconds |
| Started | Sep 11 08:31:50 AM UTC 24 |
| Finished | Sep 11 08:31:58 AM UTC 24 |
| Peak memory | 227268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2029559504 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.2029559504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.1621870764 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 20472125854 ps |
| CPU time | 25.4 seconds |
| Started | Sep 11 08:31:50 AM UTC 24 |
| Finished | Sep 11 08:32:16 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621870764 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.1621870764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.667253412 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 25293059373 ps |
| CPU time | 37.25 seconds |
| Started | Sep 11 08:31:50 AM UTC 24 |
| Finished | Sep 11 08:32:28 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=667253412 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.667253412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.2750717287 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 149150558 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:31:50 AM UTC 24 |
| Finished | Sep 11 08:31:52 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750717287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.2750717287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.1190628930 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 150952968 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:31:51 AM UTC 24 |
| Finished | Sep 11 08:31:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190628930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.1190628930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.760676444 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 396837497 ps |
| CPU time | 2.07 seconds |
| Started | Sep 11 08:31:51 AM UTC 24 |
| Finished | Sep 11 08:31:54 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=760676444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_data_toggle_clear.760676444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.2811342906 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 692611692 ps |
| CPU time | 3.1 seconds |
| Started | Sep 11 08:31:51 AM UTC 24 |
| Finished | Sep 11 08:31:55 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811342906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.2811342906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.604656609 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 22805450799 ps |
| CPU time | 39.83 seconds |
| Started | Sep 11 08:31:51 AM UTC 24 |
| Finished | Sep 11 08:32:32 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=604656609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_device_address.604656609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.2684015052 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 1259593589 ps |
| CPU time | 28.62 seconds |
| Started | Sep 11 08:31:51 AM UTC 24 |
| Finished | Sep 11 08:32:21 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684015052 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.2684015052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.1487923546 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 713775758 ps |
| CPU time | 2.62 seconds |
| Started | Sep 11 08:31:51 AM UTC 24 |
| Finished | Sep 11 08:31:55 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487923546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_disable_endpoint.1487923546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.3383800852 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 160451455 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:31:53 AM UTC 24 |
| Finished | Sep 11 08:31:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383800852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.3383800852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_enable.3726744123 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 29613004 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:31:53 AM UTC 24 |
| Finished | Sep 11 08:31:55 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3726744123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_enable.3726744123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.141377428 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 764295105 ps |
| CPU time | 2.67 seconds |
| Started | Sep 11 08:31:53 AM UTC 24 |
| Finished | Sep 11 08:31:56 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=141377428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.141377428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.2618621675 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 320307506 ps |
| CPU time | 1.85 seconds |
| Started | Sep 11 08:31:53 AM UTC 24 |
| Finished | Sep 11 08:31:56 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2618621675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.2618621675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.650482089 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 277418117 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:31:53 AM UTC 24 |
| Finished | Sep 11 08:31:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=650482089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_fifo_levels.650482089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.606900473 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 367386890 ps |
| CPU time | 3.93 seconds |
| Started | Sep 11 08:31:53 AM UTC 24 |
| Finished | Sep 11 08:31:58 AM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=606900473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_fifo_rst.606900473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.1469242128 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 179431300 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:31:54 AM UTC 24 |
| Finished | Sep 11 08:31:57 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1469242128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.1469242128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.1487273674 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 145558492 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:31:54 AM UTC 24 |
| Finished | Sep 11 08:31:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487273674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.1487273674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.2396666933 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 253904741 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:31:54 AM UTC 24 |
| Finished | Sep 11 08:31:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396666933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.2396666933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.2040603906 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 2632980830 ps |
| CPU time | 23.26 seconds |
| Started | Sep 11 08:31:54 AM UTC 24 |
| Finished | Sep 11 08:32:19 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040603906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.2040603906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.3564053563 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 5106522286 ps |
| CPU time | 33.34 seconds |
| Started | Sep 11 08:31:54 AM UTC 24 |
| Finished | Sep 11 08:32:29 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564053563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.3564053563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.3037300022 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 180896106 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:31:55 AM UTC 24 |
| Finished | Sep 11 08:31:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037300022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.3037300022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.4020528077 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 24831601521 ps |
| CPU time | 52.9 seconds |
| Started | Sep 11 08:31:56 AM UTC 24 |
| Finished | Sep 11 08:32:50 AM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020528077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.4020528077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.986558105 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 10315660477 ps |
| CPU time | 15.75 seconds |
| Started | Sep 11 08:31:56 AM UTC 24 |
| Finished | Sep 11 08:32:13 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=986558105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_suspend.986558105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.1103278460 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 4113982747 ps |
| CPU time | 111.54 seconds |
| Started | Sep 11 08:31:56 AM UTC 24 |
| Finished | Sep 11 08:33:50 AM UTC 24 |
| Peak memory | 229892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103278460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.1103278460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.879045780 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 2901584965 ps |
| CPU time | 72.46 seconds |
| Started | Sep 11 08:31:56 AM UTC 24 |
| Finished | Sep 11 08:33:10 AM UTC 24 |
| Peak memory | 234164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=879045780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.879045780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.1668844485 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 241040743 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:31:56 AM UTC 24 |
| Finished | Sep 11 08:31:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668844485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.1668844485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.2064370664 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 194365886 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:31:56 AM UTC 24 |
| Finished | Sep 11 08:31:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064370664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.2064370664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.1004370952 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 3090674013 ps |
| CPU time | 85.65 seconds |
| Started | Sep 11 08:31:56 AM UTC 24 |
| Finished | Sep 11 08:33:24 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004370952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.1004370952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.2995492518 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 149266751 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:31:56 AM UTC 24 |
| Finished | Sep 11 08:31:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995492518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.2995492518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.587164772 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 146860540 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:31:58 AM UTC 24 |
| Finished | Sep 11 08:32:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=587164772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.587164772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.1093843476 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 206557050 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:31:58 AM UTC 24 |
| Finished | Sep 11 08:32:00 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1093843476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.1093843476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.2132260560 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 182916734 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:31:58 AM UTC 24 |
| Finished | Sep 11 08:32:00 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132260560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.2132260560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.1394488788 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 201778842 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:31:58 AM UTC 24 |
| Finished | Sep 11 08:32:00 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1394488788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_out_stall.1394488788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.3149337813 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 170724475 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:31:58 AM UTC 24 |
| Finished | Sep 11 08:32:01 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149337813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_out_trans_nak.3149337813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.3509045084 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 180428481 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:31:58 AM UTC 24 |
| Finished | Sep 11 08:32:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509045084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_pending_in_trans.3509045084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.3823871555 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 259719737 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:31:58 AM UTC 24 |
| Finished | Sep 11 08:32:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823871555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.3823871555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.2935713992 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 150975239 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:31:58 AM UTC 24 |
| Finished | Sep 11 08:32:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935713992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.2935713992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.528954406 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 33358916 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:32:00 AM UTC 24 |
| Finished | Sep 11 08:32:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528954406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_phy_pins_sense.528954406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.3329648390 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 15489636105 ps |
| CPU time | 40.73 seconds |
| Started | Sep 11 08:32:00 AM UTC 24 |
| Finished | Sep 11 08:32:42 AM UTC 24 |
| Peak memory | 231616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329648390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_pkt_buffer.3329648390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.4063090307 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 176139146 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:32:00 AM UTC 24 |
| Finished | Sep 11 08:32:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063090307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_pkt_received.4063090307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.3239798535 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 223070727 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:32:00 AM UTC 24 |
| Finished | Sep 11 08:32:03 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239798535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.3239798535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.35455542 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 235006016 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:32:00 AM UTC 24 |
| Finished | Sep 11 08:32:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=35455542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_random_length_in_transaction.35455542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.16155418 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 209286324 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:32:00 AM UTC 24 |
| Finished | Sep 11 08:32:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=16155418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.16155418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.3817984129 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 202417618 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:32:00 AM UTC 24 |
| Finished | Sep 11 08:32:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3817984129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.3817984129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.1910714538 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 358291744 ps |
| CPU time | 1.92 seconds |
| Started | Sep 11 08:32:02 AM UTC 24 |
| Finished | Sep 11 08:32:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910714538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.1910714538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.3643067593 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 173228391 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:32:02 AM UTC 24 |
| Finished | Sep 11 08:32:04 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643067593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.3643067593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.1781225087 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 245528110 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:32:02 AM UTC 24 |
| Finished | Sep 11 08:32:04 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1781225087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 37.usbdev_setup_trans_ignored.1781225087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.2326319577 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 230837586 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:32:02 AM UTC 24 |
| Finished | Sep 11 08:32:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326319577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.2326319577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.3233661014 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 2621046837 ps |
| CPU time | 19.51 seconds |
| Started | Sep 11 08:32:02 AM UTC 24 |
| Finished | Sep 11 08:32:23 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3233661014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.3233661014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.1342069997 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 225277114 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:32:02 AM UTC 24 |
| Finished | Sep 11 08:32:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342069997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.1342069997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.4211138458 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 189744433 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:32:02 AM UTC 24 |
| Finished | Sep 11 08:32:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211138458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.4211138458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.3741103688 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 1215768649 ps |
| CPU time | 3.32 seconds |
| Started | Sep 11 08:32:02 AM UTC 24 |
| Finished | Sep 11 08:32:06 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741103688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.3741103688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.3386502833 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 3013358839 ps |
| CPU time | 82.4 seconds |
| Started | Sep 11 08:32:02 AM UTC 24 |
| Finished | Sep 11 08:33:26 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3386502833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_streaming_out.3386502833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.3276947681 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 991659315 ps |
| CPU time | 19.48 seconds |
| Started | Sep 11 08:31:51 AM UTC 24 |
| Finished | Sep 11 08:32:12 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276947681 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.3276947681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.183133961 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 477654329 ps |
| CPU time | 2.71 seconds |
| Started | Sep 11 08:32:02 AM UTC 24 |
| Finished | Sep 11 08:32:06 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=183133961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_tx _rx_disruption.183133961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.2255406193 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 597637973 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2255406193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.2255406193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.554011129 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 654321518 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=554011129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_t x_rx_disruption.554011129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.1866459209 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 704744468 ps |
| CPU time | 1.93 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1866459209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.1866459209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.1446506494 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 441470685 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1446506494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_ tx_rx_disruption.1446506494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.2660598101 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 445543458 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2660598101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.2660598101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.929305210 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 495229824 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=929305210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_t x_rx_disruption.929305210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.1242244697 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 475902543 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:37:34 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1242244697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_ tx_rx_disruption.1242244697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.3314372923 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 501960772 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:37:36 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3314372923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.3314372923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.2178803915 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 466979548 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2178803915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_ tx_rx_disruption.2178803915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.729236539 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 504683478 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=729236539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_t x_rx_disruption.729236539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.1284346165 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 85522475 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:32:18 AM UTC 24 |
| Finished | Sep 11 08:32:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1284346165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.1284346165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.1283082871 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 10415483087 ps |
| CPU time | 16.65 seconds |
| Started | Sep 11 08:32:03 AM UTC 24 |
| Finished | Sep 11 08:32:21 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283082871 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.1283082871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.4117061068 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 18596683166 ps |
| CPU time | 32.65 seconds |
| Started | Sep 11 08:32:03 AM UTC 24 |
| Finished | Sep 11 08:32:38 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117061068 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.4117061068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.1715049007 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 24841249826 ps |
| CPU time | 46.51 seconds |
| Started | Sep 11 08:32:03 AM UTC 24 |
| Finished | Sep 11 08:32:52 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715049007 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.1715049007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.4043702784 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 176218113 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:32:04 AM UTC 24 |
| Finished | Sep 11 08:32:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043702784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_av_buffer.4043702784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.3533829694 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 151708956 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:32:04 AM UTC 24 |
| Finished | Sep 11 08:32:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533829694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_bitstuff_err.3533829694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.2205908078 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 496326470 ps |
| CPU time | 2.96 seconds |
| Started | Sep 11 08:32:05 AM UTC 24 |
| Finished | Sep 11 08:32:09 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205908078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.2205908078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.3037754952 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 870344180 ps |
| CPU time | 3.67 seconds |
| Started | Sep 11 08:32:05 AM UTC 24 |
| Finished | Sep 11 08:32:10 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037754952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.3037754952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.2437775210 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 23519761434 ps |
| CPU time | 44.25 seconds |
| Started | Sep 11 08:32:05 AM UTC 24 |
| Finished | Sep 11 08:32:51 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437775210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.2437775210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.3920140095 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 1146848993 ps |
| CPU time | 10.6 seconds |
| Started | Sep 11 08:32:05 AM UTC 24 |
| Finished | Sep 11 08:32:17 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920140095 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.3920140095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.2532804682 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 826354891 ps |
| CPU time | 3.8 seconds |
| Started | Sep 11 08:32:06 AM UTC 24 |
| Finished | Sep 11 08:32:11 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2532804682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.2532804682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.2943289762 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 196961542 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:32:06 AM UTC 24 |
| Finished | Sep 11 08:32:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943289762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.2943289762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_enable.991539964 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 34619477 ps |
| CPU time | 0.7 seconds |
| Started | Sep 11 08:32:06 AM UTC 24 |
| Finished | Sep 11 08:32:08 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=991539964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_enable.991539964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.4076929978 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 868990551 ps |
| CPU time | 2.76 seconds |
| Started | Sep 11 08:32:07 AM UTC 24 |
| Finished | Sep 11 08:32:10 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4076929978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.4076929978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.3245684519 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 546855643 ps |
| CPU time | 1.86 seconds |
| Started | Sep 11 08:32:07 AM UTC 24 |
| Finished | Sep 11 08:32:09 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245684519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.3245684519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.4233633779 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 151376783 ps |
| CPU time | 2.23 seconds |
| Started | Sep 11 08:32:08 AM UTC 24 |
| Finished | Sep 11 08:32:12 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233633779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_fifo_rst.4233633779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.20162148 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 285428751 ps |
| CPU time | 2.07 seconds |
| Started | Sep 11 08:32:08 AM UTC 24 |
| Finished | Sep 11 08:32:12 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=20162148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.20162148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.1201221089 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 139749027 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:32:08 AM UTC 24 |
| Finished | Sep 11 08:32:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201221089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.1201221089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.1375426693 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 242445751 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:32:08 AM UTC 24 |
| Finished | Sep 11 08:32:12 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375426693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.1375426693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.2810144928 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 4704541955 ps |
| CPU time | 36.03 seconds |
| Started | Sep 11 08:32:08 AM UTC 24 |
| Finished | Sep 11 08:32:46 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2810144928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.2810144928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.1483966802 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 7686797293 ps |
| CPU time | 94.34 seconds |
| Started | Sep 11 08:32:10 AM UTC 24 |
| Finished | Sep 11 08:33:47 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1483966802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.1483966802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.860287417 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 178286619 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:32:10 AM UTC 24 |
| Finished | Sep 11 08:32:13 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=860287417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_link_in_err.860287417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.745601481 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 9473549042 ps |
| CPU time | 18.05 seconds |
| Started | Sep 11 08:32:11 AM UTC 24 |
| Finished | Sep 11 08:32:30 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=745601481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_link_resume.745601481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.1801288492 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 10699429958 ps |
| CPU time | 20.82 seconds |
| Started | Sep 11 08:32:11 AM UTC 24 |
| Finished | Sep 11 08:32:33 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801288492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.1801288492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.892194261 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 3287556202 ps |
| CPU time | 36.51 seconds |
| Started | Sep 11 08:32:11 AM UTC 24 |
| Finished | Sep 11 08:32:49 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=892194261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.892194261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.2466219154 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 3189720794 ps |
| CPU time | 33.48 seconds |
| Started | Sep 11 08:32:11 AM UTC 24 |
| Finished | Sep 11 08:32:46 AM UTC 24 |
| Peak memory | 234164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2466219154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.2466219154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.1740188027 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 243107742 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:32:11 AM UTC 24 |
| Finished | Sep 11 08:32:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1740188027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.1740188027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.379487700 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 213031172 ps |
| CPU time | 1.2 seconds |
| Started | Sep 11 08:32:12 AM UTC 24 |
| Finished | Sep 11 08:32:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=379487700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.379487700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.4147323180 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 1769487760 ps |
| CPU time | 12.53 seconds |
| Started | Sep 11 08:32:12 AM UTC 24 |
| Finished | Sep 11 08:32:26 AM UTC 24 |
| Peak memory | 234056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147323180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.4147323180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.1836118420 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 152004192 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:32:12 AM UTC 24 |
| Finished | Sep 11 08:32:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836118420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.1836118420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.1485270374 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 157022144 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:32:12 AM UTC 24 |
| Finished | Sep 11 08:32:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485270374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.1485270374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.1433007962 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 194446969 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:32:12 AM UTC 24 |
| Finished | Sep 11 08:32:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433007962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_nak_trans.1433007962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.2825802754 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 243280183 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:32:12 AM UTC 24 |
| Finished | Sep 11 08:32:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2825802754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.2825802754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.3834042203 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 174852144 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:32:14 AM UTC 24 |
| Finished | Sep 11 08:32:17 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834042203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.3834042203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.4194713782 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 153422092 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:32:14 AM UTC 24 |
| Finished | Sep 11 08:32:17 AM UTC 24 |
| Peak memory | 214800 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194713782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_out_trans_nak.4194713782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.2571239296 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 153376965 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:32:14 AM UTC 24 |
| Finished | Sep 11 08:32:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2571239296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.2571239296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.1658046858 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 249861103 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:32:14 AM UTC 24 |
| Finished | Sep 11 08:32:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1658046858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.1658046858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.1101678275 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 171751103 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:32:14 AM UTC 24 |
| Finished | Sep 11 08:32:17 AM UTC 24 |
| Peak memory | 215320 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101678275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.1101678275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.244253196 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 36185366 ps |
| CPU time | 0.8 seconds |
| Started | Sep 11 08:32:14 AM UTC 24 |
| Finished | Sep 11 08:32:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=244253196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_phy_pins_sense.244253196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.3139796866 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 19727677309 ps |
| CPU time | 55.35 seconds |
| Started | Sep 11 08:32:14 AM UTC 24 |
| Finished | Sep 11 08:33:12 AM UTC 24 |
| Peak memory | 234192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3139796866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.3139796866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.4122358566 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 197973671 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:32:14 AM UTC 24 |
| Finished | Sep 11 08:32:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122358566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.4122358566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.2910308861 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 208213792 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:32:14 AM UTC 24 |
| Finished | Sep 11 08:32:17 AM UTC 24 |
| Peak memory | 215464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2910308861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_pkt_sent.2910308861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.739472118 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 222269993 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:32:16 AM UTC 24 |
| Finished | Sep 11 08:32:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=739472118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_random_length_in_transaction.739472118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.3068328176 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 174619072 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:32:16 AM UTC 24 |
| Finished | Sep 11 08:32:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068328176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.3068328176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.947875257 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 145106081 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:32:16 AM UTC 24 |
| Finished | Sep 11 08:32:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=947875257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_rx_crc_err.947875257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.1637019133 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 281389825 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:32:16 AM UTC 24 |
| Finished | Sep 11 08:32:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637019133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.1637019133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.638053922 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 198591294 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:32:16 AM UTC 24 |
| Finished | Sep 11 08:32:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=638053922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_setup_stage.638053922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.2834367056 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 164197560 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:32:16 AM UTC 24 |
| Finished | Sep 11 08:32:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2834367056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.2834367056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.888449401 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 234811338 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:32:16 AM UTC 24 |
| Finished | Sep 11 08:32:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=888449401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.888449401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.2289213283 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 2560125459 ps |
| CPU time | 71.99 seconds |
| Started | Sep 11 08:32:16 AM UTC 24 |
| Finished | Sep 11 08:33:30 AM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289213283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.2289213283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.1979064093 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 185496688 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:32:17 AM UTC 24 |
| Finished | Sep 11 08:32:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979064093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.1979064093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.2372598768 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 179672221 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:32:18 AM UTC 24 |
| Finished | Sep 11 08:32:20 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372598768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.2372598768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.446832554 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 894377107 ps |
| CPU time | 2.64 seconds |
| Started | Sep 11 08:32:18 AM UTC 24 |
| Finished | Sep 11 08:32:21 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=446832554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_stream_len_max.446832554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.2203172328 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 3526059211 ps |
| CPU time | 33.59 seconds |
| Started | Sep 11 08:32:18 AM UTC 24 |
| Finished | Sep 11 08:32:53 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203172328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.2203172328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.38131292 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 340605012 ps |
| CPU time | 5.58 seconds |
| Started | Sep 11 08:32:05 AM UTC 24 |
| Finished | Sep 11 08:32:12 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=38131292 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.38131292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.2152723733 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 505088166 ps |
| CPU time | 2.05 seconds |
| Started | Sep 11 08:32:18 AM UTC 24 |
| Finished | Sep 11 08:32:21 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2152723733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.2152723733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.2054523484 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 563891550 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2054523484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_ tx_rx_disruption.2054523484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.1608938643 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 594502488 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1608938643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.1608938643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.1534237581 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 552335075 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1534237581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_ tx_rx_disruption.1534237581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.2220910882 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 458786035 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2220910882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.2220910882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.70164100 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 668616082 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=70164100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_tx _rx_disruption.70164100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.3860880163 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 472394005 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3860880163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.3860880163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.1773398293 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 490038138 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1773398293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.1773398293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.340425194 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 547457118 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=340425194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_t x_rx_disruption.340425194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.88188759 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 587758481 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=88188759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_tx _rx_disruption.88188759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.1700229829 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 566926848 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1700229829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.1700229829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.1345209574 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 35980397 ps |
| CPU time | 1.02 seconds |
| Started | Sep 11 08:32:36 AM UTC 24 |
| Finished | Sep 11 08:32:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1345209574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.1345209574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.2850700376 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 4193444692 ps |
| CPU time | 9.25 seconds |
| Started | Sep 11 08:32:18 AM UTC 24 |
| Finished | Sep 11 08:32:28 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850700376 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.2850700376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.3478925963 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 14634749956 ps |
| CPU time | 20.25 seconds |
| Started | Sep 11 08:32:18 AM UTC 24 |
| Finished | Sep 11 08:32:39 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3478925963 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.3478925963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.396211231 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 25485073718 ps |
| CPU time | 39.76 seconds |
| Started | Sep 11 08:32:18 AM UTC 24 |
| Finished | Sep 11 08:32:59 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396211231 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.396211231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.2614137643 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 165425182 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:32:19 AM UTC 24 |
| Finished | Sep 11 08:32:22 AM UTC 24 |
| Peak memory | 214796 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614137643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_av_buffer.2614137643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.713505190 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 171642670 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:32:19 AM UTC 24 |
| Finished | Sep 11 08:32:22 AM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=713505190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_bitstuff_err.713505190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.42339372 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 296289670 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:32:19 AM UTC 24 |
| Finished | Sep 11 08:32:22 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=42339372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_clear.42339372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.1560615153 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 1117526415 ps |
| CPU time | 4.42 seconds |
| Started | Sep 11 08:32:19 AM UTC 24 |
| Finished | Sep 11 08:32:25 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1560615153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.1560615153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.992141280 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 27172921214 ps |
| CPU time | 52.41 seconds |
| Started | Sep 11 08:32:19 AM UTC 24 |
| Finished | Sep 11 08:33:13 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=992141280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_device_address.992141280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.2129005482 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 1130961479 ps |
| CPU time | 24 seconds |
| Started | Sep 11 08:32:20 AM UTC 24 |
| Finished | Sep 11 08:32:45 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129005482 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.2129005482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.1078677628 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 992156297 ps |
| CPU time | 3.25 seconds |
| Started | Sep 11 08:32:21 AM UTC 24 |
| Finished | Sep 11 08:32:25 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078677628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_disable_endpoint.1078677628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.232981172 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 151156303 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:32:21 AM UTC 24 |
| Finished | Sep 11 08:32:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=232981172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_disconnected.232981172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_enable.1527822643 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 77975051 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:32:21 AM UTC 24 |
| Finished | Sep 11 08:32:23 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527822643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.1527822643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.3066055686 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 936653584 ps |
| CPU time | 3.36 seconds |
| Started | Sep 11 08:32:21 AM UTC 24 |
| Finished | Sep 11 08:32:26 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066055686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.3066055686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.803038701 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 166451441 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:32:23 AM UTC 24 |
| Finished | Sep 11 08:32:26 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=803038701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_fifo_levels.803038701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.4163428721 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 366540959 ps |
| CPU time | 2.39 seconds |
| Started | Sep 11 08:32:23 AM UTC 24 |
| Finished | Sep 11 08:32:26 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163428721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_fifo_rst.4163428721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.693427005 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 244412700 ps |
| CPU time | 2.02 seconds |
| Started | Sep 11 08:32:23 AM UTC 24 |
| Finished | Sep 11 08:32:26 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=693427005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.693427005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.1748141461 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 142993405 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:32:23 AM UTC 24 |
| Finished | Sep 11 08:32:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748141461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_stall.1748141461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.1412184091 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 253333958 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:32:23 AM UTC 24 |
| Finished | Sep 11 08:32:26 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412184091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_trans.1412184091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.2175636965 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 4012040152 ps |
| CPU time | 40.45 seconds |
| Started | Sep 11 08:32:23 AM UTC 24 |
| Finished | Sep 11 08:33:05 AM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175636965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.2175636965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.3072469812 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 3859422792 ps |
| CPU time | 29.13 seconds |
| Started | Sep 11 08:32:23 AM UTC 24 |
| Finished | Sep 11 08:32:54 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072469812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.3072469812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.4135194423 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 234684940 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:32:24 AM UTC 24 |
| Finished | Sep 11 08:32:27 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135194423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_in_err.4135194423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.2340547145 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 12386950632 ps |
| CPU time | 22.56 seconds |
| Started | Sep 11 08:32:24 AM UTC 24 |
| Finished | Sep 11 08:32:48 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2340547145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.2340547145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.1992004787 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 9269883594 ps |
| CPU time | 14.72 seconds |
| Started | Sep 11 08:32:24 AM UTC 24 |
| Finished | Sep 11 08:32:41 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992004787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.1992004787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.650557434 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 4717229904 ps |
| CPU time | 135.94 seconds |
| Started | Sep 11 08:32:26 AM UTC 24 |
| Finished | Sep 11 08:34:44 AM UTC 24 |
| Peak memory | 229744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=650557434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.650557434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.4032584975 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 2083187893 ps |
| CPU time | 18.36 seconds |
| Started | Sep 11 08:32:26 AM UTC 24 |
| Finished | Sep 11 08:32:46 AM UTC 24 |
| Peak memory | 227328 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032584975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.4032584975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.994317206 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 252198359 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:32:27 AM UTC 24 |
| Finished | Sep 11 08:32:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=994317206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.994317206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.2865386541 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 182092643 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:32:27 AM UTC 24 |
| Finished | Sep 11 08:32:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865386541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.2865386541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.1051030094 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 3103383813 ps |
| CPU time | 22.72 seconds |
| Started | Sep 11 08:32:27 AM UTC 24 |
| Finished | Sep 11 08:32:51 AM UTC 24 |
| Peak memory | 227452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051030094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.1051030094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.3893773649 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 165008950 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:32:27 AM UTC 24 |
| Finished | Sep 11 08:32:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893773649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.3893773649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.214457819 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 152681702 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:32:27 AM UTC 24 |
| Finished | Sep 11 08:32:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=214457819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.214457819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.836052961 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 190867480 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:32:27 AM UTC 24 |
| Finished | Sep 11 08:32:30 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=836052961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_nak_trans.836052961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.3880051808 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 166331802 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:32:27 AM UTC 24 |
| Finished | Sep 11 08:32:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880051808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_out_iso.3880051808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.2574692509 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 180916629 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:32:27 AM UTC 24 |
| Finished | Sep 11 08:32:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574692509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_out_stall.2574692509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.639444409 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 173104291 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:32:27 AM UTC 24 |
| Finished | Sep 11 08:32:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=639444409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_out_trans_nak.639444409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.1862423317 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 154365749 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:32:29 AM UTC 24 |
| Finished | Sep 11 08:32:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1862423317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.1862423317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.2150255520 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 235328012 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:32:29 AM UTC 24 |
| Finished | Sep 11 08:32:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150255520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.2150255520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.3300032164 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 141123031 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:32:29 AM UTC 24 |
| Finished | Sep 11 08:32:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3300032164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.3300032164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.767097074 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 68190294 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:32:29 AM UTC 24 |
| Finished | Sep 11 08:32:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767097074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_phy_pins_sense.767097074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.2634559340 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 12106758661 ps |
| CPU time | 34.08 seconds |
| Started | Sep 11 08:32:30 AM UTC 24 |
| Finished | Sep 11 08:33:06 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634559340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_buffer.2634559340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.3188003069 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 174882670 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188003069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.3188003069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.2065091764 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 200406818 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:34 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065091764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.2065091764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.992342473 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 221807906 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:35 AM UTC 24 |
| Peak memory | 213872 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=992342473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_random_length_in_transaction.992342473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.1917368141 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 177374083 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917368141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.1917368141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.2779748442 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 204865922 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:35 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779748442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.2779748442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.2719790952 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 310462156 ps |
| CPU time | 2.01 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719790952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_rx_full.2719790952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.768569879 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 151342117 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=768569879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_setup_stage.768569879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.831891757 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 149117586 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=831891757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 39.usbdev_setup_trans_ignored.831891757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.3874311190 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 217732725 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:34 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874311190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.3874311190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.587833436 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 2329174321 ps |
| CPU time | 76.2 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:33:51 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=587833436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.587833436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.4176740942 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 172717385 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4176740942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.4176740942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.3503657676 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 201864139 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:32:32 AM UTC 24 |
| Finished | Sep 11 08:32:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3503657676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_stall_trans.3503657676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.2360819883 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 1328948326 ps |
| CPU time | 5.26 seconds |
| Started | Sep 11 08:32:34 AM UTC 24 |
| Finished | Sep 11 08:32:40 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360819883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.2360819883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.3941781323 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 2304666875 ps |
| CPU time | 21.88 seconds |
| Started | Sep 11 08:32:34 AM UTC 24 |
| Finished | Sep 11 08:32:57 AM UTC 24 |
| Peak memory | 234376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941781323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_streaming_out.3941781323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.3033331131 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 1530153366 ps |
| CPU time | 14.37 seconds |
| Started | Sep 11 08:32:20 AM UTC 24 |
| Finished | Sep 11 08:32:35 AM UTC 24 |
| Peak memory | 216744 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3033331131 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.3033331131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.386817964 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 496551609 ps |
| CPU time | 2.73 seconds |
| Started | Sep 11 08:32:34 AM UTC 24 |
| Finished | Sep 11 08:32:38 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=386817964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_tx _rx_disruption.386817964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.3077368896 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 514114255 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3077368896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.3077368896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.3388932786 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 675823551 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3388932786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.3388932786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.2753715077 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 516312940 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:37:37 AM UTC 24 |
| Finished | Sep 11 08:37:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2753715077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.2753715077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.4117033059 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 426316748 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:37:40 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4117033059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.4117033059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.3815185525 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 429960486 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:37:40 AM UTC 24 |
| Finished | Sep 11 08:37:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3815185525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.3815185525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.1402284114 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 531176018 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:37:40 AM UTC 24 |
| Finished | Sep 11 08:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1402284114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.1402284114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.1004425533 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 574236921 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1004425533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.1004425533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.2562478098 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 606284174 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2562478098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.2562478098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.212169336 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 540542156 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=212169336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_t x_rx_disruption.212169336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.3387122785 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 630148864 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:45 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3387122785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.3387122785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.2111641240 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 58065092 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:21:03 AM UTC 24 |
| Finished | Sep 11 08:21:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111641240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.2111641240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.2733452644 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 12098386339 ps |
| CPU time | 28.78 seconds |
| Started | Sep 11 08:20:16 AM UTC 24 |
| Finished | Sep 11 08:20:46 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733452644 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.2733452644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.251517598 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 21330194273 ps |
| CPU time | 25.75 seconds |
| Started | Sep 11 08:20:16 AM UTC 24 |
| Finished | Sep 11 08:20:43 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=251517598 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.251517598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.73225671 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 26027851480 ps |
| CPU time | 35.28 seconds |
| Started | Sep 11 08:20:16 AM UTC 24 |
| Finished | Sep 11 08:20:53 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=73225671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.73225671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.565632080 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 167587344 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:20:16 AM UTC 24 |
| Finished | Sep 11 08:20:19 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=565632080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_buffer.565632080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.2250435265 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 239886002 ps |
| CPU time | 1.8 seconds |
| Started | Sep 11 08:20:18 AM UTC 24 |
| Finished | Sep 11 08:20:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250435265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.2250435265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.3580957936 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 217591370 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:20:18 AM UTC 24 |
| Finished | Sep 11 08:20:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580957936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.3580957936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.3103167747 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 149700139 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:20:19 AM UTC 24 |
| Finished | Sep 11 08:20:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3103167747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.3103167747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.3950913751 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 491235431 ps |
| CPU time | 2.93 seconds |
| Started | Sep 11 08:20:19 AM UTC 24 |
| Finished | Sep 11 08:20:23 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950913751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.3950913751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.1126941696 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 336934980 ps |
| CPU time | 1.91 seconds |
| Started | Sep 11 08:20:19 AM UTC 24 |
| Finished | Sep 11 08:20:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126941696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.1126941696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.1343145858 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 18264300177 ps |
| CPU time | 40.84 seconds |
| Started | Sep 11 08:20:19 AM UTC 24 |
| Finished | Sep 11 08:21:01 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343145858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.1343145858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.2634570388 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 210598414 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:20:20 AM UTC 24 |
| Finished | Sep 11 08:20:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634570388 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.2634570388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.3936145272 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 647326134 ps |
| CPU time | 3.12 seconds |
| Started | Sep 11 08:20:22 AM UTC 24 |
| Finished | Sep 11 08:20:26 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936145272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_disable_endpoint.3936145272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.3990847873 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 143809968 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:20:22 AM UTC 24 |
| Finished | Sep 11 08:20:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3990847873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_disconnected.3990847873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_enable.487476606 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 53136980 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:20:23 AM UTC 24 |
| Finished | Sep 11 08:20:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487476606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_enable.487476606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.2910490968 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 758692382 ps |
| CPU time | 2.94 seconds |
| Started | Sep 11 08:20:23 AM UTC 24 |
| Finished | Sep 11 08:20:27 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2910490968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.2910490968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.2878870508 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 188857731 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:20:23 AM UTC 24 |
| Finished | Sep 11 08:20:26 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2878870508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_fifo_levels.2878870508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.3057554743 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 343439008 ps |
| CPU time | 2.64 seconds |
| Started | Sep 11 08:20:24 AM UTC 24 |
| Finished | Sep 11 08:20:28 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057554743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.3057554743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.188599294 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 119183783048 ps |
| CPU time | 199.59 seconds |
| Started | Sep 11 08:20:24 AM UTC 24 |
| Finished | Sep 11 08:23:47 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=188599294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.188599294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.1309960298 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 102221511452 ps |
| CPU time | 188.41 seconds |
| Started | Sep 11 08:20:25 AM UTC 24 |
| Finished | Sep 11 08:23:37 AM UTC 24 |
| Peak memory | 217272 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1309960298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_hiclk_max.1309960298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.972137006 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 94184709498 ps |
| CPU time | 161.1 seconds |
| Started | Sep 11 08:20:26 AM UTC 24 |
| Finished | Sep 11 08:23:10 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=972137006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.972137006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.2359537528 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 102164744443 ps |
| CPU time | 187.84 seconds |
| Started | Sep 11 08:20:27 AM UTC 24 |
| Finished | Sep 11 08:23:37 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359537528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.2359537528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.2375237307 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 230638576 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:20:28 AM UTC 24 |
| Finished | Sep 11 08:20:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375237307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.2375237307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.1069011647 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 139111518 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:20:28 AM UTC 24 |
| Finished | Sep 11 08:20:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1069011647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_stall.1069011647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.2472694499 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 165307178 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:20:29 AM UTC 24 |
| Finished | Sep 11 08:20:32 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472694499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.2472694499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.1784848033 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 3471807643 ps |
| CPU time | 121.95 seconds |
| Started | Sep 11 08:20:27 AM UTC 24 |
| Finished | Sep 11 08:22:31 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1784848033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.1784848033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.2598343167 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 11239851702 ps |
| CPU time | 90.41 seconds |
| Started | Sep 11 08:20:29 AM UTC 24 |
| Finished | Sep 11 08:22:02 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2598343167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.2598343167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.2243430175 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 227054959 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:20:31 AM UTC 24 |
| Finished | Sep 11 08:20:34 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2243430175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_in_err.2243430175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.1505236993 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 9274429713 ps |
| CPU time | 27.27 seconds |
| Started | Sep 11 08:20:31 AM UTC 24 |
| Finished | Sep 11 08:21:00 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505236993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.1505236993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.4239431503 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 10299480840 ps |
| CPU time | 13.54 seconds |
| Started | Sep 11 08:20:32 AM UTC 24 |
| Finished | Sep 11 08:20:47 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239431503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_link_suspend.4239431503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.1357294594 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 2760246338 ps |
| CPU time | 27.64 seconds |
| Started | Sep 11 08:20:33 AM UTC 24 |
| Finished | Sep 11 08:21:02 AM UTC 24 |
| Peak memory | 234324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1357294594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.1357294594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.4237905268 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 2120458950 ps |
| CPU time | 18.37 seconds |
| Started | Sep 11 08:20:36 AM UTC 24 |
| Finished | Sep 11 08:20:55 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237905268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.4237905268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.3899641137 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 251756992 ps |
| CPU time | 1.81 seconds |
| Started | Sep 11 08:20:36 AM UTC 24 |
| Finished | Sep 11 08:20:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899641137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.3899641137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.720161264 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 194319805 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:20:38 AM UTC 24 |
| Finished | Sep 11 08:20:40 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=720161264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.720161264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.3409200946 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 2273310804 ps |
| CPU time | 27.5 seconds |
| Started | Sep 11 08:20:39 AM UTC 24 |
| Finished | Sep 11 08:21:08 AM UTC 24 |
| Peak memory | 234020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409200946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.3409200946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.1385299654 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 3102500731 ps |
| CPU time | 27.04 seconds |
| Started | Sep 11 08:20:39 AM UTC 24 |
| Finished | Sep 11 08:21:07 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385299654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.1385299654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.3043441624 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 2360034810 ps |
| CPU time | 23.13 seconds |
| Started | Sep 11 08:20:41 AM UTC 24 |
| Finished | Sep 11 08:21:05 AM UTC 24 |
| Peak memory | 229640 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3043441624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.3043441624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.1022382422 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 152642742 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:20:43 AM UTC 24 |
| Finished | Sep 11 08:20:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022382422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.1022382422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.783811888 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 146257037 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:20:44 AM UTC 24 |
| Finished | Sep 11 08:20:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=783811888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.783811888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.2880657314 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 200606642 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:20:44 AM UTC 24 |
| Finished | Sep 11 08:20:47 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880657314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_nak_trans.2880657314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.4258708991 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 187686226 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:20:45 AM UTC 24 |
| Finished | Sep 11 08:20:48 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258708991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.4258708991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.1445682941 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 155379504 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:20:47 AM UTC 24 |
| Finished | Sep 11 08:20:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445682941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_out_stall.1445682941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.1397062530 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 200334811 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:20:47 AM UTC 24 |
| Finished | Sep 11 08:20:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1397062530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_out_trans_nak.1397062530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.3856300458 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 206603263 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:20:47 AM UTC 24 |
| Finished | Sep 11 08:20:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856300458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.3856300458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.2901326509 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 266358167 ps |
| CPU time | 2.05 seconds |
| Started | Sep 11 08:20:48 AM UTC 24 |
| Finished | Sep 11 08:20:52 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2901326509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.2901326509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.3027051450 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 225916599 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:20:49 AM UTC 24 |
| Finished | Sep 11 08:20:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3027051450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.3027051450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.48038883 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 156114857 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:20:49 AM UTC 24 |
| Finished | Sep 11 08:20:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=48038883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.48038883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.2425872463 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 36033104 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:20:50 AM UTC 24 |
| Finished | Sep 11 08:20:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425872463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.2425872463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.852418209 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 10797266345 ps |
| CPU time | 30.28 seconds |
| Started | Sep 11 08:20:50 AM UTC 24 |
| Finished | Sep 11 08:21:22 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=852418209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_pkt_buffer.852418209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.2494431254 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 170727261 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:20:50 AM UTC 24 |
| Finished | Sep 11 08:20:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494431254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_pkt_received.2494431254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.1048647652 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 231316977 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:20:51 AM UTC 24 |
| Finished | Sep 11 08:20:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048647652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.1048647652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.1818319625 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 3023949549 ps |
| CPU time | 25.76 seconds |
| Started | Sep 11 08:20:52 AM UTC 24 |
| Finished | Sep 11 08:21:19 AM UTC 24 |
| Peak memory | 229556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818319625 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.1818319625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.468244963 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 3988199418 ps |
| CPU time | 30.25 seconds |
| Started | Sep 11 08:20:54 AM UTC 24 |
| Finished | Sep 11 08:21:25 AM UTC 24 |
| Peak memory | 229712 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=468244963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.468244963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.2702986845 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 6443783266 ps |
| CPU time | 82.28 seconds |
| Started | Sep 11 08:20:54 AM UTC 24 |
| Finished | Sep 11 08:22:18 AM UTC 24 |
| Peak memory | 229732 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2702986845 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.2702986845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.1287840169 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 186360074 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:20:52 AM UTC 24 |
| Finished | Sep 11 08:20:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287840169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_random_length_in_transaction.1287840169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.3296714477 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 200301738 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:20:52 AM UTC 24 |
| Finished | Sep 11 08:20:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3296714477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.3296714477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.86259296 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 20197487292 ps |
| CPU time | 42.46 seconds |
| Started | Sep 11 08:20:54 AM UTC 24 |
| Finished | Sep 11 08:21:38 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=86259296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_resume_link_active.86259296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.611782269 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 168683674 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:20:54 AM UTC 24 |
| Finished | Sep 11 08:20:56 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=611782269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_rx_crc_err.611782269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.1501093228 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 240856523 ps |
| CPU time | 1.8 seconds |
| Started | Sep 11 08:20:56 AM UTC 24 |
| Finished | Sep 11 08:20:59 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501093228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.1501093228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.2902394393 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 170933841 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:20:56 AM UTC 24 |
| Finished | Sep 11 08:20:58 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902394393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.2902394393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.2609985237 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 738653305 ps |
| CPU time | 2.97 seconds |
| Started | Sep 11 08:21:03 AM UTC 24 |
| Finished | Sep 11 08:21:07 AM UTC 24 |
| Peak memory | 251532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609985237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.2609985237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.608485017 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 454554797 ps |
| CPU time | 2.03 seconds |
| Started | Sep 11 08:20:56 AM UTC 24 |
| Finished | Sep 11 08:20:59 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=608485017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_setup_priority.608485017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.354584668 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 307497595 ps |
| CPU time | 1.91 seconds |
| Started | Sep 11 08:20:56 AM UTC 24 |
| Finished | Sep 11 08:20:59 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354584668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.354584668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.462372945 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 157002154 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:20:56 AM UTC 24 |
| Finished | Sep 11 08:20:58 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=462372945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_setup_stage.462372945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.247895856 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 183364104 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:20:56 AM UTC 24 |
| Finished | Sep 11 08:20:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=247895856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 4.usbdev_setup_trans_ignored.247895856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.3228385885 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 298094692 ps |
| CPU time | 1.84 seconds |
| Started | Sep 11 08:20:57 AM UTC 24 |
| Finished | Sep 11 08:21:00 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228385885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.3228385885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.3878510254 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 2752070204 ps |
| CPU time | 39.74 seconds |
| Started | Sep 11 08:20:59 AM UTC 24 |
| Finished | Sep 11 08:21:40 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3878510254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.3878510254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.1738501563 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 158902384 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:21:00 AM UTC 24 |
| Finished | Sep 11 08:21:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738501563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.1738501563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.56426160 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 171439271 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:21:00 AM UTC 24 |
| Finished | Sep 11 08:21:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=56426160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_stall_trans.56426160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.859287356 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 280706823 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:21:00 AM UTC 24 |
| Finished | Sep 11 08:21:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=859287356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_stream_len_max.859287356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.673485946 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 2290619400 ps |
| CPU time | 24.12 seconds |
| Started | Sep 11 08:21:00 AM UTC 24 |
| Finished | Sep 11 08:21:25 AM UTC 24 |
| Peak memory | 227376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=673485946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_streaming_out.673485946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.3486707057 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 8832252133 ps |
| CPU time | 79.28 seconds |
| Started | Sep 11 08:21:00 AM UTC 24 |
| Finished | Sep 11 08:22:21 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486707057 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.3486707057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.3171734961 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 1254552865 ps |
| CPU time | 31.15 seconds |
| Started | Sep 11 08:20:21 AM UTC 24 |
| Finished | Sep 11 08:20:54 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171734961 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.3171734961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.87632095 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 613413001 ps |
| CPU time | 3.14 seconds |
| Started | Sep 11 08:21:01 AM UTC 24 |
| Finished | Sep 11 08:21:05 AM UTC 24 |
| Peak memory | 217204 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=87632095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx_r x_disruption.87632095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.2698942169 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 97916103 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:32:53 AM UTC 24 |
| Finished | Sep 11 08:32:55 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2698942169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.2698942169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.1989188441 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 10359554419 ps |
| CPU time | 21.05 seconds |
| Started | Sep 11 08:32:36 AM UTC 24 |
| Finished | Sep 11 08:32:59 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989188441 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.1989188441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.2247568352 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 14122198547 ps |
| CPU time | 22.89 seconds |
| Started | Sep 11 08:32:36 AM UTC 24 |
| Finished | Sep 11 08:33:01 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2247568352 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.2247568352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.1778296311 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 28376459919 ps |
| CPU time | 38.43 seconds |
| Started | Sep 11 08:32:36 AM UTC 24 |
| Finished | Sep 11 08:33:17 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778296311 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.1778296311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.174875282 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 158991909 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:32:36 AM UTC 24 |
| Finished | Sep 11 08:32:40 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174875282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_av_buffer.174875282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.4095380667 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 150240205 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:32:36 AM UTC 24 |
| Finished | Sep 11 08:32:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095380667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.4095380667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.135373513 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 192837983 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:32:36 AM UTC 24 |
| Finished | Sep 11 08:32:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135373513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_data_toggle_clear.135373513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.1106759195 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 1028357723 ps |
| CPU time | 4.19 seconds |
| Started | Sep 11 08:32:36 AM UTC 24 |
| Finished | Sep 11 08:32:42 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106759195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.1106759195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.3035852223 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 35578529942 ps |
| CPU time | 68.41 seconds |
| Started | Sep 11 08:32:36 AM UTC 24 |
| Finished | Sep 11 08:33:47 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3035852223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.3035852223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.1065774195 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 3897183309 ps |
| CPU time | 32.49 seconds |
| Started | Sep 11 08:32:36 AM UTC 24 |
| Finished | Sep 11 08:33:11 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065774195 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.1065774195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.1346113261 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 743982087 ps |
| CPU time | 3.07 seconds |
| Started | Sep 11 08:32:39 AM UTC 24 |
| Finished | Sep 11 08:32:43 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346113261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_disable_endpoint.1346113261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.1482796095 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 202174046 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:32:39 AM UTC 24 |
| Finished | Sep 11 08:32:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482796095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.1482796095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_enable.2222403150 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 41980960 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:32:39 AM UTC 24 |
| Finished | Sep 11 08:32:41 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222403150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.2222403150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.605497113 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 798137673 ps |
| CPU time | 3.29 seconds |
| Started | Sep 11 08:32:40 AM UTC 24 |
| Finished | Sep 11 08:32:44 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=605497113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.605497113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.3314822779 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 158339843 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:32:40 AM UTC 24 |
| Finished | Sep 11 08:32:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314822779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.3314822779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.1677535038 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 412737779 ps |
| CPU time | 3.98 seconds |
| Started | Sep 11 08:32:40 AM UTC 24 |
| Finished | Sep 11 08:32:45 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677535038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.1677535038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.256820151 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 201750986 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:32:42 AM UTC 24 |
| Finished | Sep 11 08:32:44 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=256820151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.256820151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.3000853311 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 232469504 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:32:42 AM UTC 24 |
| Finished | Sep 11 08:32:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3000853311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_stall.3000853311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.2902892298 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 297927805 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:32:42 AM UTC 24 |
| Finished | Sep 11 08:32:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902892298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.2902892298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.183427932 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 5461178963 ps |
| CPU time | 42.78 seconds |
| Started | Sep 11 08:32:42 AM UTC 24 |
| Finished | Sep 11 08:33:26 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=183427932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.183427932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.1531257692 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 10330007727 ps |
| CPU time | 73.16 seconds |
| Started | Sep 11 08:32:44 AM UTC 24 |
| Finished | Sep 11 08:33:58 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531257692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.1531257692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.1801635535 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 256690725 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:32:44 AM UTC 24 |
| Finished | Sep 11 08:32:46 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801635535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_in_err.1801635535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.3270477707 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 11308532440 ps |
| CPU time | 17.93 seconds |
| Started | Sep 11 08:32:44 AM UTC 24 |
| Finished | Sep 11 08:33:03 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270477707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_resume.3270477707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.3785879112 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 9834708086 ps |
| CPU time | 14.9 seconds |
| Started | Sep 11 08:32:44 AM UTC 24 |
| Finished | Sep 11 08:33:00 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785879112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.3785879112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.1570875815 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 3746577151 ps |
| CPU time | 35.33 seconds |
| Started | Sep 11 08:32:44 AM UTC 24 |
| Finished | Sep 11 08:33:21 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570875815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.1570875815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.3055564930 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 2573019650 ps |
| CPU time | 68.59 seconds |
| Started | Sep 11 08:32:44 AM UTC 24 |
| Finished | Sep 11 08:33:54 AM UTC 24 |
| Peak memory | 227676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055564930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.3055564930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.3139742551 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 249491326 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:32:45 AM UTC 24 |
| Finished | Sep 11 08:32:48 AM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3139742551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.3139742551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.1066008165 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 195824762 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:32:45 AM UTC 24 |
| Finished | Sep 11 08:32:48 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066008165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.1066008165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.1254175078 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 2347660434 ps |
| CPU time | 62.64 seconds |
| Started | Sep 11 08:32:45 AM UTC 24 |
| Finished | Sep 11 08:33:50 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254175078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.1254175078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.389043559 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 166356284 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:32:45 AM UTC 24 |
| Finished | Sep 11 08:32:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=389043559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.389043559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.1276447297 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 154105036 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:32:45 AM UTC 24 |
| Finished | Sep 11 08:32:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1276447297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.1276447297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.1580221409 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 212984317 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:32:46 AM UTC 24 |
| Finished | Sep 11 08:32:48 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1580221409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.1580221409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.1319281489 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 202916366 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:32:47 AM UTC 24 |
| Finished | Sep 11 08:32:50 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1319281489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_iso.1319281489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.707510208 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 178202854 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:32:47 AM UTC 24 |
| Finished | Sep 11 08:32:50 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=707510208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_out_stall.707510208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.2992370682 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 210360494 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:32:47 AM UTC 24 |
| Finished | Sep 11 08:32:50 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992370682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_out_trans_nak.2992370682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.1728748313 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 161890794 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:32:47 AM UTC 24 |
| Finished | Sep 11 08:32:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728748313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.1728748313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.1703443509 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 256150770 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:32:47 AM UTC 24 |
| Finished | Sep 11 08:32:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703443509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.1703443509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.4180395544 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 147799459 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:32:47 AM UTC 24 |
| Finished | Sep 11 08:32:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4180395544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.4180395544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.1912202772 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 75179608 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:32:47 AM UTC 24 |
| Finished | Sep 11 08:32:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912202772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.1912202772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.1517864215 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 22838853239 ps |
| CPU time | 59.87 seconds |
| Started | Sep 11 08:32:49 AM UTC 24 |
| Finished | Sep 11 08:33:50 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1517864215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_pkt_buffer.1517864215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.3734289562 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 167202321 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:32:49 AM UTC 24 |
| Finished | Sep 11 08:32:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734289562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_pkt_received.3734289562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.355529054 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 213078320 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:32:49 AM UTC 24 |
| Finished | Sep 11 08:32:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=355529054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_pkt_sent.355529054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.2103528511 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 227886462 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:32:49 AM UTC 24 |
| Finished | Sep 11 08:32:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2103528511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_random_length_in_transaction.2103528511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.2539877834 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 159870385 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:32:49 AM UTC 24 |
| Finished | Sep 11 08:32:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539877834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.2539877834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.841981995 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 169707536 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:32:49 AM UTC 24 |
| Finished | Sep 11 08:32:52 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=841981995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_rx_crc_err.841981995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.1194530520 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 289348483 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:32:51 AM UTC 24 |
| Finished | Sep 11 08:32:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194530520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.1194530520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.1003207069 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 161037808 ps |
| CPU time | 1.02 seconds |
| Started | Sep 11 08:32:51 AM UTC 24 |
| Finished | Sep 11 08:32:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003207069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_setup_stage.1003207069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.593332718 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 154096412 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:32:51 AM UTC 24 |
| Finished | Sep 11 08:32:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=593332718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 40.usbdev_setup_trans_ignored.593332718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.2653774618 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 205858892 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:32:51 AM UTC 24 |
| Finished | Sep 11 08:32:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653774618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.2653774618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.374379133 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 3299267169 ps |
| CPU time | 25.52 seconds |
| Started | Sep 11 08:32:51 AM UTC 24 |
| Finished | Sep 11 08:33:18 AM UTC 24 |
| Peak memory | 234256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=374379133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.374379133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.431433296 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 185816729 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:32:52 AM UTC 24 |
| Finished | Sep 11 08:32:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=431433296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.431433296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.490308802 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 208953611 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:32:52 AM UTC 24 |
| Finished | Sep 11 08:32:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=490308802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_stall_trans.490308802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.1142198798 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 959116585 ps |
| CPU time | 3.03 seconds |
| Started | Sep 11 08:32:52 AM UTC 24 |
| Finished | Sep 11 08:32:56 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1142198798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.1142198798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.824761673 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 2282116492 ps |
| CPU time | 17.46 seconds |
| Started | Sep 11 08:32:52 AM UTC 24 |
| Finished | Sep 11 08:33:10 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=824761673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_streaming_out.824761673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.637681090 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 2473664534 ps |
| CPU time | 20.78 seconds |
| Started | Sep 11 08:32:37 AM UTC 24 |
| Finished | Sep 11 08:32:59 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=637681090 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.637681090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.456349838 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 471630132 ps |
| CPU time | 2.12 seconds |
| Started | Sep 11 08:32:52 AM UTC 24 |
| Finished | Sep 11 08:32:55 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=456349838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_tx _rx_disruption.456349838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.3167089970 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 486069031 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3167089970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_ tx_rx_disruption.3167089970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.2817334973 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 602617304 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2817334973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_ tx_rx_disruption.2817334973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.4032926251 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 510038860 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4032926251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.4032926251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.504490076 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 628061248 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:45 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=504490076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_t x_rx_disruption.504490076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.3332255744 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 503740632 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3332255744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_ tx_rx_disruption.3332255744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.3564364408 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 628617321 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3564364408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.3564364408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.1192418736 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 684082859 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1192418736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.1192418736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.3625760641 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 628480202 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3625760641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.3625760641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.3515362949 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 606391538 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3515362949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_ tx_rx_disruption.3515362949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.2026203941 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 519227771 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2026203941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_ tx_rx_disruption.2026203941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.2715911178 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 36249377 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:33:07 AM UTC 24 |
| Finished | Sep 11 08:33:09 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2715911178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.2715911178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.945170166 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 5862421958 ps |
| CPU time | 13.01 seconds |
| Started | Sep 11 08:32:53 AM UTC 24 |
| Finished | Sep 11 08:33:08 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=945170166 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.945170166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.576314317 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 19993108549 ps |
| CPU time | 31 seconds |
| Started | Sep 11 08:32:53 AM UTC 24 |
| Finished | Sep 11 08:33:26 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=576314317 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.576314317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.2390521521 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 24091688770 ps |
| CPU time | 31.06 seconds |
| Started | Sep 11 08:32:54 AM UTC 24 |
| Finished | Sep 11 08:33:26 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390521521 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.2390521521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.2961187235 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 181873905 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:32:54 AM UTC 24 |
| Finished | Sep 11 08:32:56 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961187235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_av_buffer.2961187235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.3522232436 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 212203964 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:32:54 AM UTC 24 |
| Finished | Sep 11 08:32:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3522232436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.3522232436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.876942394 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 552793398 ps |
| CPU time | 2.13 seconds |
| Started | Sep 11 08:32:54 AM UTC 24 |
| Finished | Sep 11 08:32:57 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=876942394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_data_toggle_clear.876942394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.1398101987 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 669430022 ps |
| CPU time | 2.02 seconds |
| Started | Sep 11 08:32:54 AM UTC 24 |
| Finished | Sep 11 08:32:57 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398101987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.1398101987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.1075223233 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 36023276612 ps |
| CPU time | 68.57 seconds |
| Started | Sep 11 08:32:54 AM UTC 24 |
| Finished | Sep 11 08:34:04 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075223233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.1075223233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.22728148 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 451043903 ps |
| CPU time | 8.99 seconds |
| Started | Sep 11 08:32:54 AM UTC 24 |
| Finished | Sep 11 08:33:04 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=22728148 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.22728148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.2934809463 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 745705166 ps |
| CPU time | 2.72 seconds |
| Started | Sep 11 08:32:55 AM UTC 24 |
| Finished | Sep 11 08:32:59 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2934809463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.2934809463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.322189909 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 196943274 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:32:56 AM UTC 24 |
| Finished | Sep 11 08:32:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=322189909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_disconnected.322189909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_enable.3223327867 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 51516747 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:32:56 AM UTC 24 |
| Finished | Sep 11 08:32:58 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3223327867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_enable.3223327867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.2788464862 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 1017566052 ps |
| CPU time | 4.76 seconds |
| Started | Sep 11 08:32:56 AM UTC 24 |
| Finished | Sep 11 08:33:01 AM UTC 24 |
| Peak memory | 216700 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788464862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.2788464862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.3719632180 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 673897439 ps |
| CPU time | 1.96 seconds |
| Started | Sep 11 08:32:56 AM UTC 24 |
| Finished | Sep 11 08:32:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719632180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.3719632180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.3242687157 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 271399692 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:32:56 AM UTC 24 |
| Finished | Sep 11 08:32:58 AM UTC 24 |
| Peak memory | 216728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3242687157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_fifo_levels.3242687157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.2530702631 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 307209414 ps |
| CPU time | 3.13 seconds |
| Started | Sep 11 08:32:56 AM UTC 24 |
| Finished | Sep 11 08:33:00 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530702631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.2530702631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.3044368317 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 237418366 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:32:57 AM UTC 24 |
| Finished | Sep 11 08:33:00 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044368317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.3044368317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.892565376 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 139107403 ps |
| CPU time | 1 seconds |
| Started | Sep 11 08:32:57 AM UTC 24 |
| Finished | Sep 11 08:32:59 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=892565376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_in_stall.892565376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.2782469800 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 194899201 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:32:57 AM UTC 24 |
| Finished | Sep 11 08:33:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782469800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.2782469800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.1282236960 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 3416947978 ps |
| CPU time | 94.03 seconds |
| Started | Sep 11 08:32:56 AM UTC 24 |
| Finished | Sep 11 08:34:32 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282236960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.1282236960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.3698155650 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 9643292952 ps |
| CPU time | 115.08 seconds |
| Started | Sep 11 08:32:57 AM UTC 24 |
| Finished | Sep 11 08:34:55 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3698155650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.3698155650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.3305407236 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 248282254 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:32:58 AM UTC 24 |
| Finished | Sep 11 08:33:00 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305407236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.3305407236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.1145729683 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 10043836273 ps |
| CPU time | 18.17 seconds |
| Started | Sep 11 08:32:58 AM UTC 24 |
| Finished | Sep 11 08:33:17 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1145729683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.1145729683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.1243175551 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 9039147618 ps |
| CPU time | 13.67 seconds |
| Started | Sep 11 08:32:59 AM UTC 24 |
| Finished | Sep 11 08:33:14 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243175551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.1243175551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.851023873 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 2579671573 ps |
| CPU time | 19.02 seconds |
| Started | Sep 11 08:32:59 AM UTC 24 |
| Finished | Sep 11 08:33:19 AM UTC 24 |
| Peak memory | 227516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=851023873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.851023873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.1117026779 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 1920795418 ps |
| CPU time | 47.9 seconds |
| Started | Sep 11 08:32:59 AM UTC 24 |
| Finished | Sep 11 08:33:48 AM UTC 24 |
| Peak memory | 229460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117026779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.1117026779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.2544552511 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 241019460 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:32:59 AM UTC 24 |
| Finished | Sep 11 08:33:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2544552511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.2544552511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.4013746990 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 214711273 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4013746990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.4013746990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.1017739714 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 1713398554 ps |
| CPU time | 15.78 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:18 AM UTC 24 |
| Peak memory | 227400 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017739714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.1017739714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.695331952 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 155845673 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=695331952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.695331952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.3655567163 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 147686258 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:03 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3655567163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.3655567163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.4010870756 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 200450042 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010870756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.4010870756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.2574657725 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 161680711 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574657725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_out_iso.2574657725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.4288483115 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 179841534 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288483115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_out_stall.4288483115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.1644660462 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 170732478 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:03 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644660462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_out_trans_nak.1644660462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.3535944641 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 150546978 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535944641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.3535944641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.741341756 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 235490311 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=741341756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.741341756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.3323212076 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 140408102 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:33:01 AM UTC 24 |
| Finished | Sep 11 08:33:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323212076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.3323212076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.242250491 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 77084187 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:33:03 AM UTC 24 |
| Finished | Sep 11 08:33:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=242250491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_phy_pins_sense.242250491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.1835877078 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 13989737034 ps |
| CPU time | 45.99 seconds |
| Started | Sep 11 08:33:03 AM UTC 24 |
| Finished | Sep 11 08:33:50 AM UTC 24 |
| Peak memory | 231556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835877078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_pkt_buffer.1835877078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.1170084580 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 196776716 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:33:03 AM UTC 24 |
| Finished | Sep 11 08:33:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170084580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.1170084580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.2274456923 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 278266327 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:33:03 AM UTC 24 |
| Finished | Sep 11 08:33:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2274456923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.2274456923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.4024391458 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 244234046 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:33:03 AM UTC 24 |
| Finished | Sep 11 08:33:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024391458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.4024391458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.2846399202 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 178382581 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846399202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.2846399202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.254006922 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 216313311 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:08 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=254006922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_rx_crc_err.254006922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.3109007040 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 384193120 ps |
| CPU time | 1.95 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:08 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109007040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.3109007040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.787345897 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 161471597 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:07 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=787345897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_setup_stage.787345897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.3292795782 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 154974325 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:08 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292795782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.3292795782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.1419902657 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 226982517 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:07 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1419902657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.1419902657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.1011319501 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 3039983596 ps |
| CPU time | 25.6 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:32 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011319501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.1011319501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.3360512616 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 152897389 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360512616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.3360512616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.843410638 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 156222009 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:08 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=843410638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_stall_trans.843410638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.2532780388 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 281900495 ps |
| CPU time | 2.03 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:09 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2532780388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.2532780388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.1654523790 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 1687726083 ps |
| CPU time | 16.33 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:23 AM UTC 24 |
| Peak memory | 227336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654523790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_streaming_out.1654523790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.3970995298 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 7710405448 ps |
| CPU time | 48.64 seconds |
| Started | Sep 11 08:32:55 AM UTC 24 |
| Finished | Sep 11 08:33:46 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970995298 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.3970995298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.2787260998 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 456085670 ps |
| CPU time | 2.83 seconds |
| Started | Sep 11 08:33:05 AM UTC 24 |
| Finished | Sep 11 08:33:09 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2787260998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.2787260998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.1360151209 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 458282644 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1360151209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.1360151209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.19423457 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 468707738 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:37:42 AM UTC 24 |
| Finished | Sep 11 08:37:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=19423457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_tx _rx_disruption.19423457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.171113495 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 593332461 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=171113495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_t x_rx_disruption.171113495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.3968389292 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 576674310 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3968389292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.3968389292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.3575994143 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 509648350 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:47 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3575994143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_ tx_rx_disruption.3575994143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.3607000832 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 515396499 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3607000832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_ tx_rx_disruption.3607000832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.2370561664 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 479197727 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2370561664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.2370561664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.3139496889 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 571277230 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3139496889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_ tx_rx_disruption.3139496889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.4046407120 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 603675571 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4046407120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.4046407120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.1479051133 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 62175464 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:33:23 AM UTC 24 |
| Finished | Sep 11 08:33:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479051133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.1479051133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.2388506468 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 6261472841 ps |
| CPU time | 13.72 seconds |
| Started | Sep 11 08:33:07 AM UTC 24 |
| Finished | Sep 11 08:33:22 AM UTC 24 |
| Peak memory | 227656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388506468 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.2388506468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.3373741180 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 18437612901 ps |
| CPU time | 24.48 seconds |
| Started | Sep 11 08:33:07 AM UTC 24 |
| Finished | Sep 11 08:33:33 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373741180 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.3373741180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.3933893853 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 29031721570 ps |
| CPU time | 49.51 seconds |
| Started | Sep 11 08:33:07 AM UTC 24 |
| Finished | Sep 11 08:33:59 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933893853 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.3933893853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.3200666878 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 174652249 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:33:08 AM UTC 24 |
| Finished | Sep 11 08:33:10 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3200666878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.3200666878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.2464279230 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 177358806 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:33:09 AM UTC 24 |
| Finished | Sep 11 08:33:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464279230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_bitstuff_err.2464279230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.385747363 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 567704664 ps |
| CPU time | 3.14 seconds |
| Started | Sep 11 08:33:09 AM UTC 24 |
| Finished | Sep 11 08:33:13 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=385747363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_data_toggle_clear.385747363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.4004832219 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 735144338 ps |
| CPU time | 3.25 seconds |
| Started | Sep 11 08:33:09 AM UTC 24 |
| Finished | Sep 11 08:33:14 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004832219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.4004832219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.237287274 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 20538531698 ps |
| CPU time | 35.02 seconds |
| Started | Sep 11 08:33:09 AM UTC 24 |
| Finished | Sep 11 08:33:46 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=237287274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_device_address.237287274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.1897823318 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 176121712 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:33:09 AM UTC 24 |
| Finished | Sep 11 08:33:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897823318 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.1897823318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.553761992 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 449808301 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:33:09 AM UTC 24 |
| Finished | Sep 11 08:33:12 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=553761992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_disable_endpoint.553761992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.280405171 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 144849014 ps |
| CPU time | 0.95 seconds |
| Started | Sep 11 08:33:10 AM UTC 24 |
| Finished | Sep 11 08:33:12 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280405171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_disconnected.280405171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_enable.2459619823 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 35233569 ps |
| CPU time | 0.81 seconds |
| Started | Sep 11 08:33:10 AM UTC 24 |
| Finished | Sep 11 08:33:11 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459619823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_enable.2459619823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.3873988276 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 836385304 ps |
| CPU time | 2.49 seconds |
| Started | Sep 11 08:33:10 AM UTC 24 |
| Finished | Sep 11 08:33:13 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873988276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.3873988276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.3898683979 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 486259811 ps |
| CPU time | 2.25 seconds |
| Started | Sep 11 08:33:11 AM UTC 24 |
| Finished | Sep 11 08:33:14 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898683979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.3898683979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.1691713095 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 153384087 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:33:11 AM UTC 24 |
| Finished | Sep 11 08:33:13 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1691713095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_fifo_levels.1691713095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.2525889581 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 367335245 ps |
| CPU time | 3.06 seconds |
| Started | Sep 11 08:33:11 AM UTC 24 |
| Finished | Sep 11 08:33:15 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2525889581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.2525889581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.2829262042 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 226850523 ps |
| CPU time | 2.08 seconds |
| Started | Sep 11 08:33:11 AM UTC 24 |
| Finished | Sep 11 08:33:14 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2829262042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.2829262042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.1330402902 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 145605975 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:33:13 AM UTC 24 |
| Finished | Sep 11 08:33:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330402902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.1330402902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.3211359359 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 225197832 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:33:13 AM UTC 24 |
| Finished | Sep 11 08:33:16 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211359359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.3211359359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.1360583138 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 3978071511 ps |
| CPU time | 28.92 seconds |
| Started | Sep 11 08:33:11 AM UTC 24 |
| Finished | Sep 11 08:33:41 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1360583138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.1360583138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.1418755665 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 14326210640 ps |
| CPU time | 111.75 seconds |
| Started | Sep 11 08:33:13 AM UTC 24 |
| Finished | Sep 11 08:35:07 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1418755665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.1418755665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.1187525769 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 156297106 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:33:13 AM UTC 24 |
| Finished | Sep 11 08:33:16 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187525769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.1187525769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.1691178128 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 26348341804 ps |
| CPU time | 48.78 seconds |
| Started | Sep 11 08:33:13 AM UTC 24 |
| Finished | Sep 11 08:34:04 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1691178128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.1691178128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.1543474394 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 6189572575 ps |
| CPU time | 10.76 seconds |
| Started | Sep 11 08:33:13 AM UTC 24 |
| Finished | Sep 11 08:33:25 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543474394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_link_suspend.1543474394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.4175530866 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 3804831913 ps |
| CPU time | 35.02 seconds |
| Started | Sep 11 08:33:13 AM UTC 24 |
| Finished | Sep 11 08:33:50 AM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175530866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.4175530866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.1034597182 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 2645412143 ps |
| CPU time | 76.17 seconds |
| Started | Sep 11 08:33:13 AM UTC 24 |
| Finished | Sep 11 08:34:32 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1034597182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.1034597182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.165739574 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 284671528 ps |
| CPU time | 1.94 seconds |
| Started | Sep 11 08:33:15 AM UTC 24 |
| Finished | Sep 11 08:33:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=165739574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.165739574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.2778841594 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 212247642 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:33:15 AM UTC 24 |
| Finished | Sep 11 08:33:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778841594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.2778841594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.2363304656 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 2208909700 ps |
| CPU time | 58.13 seconds |
| Started | Sep 11 08:33:15 AM UTC 24 |
| Finished | Sep 11 08:34:15 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363304656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.2363304656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.2353843448 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 156188029 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:33:15 AM UTC 24 |
| Finished | Sep 11 08:33:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353843448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.2353843448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.2629119489 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 157974904 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:33:16 AM UTC 24 |
| Finished | Sep 11 08:33:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2629119489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.2629119489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.1669609653 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 212032792 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:33:16 AM UTC 24 |
| Finished | Sep 11 08:33:18 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669609653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_nak_trans.1669609653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.1064654533 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 170907441 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:33:16 AM UTC 24 |
| Finished | Sep 11 08:33:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064654533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_iso.1064654533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.2419004310 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 168060300 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:33:16 AM UTC 24 |
| Finished | Sep 11 08:33:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419004310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_out_stall.2419004310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.411569650 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 204442482 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:33:17 AM UTC 24 |
| Finished | Sep 11 08:33:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=411569650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_out_trans_nak.411569650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.3112438673 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 153940819 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:33:17 AM UTC 24 |
| Finished | Sep 11 08:33:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3112438673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_pending_in_trans.3112438673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.4176548328 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 214064014 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:33:17 AM UTC 24 |
| Finished | Sep 11 08:33:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4176548328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.4176548328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.2771371010 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 147922347 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:33:17 AM UTC 24 |
| Finished | Sep 11 08:33:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771371010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.2771371010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.2930066634 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 41969480 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:33:17 AM UTC 24 |
| Finished | Sep 11 08:33:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2930066634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.2930066634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.4011945560 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 16466839185 ps |
| CPU time | 55.06 seconds |
| Started | Sep 11 08:33:19 AM UTC 24 |
| Finished | Sep 11 08:34:16 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011945560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_pkt_buffer.4011945560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.3670694514 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 178102272 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:33:19 AM UTC 24 |
| Finished | Sep 11 08:33:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670694514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.3670694514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.1323049249 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 201632417 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:33:19 AM UTC 24 |
| Finished | Sep 11 08:33:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323049249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_pkt_sent.1323049249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.2359316200 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 187599023 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:33:19 AM UTC 24 |
| Finished | Sep 11 08:33:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359316200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_random_length_in_transaction.2359316200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.4040337235 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 169114409 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:33:19 AM UTC 24 |
| Finished | Sep 11 08:33:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040337235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.4040337235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.1198146530 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 142657739 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:33:19 AM UTC 24 |
| Finished | Sep 11 08:33:22 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198146530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.1198146530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.566313297 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 307605779 ps |
| CPU time | 2.1 seconds |
| Started | Sep 11 08:33:19 AM UTC 24 |
| Finished | Sep 11 08:33:23 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=566313297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_rx_full.566313297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.2898880620 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 167334051 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:33:19 AM UTC 24 |
| Finished | Sep 11 08:33:22 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898880620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.2898880620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.1502739938 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 145287320 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:33:19 AM UTC 24 |
| Finished | Sep 11 08:33:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1502739938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.1502739938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.2266290983 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 192166051 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:33:20 AM UTC 24 |
| Finished | Sep 11 08:33:22 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266290983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.2266290983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.1361460907 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 2500541893 ps |
| CPU time | 19.39 seconds |
| Started | Sep 11 08:33:21 AM UTC 24 |
| Finished | Sep 11 08:33:42 AM UTC 24 |
| Peak memory | 234304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361460907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.1361460907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.2416789841 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 180086588 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:33:21 AM UTC 24 |
| Finished | Sep 11 08:33:24 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416789841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.2416789841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.676131015 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 162698054 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:33:21 AM UTC 24 |
| Finished | Sep 11 08:33:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=676131015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_stall_trans.676131015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.3184988422 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 495696777 ps |
| CPU time | 2.99 seconds |
| Started | Sep 11 08:33:21 AM UTC 24 |
| Finished | Sep 11 08:33:25 AM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184988422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.3184988422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.1809693501 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 3023977700 ps |
| CPU time | 80.37 seconds |
| Started | Sep 11 08:33:21 AM UTC 24 |
| Finished | Sep 11 08:34:44 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1809693501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.1809693501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.3271254629 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 280504054 ps |
| CPU time | 4.41 seconds |
| Started | Sep 11 08:33:09 AM UTC 24 |
| Finished | Sep 11 08:33:15 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3271254629 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.3271254629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.2660335086 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 636482011 ps |
| CPU time | 2.32 seconds |
| Started | Sep 11 08:33:21 AM UTC 24 |
| Finished | Sep 11 08:33:25 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2660335086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_t x_rx_disruption.2660335086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.3647225519 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 503843151 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3647225519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_ tx_rx_disruption.3647225519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.405016165 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 451250263 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=405016165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_t x_rx_disruption.405016165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.3548436482 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 560672500 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3548436482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.3548436482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.189702882 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 589871507 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=189702882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_t x_rx_disruption.189702882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.1384292762 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 563088737 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1384292762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.1384292762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.2430367320 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 649181642 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2430367320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.2430367320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.320312964 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 581517523 ps |
| CPU time | 1.84 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=320312964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_t x_rx_disruption.320312964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.3033516701 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 468935424 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3033516701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.3033516701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.779824730 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 635176955 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=779824730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_t x_rx_disruption.779824730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.2802739657 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 458371339 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2802739657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.2802739657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.2663894907 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 35483289 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:33:36 AM UTC 24 |
| Finished | Sep 11 08:33:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663894907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.2663894907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.1389829305 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 3829319389 ps |
| CPU time | 6.13 seconds |
| Started | Sep 11 08:33:23 AM UTC 24 |
| Finished | Sep 11 08:33:30 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389829305 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.1389829305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.98380290 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 21157867332 ps |
| CPU time | 30.27 seconds |
| Started | Sep 11 08:33:23 AM UTC 24 |
| Finished | Sep 11 08:33:55 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=98380290 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.98380290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.683685418 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 25322665996 ps |
| CPU time | 38.87 seconds |
| Started | Sep 11 08:33:23 AM UTC 24 |
| Finished | Sep 11 08:34:04 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=683685418 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.683685418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.1871369357 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 165332948 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:33:24 AM UTC 24 |
| Finished | Sep 11 08:33:26 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871369357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.1871369357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.3166611725 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 137841887 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:33:24 AM UTC 24 |
| Finished | Sep 11 08:33:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166611725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_bitstuff_err.3166611725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.1461200867 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 429687569 ps |
| CPU time | 2.29 seconds |
| Started | Sep 11 08:33:24 AM UTC 24 |
| Finished | Sep 11 08:33:27 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461200867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.1461200867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.2658675005 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 1106615693 ps |
| CPU time | 3.43 seconds |
| Started | Sep 11 08:33:24 AM UTC 24 |
| Finished | Sep 11 08:33:28 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2658675005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.2658675005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.1807569963 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 42422361046 ps |
| CPU time | 90.93 seconds |
| Started | Sep 11 08:33:24 AM UTC 24 |
| Finished | Sep 11 08:34:57 AM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807569963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.1807569963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.771933540 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 146381709 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:33:24 AM UTC 24 |
| Finished | Sep 11 08:33:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=771933540 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.771933540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.833142576 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 1022414861 ps |
| CPU time | 4.27 seconds |
| Started | Sep 11 08:33:25 AM UTC 24 |
| Finished | Sep 11 08:33:31 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=833142576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_disable_endpoint.833142576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.3506810500 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 160339443 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:33:25 AM UTC 24 |
| Finished | Sep 11 08:33:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506810500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.3506810500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_enable.2796941663 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 52346247 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:33:25 AM UTC 24 |
| Finished | Sep 11 08:33:28 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2796941663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_enable.2796941663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.1998767965 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 853232826 ps |
| CPU time | 3.04 seconds |
| Started | Sep 11 08:33:26 AM UTC 24 |
| Finished | Sep 11 08:33:30 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998767965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.1998767965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.3891071898 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 258125808 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:33:26 AM UTC 24 |
| Finished | Sep 11 08:33:28 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891071898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_fifo_levels.3891071898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.10864206 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 432787810 ps |
| CPU time | 2.76 seconds |
| Started | Sep 11 08:33:27 AM UTC 24 |
| Finished | Sep 11 08:33:31 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=10864206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_fifo_rst.10864206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.1829099057 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 173272554 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:33:27 AM UTC 24 |
| Finished | Sep 11 08:33:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1829099057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.1829099057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.3764081703 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 150777881 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:33:27 AM UTC 24 |
| Finished | Sep 11 08:33:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764081703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_stall.3764081703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.1927766842 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 214335877 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:33:27 AM UTC 24 |
| Finished | Sep 11 08:33:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927766842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.1927766842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.1072433802 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 4187107671 ps |
| CPU time | 48.11 seconds |
| Started | Sep 11 08:33:27 AM UTC 24 |
| Finished | Sep 11 08:34:17 AM UTC 24 |
| Peak memory | 233888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072433802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.1072433802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.2769186724 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 6866019344 ps |
| CPU time | 79.65 seconds |
| Started | Sep 11 08:33:27 AM UTC 24 |
| Finished | Sep 11 08:34:49 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769186724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.2769186724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.2513951577 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 192967653 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:33:27 AM UTC 24 |
| Finished | Sep 11 08:33:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513951577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.2513951577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.2416980889 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 10270919624 ps |
| CPU time | 18.63 seconds |
| Started | Sep 11 08:33:27 AM UTC 24 |
| Finished | Sep 11 08:33:47 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416980889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_resume.2416980889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.3065020679 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 8706377276 ps |
| CPU time | 13.35 seconds |
| Started | Sep 11 08:33:27 AM UTC 24 |
| Finished | Sep 11 08:33:42 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3065020679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_link_suspend.3065020679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.1381702334 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 3749393791 ps |
| CPU time | 27.97 seconds |
| Started | Sep 11 08:33:27 AM UTC 24 |
| Finished | Sep 11 08:33:57 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381702334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.1381702334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.963098093 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 2866936145 ps |
| CPU time | 75.22 seconds |
| Started | Sep 11 08:33:29 AM UTC 24 |
| Finished | Sep 11 08:34:46 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=963098093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.963098093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.3423603071 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 257884277 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:33:29 AM UTC 24 |
| Finished | Sep 11 08:33:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423603071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.3423603071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.3410306774 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 185611576 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:33:29 AM UTC 24 |
| Finished | Sep 11 08:33:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410306774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.3410306774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.2491439611 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 2169238755 ps |
| CPU time | 61.21 seconds |
| Started | Sep 11 08:33:29 AM UTC 24 |
| Finished | Sep 11 08:34:32 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491439611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.2491439611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.3200160500 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 161735146 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:33:29 AM UTC 24 |
| Finished | Sep 11 08:33:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3200160500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.3200160500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.702384279 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 137584042 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:33:30 AM UTC 24 |
| Finished | Sep 11 08:33:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=702384279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.702384279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.3732565737 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 234685499 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:33:30 AM UTC 24 |
| Finished | Sep 11 08:33:34 AM UTC 24 |
| Peak memory | 216624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732565737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.3732565737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.3821182384 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 173785426 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:33:30 AM UTC 24 |
| Finished | Sep 11 08:33:34 AM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821182384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_out_iso.3821182384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.218008791 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 170389233 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:33:30 AM UTC 24 |
| Finished | Sep 11 08:33:34 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=218008791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_out_stall.218008791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.461744887 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 181102953 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:33:31 AM UTC 24 |
| Finished | Sep 11 08:33:33 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=461744887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_out_trans_nak.461744887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.3921583072 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 148777724 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:33:31 AM UTC 24 |
| Finished | Sep 11 08:33:34 AM UTC 24 |
| Peak memory | 214784 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921583072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_pending_in_trans.3921583072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.710955201 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 226961821 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:33:31 AM UTC 24 |
| Finished | Sep 11 08:33:34 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=710955201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.710955201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.617281302 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 171649233 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:33:32 AM UTC 24 |
| Finished | Sep 11 08:33:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=617281302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.617281302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.455216633 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 34077613 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:33:32 AM UTC 24 |
| Finished | Sep 11 08:33:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=455216633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_phy_pins_sense.455216633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.1843380217 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 13688901660 ps |
| CPU time | 37.32 seconds |
| Started | Sep 11 08:33:32 AM UTC 24 |
| Finished | Sep 11 08:34:11 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843380217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.1843380217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.2223176108 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 188561260 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:33:32 AM UTC 24 |
| Finished | Sep 11 08:33:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223176108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.2223176108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.1396760784 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 261448669 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:33:33 AM UTC 24 |
| Finished | Sep 11 08:33:35 AM UTC 24 |
| Peak memory | 214748 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396760784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_pkt_sent.1396760784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.1000706537 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 222304035 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:33:33 AM UTC 24 |
| Finished | Sep 11 08:33:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1000706537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_random_length_in_transaction.1000706537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.428238544 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 161976871 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:33:33 AM UTC 24 |
| Finished | Sep 11 08:33:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=428238544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.428238544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.1711509368 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 155663115 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:33:33 AM UTC 24 |
| Finished | Sep 11 08:33:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711509368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.1711509368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.622080456 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 396991880 ps |
| CPU time | 2.5 seconds |
| Started | Sep 11 08:33:34 AM UTC 24 |
| Finished | Sep 11 08:33:38 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=622080456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_rx_full.622080456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.3135108582 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 154924712 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:33:34 AM UTC 24 |
| Finished | Sep 11 08:33:37 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135108582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_setup_stage.3135108582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.3589432301 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 157856822 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:33:34 AM UTC 24 |
| Finished | Sep 11 08:33:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589432301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 43.usbdev_setup_trans_ignored.3589432301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.2083174275 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 199149382 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:33:35 AM UTC 24 |
| Finished | Sep 11 08:33:37 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2083174275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.2083174275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.1214500616 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 3145189568 ps |
| CPU time | 90.47 seconds |
| Started | Sep 11 08:33:35 AM UTC 24 |
| Finished | Sep 11 08:35:08 AM UTC 24 |
| Peak memory | 234136 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214500616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.1214500616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.273935448 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 156348906 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:33:35 AM UTC 24 |
| Finished | Sep 11 08:33:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=273935448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.273935448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.3281309513 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 203205249 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:33:35 AM UTC 24 |
| Finished | Sep 11 08:33:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3281309513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_stall_trans.3281309513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.329638208 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 1280282988 ps |
| CPU time | 3.75 seconds |
| Started | Sep 11 08:33:35 AM UTC 24 |
| Finished | Sep 11 08:33:40 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=329638208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_stream_len_max.329638208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.461826494 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 3139261368 ps |
| CPU time | 90.09 seconds |
| Started | Sep 11 08:33:35 AM UTC 24 |
| Finished | Sep 11 08:35:07 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=461826494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_streaming_out.461826494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.2054535142 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 338220769 ps |
| CPU time | 4.97 seconds |
| Started | Sep 11 08:33:24 AM UTC 24 |
| Finished | Sep 11 08:33:30 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2054535142 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.2054535142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.3815943391 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 498088573 ps |
| CPU time | 3.07 seconds |
| Started | Sep 11 08:33:36 AM UTC 24 |
| Finished | Sep 11 08:33:41 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3815943391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_t x_rx_disruption.3815943391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.401820411 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 479024739 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=401820411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_t x_rx_disruption.401820411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.2082648655 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 550215218 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2082648655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_ tx_rx_disruption.2082648655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.1371501302 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 462890993 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1371501302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_ tx_rx_disruption.1371501302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.1662993791 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 491346917 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1662993791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.1662993791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.1229366268 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 501248410 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1229366268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_ tx_rx_disruption.1229366268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.2692056002 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 604448098 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:37:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2692056002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.2692056002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.4145669366 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 524140155 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 216588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4145669366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_ tx_rx_disruption.4145669366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.2566124318 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 538518672 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2566124318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.2566124318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.2752302356 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 462803380 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2752302356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_ tx_rx_disruption.2752302356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.2350138505 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 576222634 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2350138505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.2350138505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.2426690614 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 48975535 ps |
| CPU time | 0.93 seconds |
| Started | Sep 11 08:33:55 AM UTC 24 |
| Finished | Sep 11 08:33:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426690614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.2426690614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.4210738620 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 9187350510 ps |
| CPU time | 16.2 seconds |
| Started | Sep 11 08:33:36 AM UTC 24 |
| Finished | Sep 11 08:33:54 AM UTC 24 |
| Peak memory | 217412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210738620 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.4210738620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.683352845 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 13774641025 ps |
| CPU time | 21.76 seconds |
| Started | Sep 11 08:33:36 AM UTC 24 |
| Finished | Sep 11 08:34:00 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=683352845 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.683352845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.274069785 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 31014607143 ps |
| CPU time | 43.03 seconds |
| Started | Sep 11 08:33:36 AM UTC 24 |
| Finished | Sep 11 08:34:21 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=274069785 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.274069785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.1536801758 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 153584460 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:33:37 AM UTC 24 |
| Finished | Sep 11 08:33:39 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536801758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.1536801758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.2076826097 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 194872790 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:33:38 AM UTC 24 |
| Finished | Sep 11 08:33:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2076826097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_bitstuff_err.2076826097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.1914910902 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 509813737 ps |
| CPU time | 2.94 seconds |
| Started | Sep 11 08:33:38 AM UTC 24 |
| Finished | Sep 11 08:33:42 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1914910902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 44.usbdev_data_toggle_clear.1914910902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.4255904288 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 357469567 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:33:38 AM UTC 24 |
| Finished | Sep 11 08:33:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4255904288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.4255904288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.3499090286 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 21383095223 ps |
| CPU time | 47.13 seconds |
| Started | Sep 11 08:33:39 AM UTC 24 |
| Finished | Sep 11 08:34:28 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499090286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.3499090286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.1945725132 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 1266803981 ps |
| CPU time | 25.95 seconds |
| Started | Sep 11 08:33:39 AM UTC 24 |
| Finished | Sep 11 08:34:07 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1945725132 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.1945725132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.826040704 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 567274609 ps |
| CPU time | 3.03 seconds |
| Started | Sep 11 08:33:39 AM UTC 24 |
| Finished | Sep 11 08:33:43 AM UTC 24 |
| Peak memory | 216932 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=826040704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_disable_endpoint.826040704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.2703002830 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 192086899 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:33:39 AM UTC 24 |
| Finished | Sep 11 08:33:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2703002830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.2703002830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_enable.1281991605 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 34935965 ps |
| CPU time | 0.84 seconds |
| Started | Sep 11 08:33:41 AM UTC 24 |
| Finished | Sep 11 08:33:42 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281991605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_enable.1281991605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.4037297838 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 911437291 ps |
| CPU time | 2.65 seconds |
| Started | Sep 11 08:33:41 AM UTC 24 |
| Finished | Sep 11 08:33:44 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037297838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.4037297838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.4257023999 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 516785439 ps |
| CPU time | 2.17 seconds |
| Started | Sep 11 08:33:42 AM UTC 24 |
| Finished | Sep 11 08:33:45 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4257023999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.4257023999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.3637206773 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 254020972 ps |
| CPU time | 2.38 seconds |
| Started | Sep 11 08:33:42 AM UTC 24 |
| Finished | Sep 11 08:33:46 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637206773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_fifo_rst.3637206773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.1695045970 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 181674537 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:33:42 AM UTC 24 |
| Finished | Sep 11 08:33:44 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1695045970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.1695045970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.333375713 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 215216130 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:33:43 AM UTC 24 |
| Finished | Sep 11 08:33:46 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=333375713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_in_stall.333375713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.3532945258 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 205725058 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:33:44 AM UTC 24 |
| Finished | Sep 11 08:33:46 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532945258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.3532945258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.1315453358 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 4115679501 ps |
| CPU time | 114.26 seconds |
| Started | Sep 11 08:33:42 AM UTC 24 |
| Finished | Sep 11 08:35:39 AM UTC 24 |
| Peak memory | 227680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315453358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.1315453358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.432899016 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 12438381565 ps |
| CPU time | 95.13 seconds |
| Started | Sep 11 08:33:44 AM UTC 24 |
| Finished | Sep 11 08:35:21 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=432899016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.432899016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.3941465723 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 258269826 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:33:44 AM UTC 24 |
| Finished | Sep 11 08:33:46 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941465723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.3941465723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.1525460525 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 32777906832 ps |
| CPU time | 49.96 seconds |
| Started | Sep 11 08:33:45 AM UTC 24 |
| Finished | Sep 11 08:34:36 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525460525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.1525460525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.4098668460 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 11074997195 ps |
| CPU time | 16.28 seconds |
| Started | Sep 11 08:33:45 AM UTC 24 |
| Finished | Sep 11 08:34:02 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098668460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_link_suspend.4098668460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.48116925 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 5116011096 ps |
| CPU time | 37.87 seconds |
| Started | Sep 11 08:33:45 AM UTC 24 |
| Finished | Sep 11 08:34:24 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=48116925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.48116925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.2893044660 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 1882469531 ps |
| CPU time | 15.19 seconds |
| Started | Sep 11 08:33:47 AM UTC 24 |
| Finished | Sep 11 08:34:03 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893044660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.2893044660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.3210506613 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 271912364 ps |
| CPU time | 1.85 seconds |
| Started | Sep 11 08:33:47 AM UTC 24 |
| Finished | Sep 11 08:33:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210506613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.3210506613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.686010153 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 194692458 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:33:47 AM UTC 24 |
| Finished | Sep 11 08:33:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=686010153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.686010153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.901371664 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 2655885431 ps |
| CPU time | 72.36 seconds |
| Started | Sep 11 08:33:47 AM UTC 24 |
| Finished | Sep 11 08:35:01 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=901371664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.901371664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.178556159 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 180499330 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:33:47 AM UTC 24 |
| Finished | Sep 11 08:33:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=178556159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.178556159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.754530672 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 149108033 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:33:47 AM UTC 24 |
| Finished | Sep 11 08:33:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754530672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.754530672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.1044548887 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 217001727 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:33:47 AM UTC 24 |
| Finished | Sep 11 08:33:50 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1044548887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_nak_trans.1044548887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.965008903 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 223067482 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:33:47 AM UTC 24 |
| Finished | Sep 11 08:33:50 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=965008903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_out_iso.965008903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.1192280680 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 170277310 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:33:49 AM UTC 24 |
| Finished | Sep 11 08:33:52 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192280680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.1192280680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.2626266693 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 148889682 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:33:49 AM UTC 24 |
| Finished | Sep 11 08:33:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2626266693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.2626266693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.2041399607 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 152231557 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:33:49 AM UTC 24 |
| Finished | Sep 11 08:33:51 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041399607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.2041399607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.2262655211 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 238606035 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:33:49 AM UTC 24 |
| Finished | Sep 11 08:33:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262655211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.2262655211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.866072085 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 141328890 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:33:51 AM UTC 24 |
| Finished | Sep 11 08:33:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866072085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.866072085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.1941669455 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 68944126 ps |
| CPU time | 0.94 seconds |
| Started | Sep 11 08:33:51 AM UTC 24 |
| Finished | Sep 11 08:33:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941669455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.1941669455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.1218910252 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 10583395376 ps |
| CPU time | 27.02 seconds |
| Started | Sep 11 08:33:51 AM UTC 24 |
| Finished | Sep 11 08:34:19 AM UTC 24 |
| Peak memory | 227576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218910252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.1218910252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.1630343546 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 198807298 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:33:51 AM UTC 24 |
| Finished | Sep 11 08:33:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1630343546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.1630343546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.913680291 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 180221410 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:33:51 AM UTC 24 |
| Finished | Sep 11 08:33:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=913680291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_pkt_sent.913680291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.3580215021 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 254088906 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:33:51 AM UTC 24 |
| Finished | Sep 11 08:33:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580215021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_random_length_in_transaction.3580215021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.1431170943 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 197486361 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:33:51 AM UTC 24 |
| Finished | Sep 11 08:33:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431170943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.1431170943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.2182130281 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 150702396 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:33:51 AM UTC 24 |
| Finished | Sep 11 08:33:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182130281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.2182130281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.3522193816 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 268209133 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:33:53 AM UTC 24 |
| Finished | Sep 11 08:33:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3522193816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.3522193816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.2796544490 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 152092416 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:33:53 AM UTC 24 |
| Finished | Sep 11 08:33:56 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2796544490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.2796544490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.4164650993 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 163178768 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:33:53 AM UTC 24 |
| Finished | Sep 11 08:33:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164650993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.4164650993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.4262274569 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 275095981 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:33:53 AM UTC 24 |
| Finished | Sep 11 08:33:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262274569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.4262274569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.2555891399 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 2769557807 ps |
| CPU time | 23.85 seconds |
| Started | Sep 11 08:33:53 AM UTC 24 |
| Finished | Sep 11 08:34:18 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555891399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.2555891399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.6944011 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 152710701 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:33:53 AM UTC 24 |
| Finished | Sep 11 08:33:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6944011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -c m_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.6944011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.1476584231 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 194458469 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:33:53 AM UTC 24 |
| Finished | Sep 11 08:33:55 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1476584231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.1476584231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.3748682749 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 454223474 ps |
| CPU time | 1.8 seconds |
| Started | Sep 11 08:33:54 AM UTC 24 |
| Finished | Sep 11 08:33:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748682749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.3748682749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.457138660 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 2778847784 ps |
| CPU time | 20.24 seconds |
| Started | Sep 11 08:33:53 AM UTC 24 |
| Finished | Sep 11 08:34:15 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=457138660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_streaming_out.457138660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.769759272 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 2226725058 ps |
| CPU time | 13.8 seconds |
| Started | Sep 11 08:33:39 AM UTC 24 |
| Finished | Sep 11 08:33:54 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=769759272 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.769759272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.1286805468 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 494197249 ps |
| CPU time | 2.49 seconds |
| Started | Sep 11 08:33:55 AM UTC 24 |
| Finished | Sep 11 08:33:58 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1286805468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.1286805468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.3419065046 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 555365239 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3419065046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.3419065046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.385017005 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 490657804 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=385017005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_t x_rx_disruption.385017005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.2832250179 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 516233399 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:37:45 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2832250179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_ tx_rx_disruption.2832250179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.4147732887 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 605412003 ps |
| CPU time | 1.8 seconds |
| Started | Sep 11 08:37:46 AM UTC 24 |
| Finished | Sep 11 08:38:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4147732887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_ tx_rx_disruption.4147732887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.2431121052 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 486486563 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:37:46 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2431121052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_ tx_rx_disruption.2431121052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.75676741 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 487948034 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:37:46 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=75676741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_tx _rx_disruption.75676741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.3664078578 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 519897919 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:37:46 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3664078578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.3664078578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.2665924601 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 621122883 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:37:46 AM UTC 24 |
| Finished | Sep 11 08:37:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2665924601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.2665924601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.676706877 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 573273495 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:37:46 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=676706877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_t x_rx_disruption.676706877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.3758534701 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 621440796 ps |
| CPU time | 1.84 seconds |
| Started | Sep 11 08:37:46 AM UTC 24 |
| Finished | Sep 11 08:37:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3758534701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.3758534701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.3565347595 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 36286593 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:34:10 AM UTC 24 |
| Finished | Sep 11 08:34:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3565347595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.3565347595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.2246476591 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 9571139583 ps |
| CPU time | 14.49 seconds |
| Started | Sep 11 08:33:55 AM UTC 24 |
| Finished | Sep 11 08:34:11 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246476591 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.2246476591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.68469216 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 14204609045 ps |
| CPU time | 19.3 seconds |
| Started | Sep 11 08:33:55 AM UTC 24 |
| Finished | Sep 11 08:34:15 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=68469216 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.68469216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.178886761 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 23966615819 ps |
| CPU time | 41.34 seconds |
| Started | Sep 11 08:33:55 AM UTC 24 |
| Finished | Sep 11 08:34:38 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=178886761 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.178886761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.108262019 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 221758856 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:33:57 AM UTC 24 |
| Finished | Sep 11 08:33:59 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108262019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_av_buffer.108262019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.172240934 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 136923797 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:33:57 AM UTC 24 |
| Finished | Sep 11 08:33:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172240934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_bitstuff_err.172240934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.1633377882 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 312602791 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:33:57 AM UTC 24 |
| Finished | Sep 11 08:34:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633377882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.1633377882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.3226812290 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 705553886 ps |
| CPU time | 3.75 seconds |
| Started | Sep 11 08:33:57 AM UTC 24 |
| Finished | Sep 11 08:34:02 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226812290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.3226812290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.3240761725 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 46352815817 ps |
| CPU time | 96.56 seconds |
| Started | Sep 11 08:33:57 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240761725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_address.3240761725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.3311862843 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 1566715725 ps |
| CPU time | 13.24 seconds |
| Started | Sep 11 08:33:57 AM UTC 24 |
| Finished | Sep 11 08:34:11 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3311862843 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.3311862843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.762674985 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 836817444 ps |
| CPU time | 3.59 seconds |
| Started | Sep 11 08:33:57 AM UTC 24 |
| Finished | Sep 11 08:34:02 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762674985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_disable_endpoint.762674985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.4099580852 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 148795171 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:33:57 AM UTC 24 |
| Finished | Sep 11 08:33:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4099580852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_disconnected.4099580852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_enable.1247624272 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 58080035 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:33:57 AM UTC 24 |
| Finished | Sep 11 08:33:59 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247624272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_enable.1247624272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.2417999069 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 1007068637 ps |
| CPU time | 4.42 seconds |
| Started | Sep 11 08:33:58 AM UTC 24 |
| Finished | Sep 11 08:34:04 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417999069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.2417999069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.2847944241 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 671331098 ps |
| CPU time | 3.13 seconds |
| Started | Sep 11 08:33:58 AM UTC 24 |
| Finished | Sep 11 08:34:03 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847944241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.2847944241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.3429182464 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 281961340 ps |
| CPU time | 2.85 seconds |
| Started | Sep 11 08:33:58 AM UTC 24 |
| Finished | Sep 11 08:34:03 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429182464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.3429182464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.2968140201 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 203257631 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:34:00 AM UTC 24 |
| Finished | Sep 11 08:34:03 AM UTC 24 |
| Peak memory | 227348 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968140201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.2968140201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.1823263098 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 181249485 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:34:00 AM UTC 24 |
| Finished | Sep 11 08:34:03 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823263098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.1823263098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.1889606911 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 169500303 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:34:00 AM UTC 24 |
| Finished | Sep 11 08:34:03 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889606911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.1889606911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.3498339180 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 3995911392 ps |
| CPU time | 45.35 seconds |
| Started | Sep 11 08:34:00 AM UTC 24 |
| Finished | Sep 11 08:34:47 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3498339180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.3498339180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.3131485670 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 3995869175 ps |
| CPU time | 45.71 seconds |
| Started | Sep 11 08:34:00 AM UTC 24 |
| Finished | Sep 11 08:34:48 AM UTC 24 |
| Peak memory | 217396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131485670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.3131485670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.49736333 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 227534512 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:34:00 AM UTC 24 |
| Finished | Sep 11 08:34:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=49736333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_link_in_err.49736333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.1605590273 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 5611332874 ps |
| CPU time | 16.68 seconds |
| Started | Sep 11 08:34:00 AM UTC 24 |
| Finished | Sep 11 08:34:18 AM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605590273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_resume.1605590273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.1396190169 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 5001253201 ps |
| CPU time | 7.6 seconds |
| Started | Sep 11 08:34:02 AM UTC 24 |
| Finished | Sep 11 08:34:10 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396190169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.1396190169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.768645734 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 3075047354 ps |
| CPU time | 31.84 seconds |
| Started | Sep 11 08:34:02 AM UTC 24 |
| Finished | Sep 11 08:34:35 AM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=768645734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.768645734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.1155317319 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 4258378536 ps |
| CPU time | 40.52 seconds |
| Started | Sep 11 08:34:03 AM UTC 24 |
| Finished | Sep 11 08:34:45 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155317319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.1155317319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.4287922022 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 265197588 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:34:03 AM UTC 24 |
| Finished | Sep 11 08:34:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287922022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.4287922022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.2554291185 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 191662864 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:34:03 AM UTC 24 |
| Finished | Sep 11 08:34:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554291185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.2554291185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.3981015634 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 2610442980 ps |
| CPU time | 19.45 seconds |
| Started | Sep 11 08:34:03 AM UTC 24 |
| Finished | Sep 11 08:34:24 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981015634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.3981015634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.4044580405 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 164134121 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:34:03 AM UTC 24 |
| Finished | Sep 11 08:34:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044580405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.4044580405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.3172426798 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 147172131 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:34:03 AM UTC 24 |
| Finished | Sep 11 08:34:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3172426798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.3172426798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.2278289672 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 172972852 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:34:03 AM UTC 24 |
| Finished | Sep 11 08:34:06 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278289672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_nak_trans.2278289672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.1573107994 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 158972270 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:34:04 AM UTC 24 |
| Finished | Sep 11 08:34:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573107994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.1573107994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.986164237 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 236845326 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:34:05 AM UTC 24 |
| Finished | Sep 11 08:34:08 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=986164237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_out_stall.986164237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.3667237315 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 215758578 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:34:05 AM UTC 24 |
| Finished | Sep 11 08:34:07 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3667237315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.3667237315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.3992924915 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 153066531 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:34:05 AM UTC 24 |
| Finished | Sep 11 08:34:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992924915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.3992924915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.790306901 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 230839944 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:34:05 AM UTC 24 |
| Finished | Sep 11 08:34:08 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=790306901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.790306901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.545588992 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 139611565 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:34:05 AM UTC 24 |
| Finished | Sep 11 08:34:08 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=545588992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.545588992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.3069492126 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 40712311 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:34:06 AM UTC 24 |
| Finished | Sep 11 08:34:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069492126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.3069492126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.731356378 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 17590578358 ps |
| CPU time | 48.76 seconds |
| Started | Sep 11 08:34:06 AM UTC 24 |
| Finished | Sep 11 08:34:56 AM UTC 24 |
| Peak memory | 227644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=731356378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_pkt_buffer.731356378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.3902624308 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 177170175 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:34:07 AM UTC 24 |
| Finished | Sep 11 08:34:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3902624308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.3902624308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.3102811865 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 202404283 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:34:07 AM UTC 24 |
| Finished | Sep 11 08:34:09 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3102811865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.3102811865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.2561774272 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 223419409 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:34:07 AM UTC 24 |
| Finished | Sep 11 08:34:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561774272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_random_length_in_transaction.2561774272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.261708916 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 183545507 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:34:07 AM UTC 24 |
| Finished | Sep 11 08:34:09 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=261708916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.261708916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.1954453257 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 163222284 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:34:07 AM UTC 24 |
| Finished | Sep 11 08:34:10 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954453257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.1954453257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.209933030 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 253746219 ps |
| CPU time | 1.93 seconds |
| Started | Sep 11 08:34:07 AM UTC 24 |
| Finished | Sep 11 08:34:10 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=209933030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_rx_full.209933030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.3599633842 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 152117375 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:34:09 AM UTC 24 |
| Finished | Sep 11 08:34:11 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599633842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_setup_stage.3599633842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.3750104037 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 175083016 ps |
| CPU time | 1.3 seconds |
| Started | Sep 11 08:34:09 AM UTC 24 |
| Finished | Sep 11 08:34:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3750104037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.3750104037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.3035039047 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 260755356 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:34:09 AM UTC 24 |
| Finished | Sep 11 08:34:11 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3035039047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.3035039047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.3475495571 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 1878298905 ps |
| CPU time | 14.87 seconds |
| Started | Sep 11 08:34:09 AM UTC 24 |
| Finished | Sep 11 08:34:25 AM UTC 24 |
| Peak memory | 227340 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3475495571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.3475495571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.379475603 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 180154552 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:34:09 AM UTC 24 |
| Finished | Sep 11 08:34:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=379475603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.379475603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.2189520966 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 151621520 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:34:09 AM UTC 24 |
| Finished | Sep 11 08:34:11 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2189520966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_stall_trans.2189520966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.868887710 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 1124267554 ps |
| CPU time | 5.21 seconds |
| Started | Sep 11 08:34:10 AM UTC 24 |
| Finished | Sep 11 08:34:17 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=868887710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_stream_len_max.868887710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.945098376 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 2785259326 ps |
| CPU time | 75.32 seconds |
| Started | Sep 11 08:34:09 AM UTC 24 |
| Finished | Sep 11 08:35:26 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=945098376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_streaming_out.945098376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.3271671761 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 1343295008 ps |
| CPU time | 25.46 seconds |
| Started | Sep 11 08:33:57 AM UTC 24 |
| Finished | Sep 11 08:34:24 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3271671761 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.3271671761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.2100019179 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 550030620 ps |
| CPU time | 2.21 seconds |
| Started | Sep 11 08:34:10 AM UTC 24 |
| Finished | Sep 11 08:34:13 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2100019179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_t x_rx_disruption.2100019179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.954077117 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 518416472 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:37:47 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=954077117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_t x_rx_disruption.954077117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.1451607021 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 512099674 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:37:47 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1451607021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.1451607021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.2651011579 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 468877085 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:37:47 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2651011579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.2651011579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.3813007246 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 611199480 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:37:47 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3813007246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_ tx_rx_disruption.3813007246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.1307030636 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 466133502 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:37:47 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1307030636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.1307030636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.1105701663 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 522047460 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:37:47 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1105701663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_ tx_rx_disruption.1105701663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.2036091060 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 500560085 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:37:47 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2036091060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.2036091060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.693166617 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 507579483 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:37:48 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=693166617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_t x_rx_disruption.693166617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.95126581 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 560465192 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:37:48 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=95126581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_tx _rx_disruption.95126581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.1750182485 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 70690492 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:34:27 AM UTC 24 |
| Finished | Sep 11 08:34:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750182485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.1750182485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.4051560036 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 6641230572 ps |
| CPU time | 10.97 seconds |
| Started | Sep 11 08:34:10 AM UTC 24 |
| Finished | Sep 11 08:34:22 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051560036 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.4051560036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.357724148 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 21174589101 ps |
| CPU time | 34.51 seconds |
| Started | Sep 11 08:34:12 AM UTC 24 |
| Finished | Sep 11 08:34:48 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=357724148 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.357724148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.3200294009 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 29596745997 ps |
| CPU time | 46.04 seconds |
| Started | Sep 11 08:34:12 AM UTC 24 |
| Finished | Sep 11 08:34:59 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3200294009 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.3200294009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.3808811008 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 163571358 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:34:12 AM UTC 24 |
| Finished | Sep 11 08:34:14 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808811008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.3808811008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.2663175721 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 150603554 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:34:12 AM UTC 24 |
| Finished | Sep 11 08:34:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663175721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.2663175721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.3593803717 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 337592167 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:34:12 AM UTC 24 |
| Finished | Sep 11 08:34:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593803717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 46.usbdev_data_toggle_clear.3593803717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.2979707988 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 568464551 ps |
| CPU time | 2.71 seconds |
| Started | Sep 11 08:34:12 AM UTC 24 |
| Finished | Sep 11 08:34:16 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2979707988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.2979707988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.1613231511 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 48616349751 ps |
| CPU time | 90.05 seconds |
| Started | Sep 11 08:34:12 AM UTC 24 |
| Finished | Sep 11 08:35:44 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613231511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.1613231511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.463477079 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 1406012955 ps |
| CPU time | 33.69 seconds |
| Started | Sep 11 08:34:12 AM UTC 24 |
| Finished | Sep 11 08:34:47 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=463477079 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.463477079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.3767180173 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 582639108 ps |
| CPU time | 1.86 seconds |
| Started | Sep 11 08:34:14 AM UTC 24 |
| Finished | Sep 11 08:34:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767180173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.3767180173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.445255556 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 153420845 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:34:14 AM UTC 24 |
| Finished | Sep 11 08:34:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=445255556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_disconnected.445255556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_enable.4071608267 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 28564006 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:34:14 AM UTC 24 |
| Finished | Sep 11 08:34:16 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4071608267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.4071608267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.3525537013 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 900154025 ps |
| CPU time | 3.18 seconds |
| Started | Sep 11 08:34:15 AM UTC 24 |
| Finished | Sep 11 08:34:19 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525537013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.3525537013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.787772691 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 420883006 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:34:15 AM UTC 24 |
| Finished | Sep 11 08:34:18 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=787772691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.787772691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.531119389 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 252428077 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:34:15 AM UTC 24 |
| Finished | Sep 11 08:34:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=531119389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_fifo_levels.531119389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.2041086301 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 412597012 ps |
| CPU time | 4.39 seconds |
| Started | Sep 11 08:34:15 AM UTC 24 |
| Finished | Sep 11 08:34:21 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041086301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.2041086301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.1893850089 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 177753719 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:34:17 AM UTC 24 |
| Finished | Sep 11 08:34:20 AM UTC 24 |
| Peak memory | 227336 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893850089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.1893850089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.2498403183 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 164399522 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:34:18 AM UTC 24 |
| Finished | Sep 11 08:34:20 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2498403183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_stall.2498403183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.4042168944 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 215091057 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:34:18 AM UTC 24 |
| Finished | Sep 11 08:34:20 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4042168944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.4042168944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.3068674017 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 5429510908 ps |
| CPU time | 144.7 seconds |
| Started | Sep 11 08:34:15 AM UTC 24 |
| Finished | Sep 11 08:36:43 AM UTC 24 |
| Peak memory | 230324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068674017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.3068674017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.71778956 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 13518655435 ps |
| CPU time | 159.69 seconds |
| Started | Sep 11 08:34:18 AM UTC 24 |
| Finished | Sep 11 08:37:00 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=71778956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.71778956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.1290430253 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 251936154 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:34:18 AM UTC 24 |
| Finished | Sep 11 08:34:20 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290430253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.1290430253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.629308717 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 32590263113 ps |
| CPU time | 51.35 seconds |
| Started | Sep 11 08:34:18 AM UTC 24 |
| Finished | Sep 11 08:35:11 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=629308717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_link_resume.629308717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.763236454 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 4363978204 ps |
| CPU time | 7.44 seconds |
| Started | Sep 11 08:34:18 AM UTC 24 |
| Finished | Sep 11 08:34:26 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=763236454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_suspend.763236454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.923932383 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 3399328656 ps |
| CPU time | 27.19 seconds |
| Started | Sep 11 08:34:18 AM UTC 24 |
| Finished | Sep 11 08:34:46 AM UTC 24 |
| Peak memory | 229740 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=923932383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.923932383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.832873721 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 3473806244 ps |
| CPU time | 91.96 seconds |
| Started | Sep 11 08:34:19 AM UTC 24 |
| Finished | Sep 11 08:35:53 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=832873721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.832873721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.2154329974 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 252975339 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:34:20 AM UTC 24 |
| Finished | Sep 11 08:34:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154329974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.2154329974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.1263025249 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 224709678 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:34:20 AM UTC 24 |
| Finished | Sep 11 08:34:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263025249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.1263025249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.3598413460 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 2801716037 ps |
| CPU time | 21.54 seconds |
| Started | Sep 11 08:34:20 AM UTC 24 |
| Finished | Sep 11 08:34:42 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598413460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.3598413460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.3672065382 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 151906982 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:34:20 AM UTC 24 |
| Finished | Sep 11 08:34:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672065382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.3672065382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.1243538872 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 185363622 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:34:21 AM UTC 24 |
| Finished | Sep 11 08:34:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243538872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.1243538872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.3001641222 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 178097425 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:34:21 AM UTC 24 |
| Finished | Sep 11 08:34:24 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001641222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.3001641222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.280439152 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 173671186 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:34:22 AM UTC 24 |
| Finished | Sep 11 08:34:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280439152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_out_iso.280439152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.3053340138 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 197013506 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:34:22 AM UTC 24 |
| Finished | Sep 11 08:34:24 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3053340138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.3053340138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.3209518067 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 220157162 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:34:22 AM UTC 24 |
| Finished | Sep 11 08:34:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209518067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.3209518067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.354303571 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 143775491 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:34:22 AM UTC 24 |
| Finished | Sep 11 08:34:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354303571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pending_in_trans.354303571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.2104004491 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 234985375 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:34:23 AM UTC 24 |
| Finished | Sep 11 08:34:26 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104004491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.2104004491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.2743654064 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 175011420 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:34:23 AM UTC 24 |
| Finished | Sep 11 08:34:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2743654064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.2743654064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.798075402 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 53082619 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:34:23 AM UTC 24 |
| Finished | Sep 11 08:34:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=798075402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_phy_pins_sense.798075402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.3517440559 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 15025499992 ps |
| CPU time | 38.56 seconds |
| Started | Sep 11 08:34:23 AM UTC 24 |
| Finished | Sep 11 08:35:03 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517440559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.3517440559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.2470478820 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 189167905 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:34:23 AM UTC 24 |
| Finished | Sep 11 08:34:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470478820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.2470478820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.3013711334 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 216611405 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:34:23 AM UTC 24 |
| Finished | Sep 11 08:34:26 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013711334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.3013711334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.3977869121 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 201801231 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:34:25 AM UTC 24 |
| Finished | Sep 11 08:34:28 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977869121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.3977869121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.2684952378 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 200460436 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:34:25 AM UTC 24 |
| Finished | Sep 11 08:34:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684952378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.2684952378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.1731534188 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 152701266 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:34:25 AM UTC 24 |
| Finished | Sep 11 08:34:28 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1731534188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_rx_crc_err.1731534188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.1737308895 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 344966428 ps |
| CPU time | 1.92 seconds |
| Started | Sep 11 08:34:25 AM UTC 24 |
| Finished | Sep 11 08:34:28 AM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1737308895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.1737308895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.239704892 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 172861951 ps |
| CPU time | 1.02 seconds |
| Started | Sep 11 08:34:25 AM UTC 24 |
| Finished | Sep 11 08:34:27 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=239704892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_setup_stage.239704892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.1027274698 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 150051651 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:34:25 AM UTC 24 |
| Finished | Sep 11 08:34:28 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027274698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.1027274698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.3324974337 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 224832243 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:34:25 AM UTC 24 |
| Finished | Sep 11 08:34:28 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324974337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.3324974337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.493359231 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 3156678114 ps |
| CPU time | 82.54 seconds |
| Started | Sep 11 08:34:25 AM UTC 24 |
| Finished | Sep 11 08:35:50 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=493359231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.493359231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.2760346886 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 223033965 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:34:27 AM UTC 24 |
| Finished | Sep 11 08:34:29 AM UTC 24 |
| Peak memory | 214556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760346886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.2760346886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.1622501213 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 190878607 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:34:27 AM UTC 24 |
| Finished | Sep 11 08:34:29 AM UTC 24 |
| Peak memory | 214720 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622501213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.1622501213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.1092426781 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 444058574 ps |
| CPU time | 2.55 seconds |
| Started | Sep 11 08:34:27 AM UTC 24 |
| Finished | Sep 11 08:34:31 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092426781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.1092426781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.383801869 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 3488942612 ps |
| CPU time | 27.05 seconds |
| Started | Sep 11 08:34:27 AM UTC 24 |
| Finished | Sep 11 08:34:55 AM UTC 24 |
| Peak memory | 229776 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383801869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_streaming_out.383801869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.760272430 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 2948636912 ps |
| CPU time | 23.01 seconds |
| Started | Sep 11 08:34:14 AM UTC 24 |
| Finished | Sep 11 08:34:38 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=760272430 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.760272430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.1015611892 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 458405132 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:34:27 AM UTC 24 |
| Finished | Sep 11 08:34:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1015611892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_t x_rx_disruption.1015611892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.3242020659 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 554797142 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:37:48 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3242020659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.3242020659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.3081061645 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 534416960 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:37:48 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3081061645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.3081061645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.129851484 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 502971078 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:37:48 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=129851484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_t x_rx_disruption.129851484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.3113408822 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 639940285 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:37:48 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3113408822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.3113408822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.3238943370 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 470694727 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:37:48 AM UTC 24 |
| Finished | Sep 11 08:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3238943370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_ tx_rx_disruption.3238943370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.1298235080 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 674063752 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:37:48 AM UTC 24 |
| Finished | Sep 11 08:37:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1298235080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_ tx_rx_disruption.1298235080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.1566204340 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 75573150 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:34:46 AM UTC 24 |
| Finished | Sep 11 08:34:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566204340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.1566204340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.626261447 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 11173759114 ps |
| CPU time | 29.22 seconds |
| Started | Sep 11 08:34:28 AM UTC 24 |
| Finished | Sep 11 08:34:59 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=626261447 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.626261447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.3845408182 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 18380861604 ps |
| CPU time | 24.5 seconds |
| Started | Sep 11 08:34:28 AM UTC 24 |
| Finished | Sep 11 08:34:54 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845408182 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.3845408182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.738606849 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 30542434763 ps |
| CPU time | 47.91 seconds |
| Started | Sep 11 08:34:28 AM UTC 24 |
| Finished | Sep 11 08:35:18 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=738606849 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.738606849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.3121221079 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 215689426 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:34:28 AM UTC 24 |
| Finished | Sep 11 08:34:31 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3121221079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.3121221079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.1670854165 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 156506028 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:34:28 AM UTC 24 |
| Finished | Sep 11 08:34:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670854165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_bitstuff_err.1670854165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.1125042968 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 227004474 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:34:28 AM UTC 24 |
| Finished | Sep 11 08:34:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1125042968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 47.usbdev_data_toggle_clear.1125042968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.2006268572 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 894255218 ps |
| CPU time | 3.97 seconds |
| Started | Sep 11 08:34:30 AM UTC 24 |
| Finished | Sep 11 08:34:35 AM UTC 24 |
| Peak memory | 216804 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2006268572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.2006268572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.2366321198 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 46939983200 ps |
| CPU time | 87.69 seconds |
| Started | Sep 11 08:34:30 AM UTC 24 |
| Finished | Sep 11 08:36:00 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366321198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.2366321198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.2713968786 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 1497309679 ps |
| CPU time | 31.81 seconds |
| Started | Sep 11 08:34:30 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713968786 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.2713968786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.1389223525 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 790028337 ps |
| CPU time | 3.5 seconds |
| Started | Sep 11 08:34:31 AM UTC 24 |
| Finished | Sep 11 08:34:35 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389223525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.1389223525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.1961323774 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 145164386 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:34:31 AM UTC 24 |
| Finished | Sep 11 08:34:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1961323774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.1961323774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_enable.899960129 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 60220316 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:34:31 AM UTC 24 |
| Finished | Sep 11 08:34:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=899960129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_enable.899960129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.2599889271 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 895765896 ps |
| CPU time | 3.51 seconds |
| Started | Sep 11 08:34:32 AM UTC 24 |
| Finished | Sep 11 08:34:37 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599889271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.2599889271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.512214494 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 146557641 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:34:32 AM UTC 24 |
| Finished | Sep 11 08:34:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=512214494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_fifo_levels.512214494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.3093179392 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 279546422 ps |
| CPU time | 2.33 seconds |
| Started | Sep 11 08:34:32 AM UTC 24 |
| Finished | Sep 11 08:34:36 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3093179392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.3093179392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.56732648 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 194362679 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:34:34 AM UTC 24 |
| Finished | Sep 11 08:34:37 AM UTC 24 |
| Peak memory | 227352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56732648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.56732648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.2127518697 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 136311369 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:34:34 AM UTC 24 |
| Finished | Sep 11 08:34:36 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2127518697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.2127518697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.2199807493 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 166742060 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:34:34 AM UTC 24 |
| Finished | Sep 11 08:34:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199807493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_trans.2199807493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.124734175 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 4375663297 ps |
| CPU time | 35.56 seconds |
| Started | Sep 11 08:34:32 AM UTC 24 |
| Finished | Sep 11 08:35:09 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=124734175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.124734175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.2922457417 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 6191972084 ps |
| CPU time | 40.8 seconds |
| Started | Sep 11 08:34:34 AM UTC 24 |
| Finished | Sep 11 08:35:16 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2922457417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.2922457417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.3888447534 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 206088702 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:34:34 AM UTC 24 |
| Finished | Sep 11 08:34:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3888447534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.3888447534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.3254093994 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 32038106526 ps |
| CPU time | 58.88 seconds |
| Started | Sep 11 08:34:35 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254093994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_resume.3254093994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.708295869 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 9193158765 ps |
| CPU time | 17.75 seconds |
| Started | Sep 11 08:34:35 AM UTC 24 |
| Finished | Sep 11 08:34:54 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=708295869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_suspend.708295869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.1420493509 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 4216620387 ps |
| CPU time | 33.62 seconds |
| Started | Sep 11 08:34:37 AM UTC 24 |
| Finished | Sep 11 08:35:12 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1420493509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.1420493509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.243239023 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 2788257327 ps |
| CPU time | 21.19 seconds |
| Started | Sep 11 08:34:37 AM UTC 24 |
| Finished | Sep 11 08:34:59 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=243239023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.243239023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.2654165925 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 238424480 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:34:37 AM UTC 24 |
| Finished | Sep 11 08:34:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654165925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.2654165925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.629147091 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 189134136 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:34:37 AM UTC 24 |
| Finished | Sep 11 08:34:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=629147091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.629147091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.694704142 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 2917776382 ps |
| CPU time | 23.45 seconds |
| Started | Sep 11 08:34:37 AM UTC 24 |
| Finished | Sep 11 08:35:02 AM UTC 24 |
| Peak memory | 227576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=694704142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.694704142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.2705637107 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 160321894 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:34:38 AM UTC 24 |
| Finished | Sep 11 08:34:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2705637107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.2705637107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.2018536027 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 216927940 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:34:38 AM UTC 24 |
| Finished | Sep 11 08:34:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2018536027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.2018536027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.1822243012 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 235591308 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:34:38 AM UTC 24 |
| Finished | Sep 11 08:34:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822243012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.1822243012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.2602553538 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 211015948 ps |
| CPU time | 1.73 seconds |
| Started | Sep 11 08:34:38 AM UTC 24 |
| Finished | Sep 11 08:34:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2602553538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_out_iso.2602553538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.498702424 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 198723287 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:34:38 AM UTC 24 |
| Finished | Sep 11 08:34:41 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=498702424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_out_stall.498702424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.1168106216 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 187860683 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:34:40 AM UTC 24 |
| Finished | Sep 11 08:34:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168106216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.1168106216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.3466778070 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 150654003 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:34:40 AM UTC 24 |
| Finished | Sep 11 08:34:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3466778070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.3466778070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.3852814014 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 261846777 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:34:40 AM UTC 24 |
| Finished | Sep 11 08:34:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3852814014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.3852814014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.2881358432 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 147640948 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:34:40 AM UTC 24 |
| Finished | Sep 11 08:34:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881358432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.2881358432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.2180796630 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 51502013 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:34:41 AM UTC 24 |
| Finished | Sep 11 08:34:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180796630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.2180796630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.2982906245 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 15735365850 ps |
| CPU time | 46.84 seconds |
| Started | Sep 11 08:34:42 AM UTC 24 |
| Finished | Sep 11 08:35:31 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982906245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_pkt_buffer.2982906245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.3205922231 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 230637359 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:34:42 AM UTC 24 |
| Finished | Sep 11 08:34:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205922231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.3205922231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.2037584456 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 163592815 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:34:43 AM UTC 24 |
| Finished | Sep 11 08:34:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037584456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.2037584456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.4235981513 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 175188576 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:34:43 AM UTC 24 |
| Finished | Sep 11 08:34:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4235981513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_random_length_in_transaction.4235981513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.4261146360 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 225584339 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:34:43 AM UTC 24 |
| Finished | Sep 11 08:34:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261146360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.4261146360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.791820100 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 216297886 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:34:43 AM UTC 24 |
| Finished | Sep 11 08:34:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=791820100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_rx_crc_err.791820100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.1664673278 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 247810632 ps |
| CPU time | 1.88 seconds |
| Started | Sep 11 08:34:44 AM UTC 24 |
| Finished | Sep 11 08:34:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664673278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.1664673278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.3475184651 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 165757709 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:34:44 AM UTC 24 |
| Finished | Sep 11 08:34:46 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3475184651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_setup_stage.3475184651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.3403912656 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 201161938 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:34:44 AM UTC 24 |
| Finished | Sep 11 08:34:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403912656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 47.usbdev_setup_trans_ignored.3403912656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.2045401494 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 191009047 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:34:44 AM UTC 24 |
| Finished | Sep 11 08:34:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2045401494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.2045401494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.2077616370 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 2358780471 ps |
| CPU time | 18.34 seconds |
| Started | Sep 11 08:34:44 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2077616370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.2077616370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.2679508317 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 171644174 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:34:46 AM UTC 24 |
| Finished | Sep 11 08:34:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2679508317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.2679508317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.883636988 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 146091629 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:34:46 AM UTC 24 |
| Finished | Sep 11 08:34:49 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=883636988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_stall_trans.883636988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.4218090109 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 994787582 ps |
| CPU time | 4.23 seconds |
| Started | Sep 11 08:34:46 AM UTC 24 |
| Finished | Sep 11 08:34:51 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4218090109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.4218090109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.4088766431 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 2541053426 ps |
| CPU time | 68.1 seconds |
| Started | Sep 11 08:34:46 AM UTC 24 |
| Finished | Sep 11 08:35:56 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4088766431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.4088766431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.1933977673 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 552434379 ps |
| CPU time | 8.8 seconds |
| Started | Sep 11 08:34:30 AM UTC 24 |
| Finished | Sep 11 08:34:40 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933977673 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.1933977673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.1964273492 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 495917399 ps |
| CPU time | 2.11 seconds |
| Started | Sep 11 08:34:46 AM UTC 24 |
| Finished | Sep 11 08:34:49 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1964273492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_t x_rx_disruption.1964273492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.1135342758 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 575763068 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:37:50 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 215212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1135342758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.1135342758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.989534418 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 533711750 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:37:50 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=989534418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_t x_rx_disruption.989534418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.845568205 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 535016457 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:37:50 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=845568205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_t x_rx_disruption.845568205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.2147830187 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 627015450 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:37:50 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2147830187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_ tx_rx_disruption.2147830187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.2742251137 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 79481354 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:07 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742251137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.2742251137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.3738453674 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 11402444072 ps |
| CPU time | 14.65 seconds |
| Started | Sep 11 08:34:46 AM UTC 24 |
| Finished | Sep 11 08:35:02 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738453674 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.3738453674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.1831786750 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 21234707182 ps |
| CPU time | 32.24 seconds |
| Started | Sep 11 08:34:48 AM UTC 24 |
| Finished | Sep 11 08:35:22 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831786750 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.1831786750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3151787128 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 24054696677 ps |
| CPU time | 38.73 seconds |
| Started | Sep 11 08:34:48 AM UTC 24 |
| Finished | Sep 11 08:35:28 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151787128 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.3151787128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.3760287214 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 173320102 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:34:48 AM UTC 24 |
| Finished | Sep 11 08:34:51 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760287214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.3760287214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.2587730745 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 146944582 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:34:48 AM UTC 24 |
| Finished | Sep 11 08:34:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587730745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_bitstuff_err.2587730745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.593900750 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 465735524 ps |
| CPU time | 2.53 seconds |
| Started | Sep 11 08:34:48 AM UTC 24 |
| Finished | Sep 11 08:34:52 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=593900750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_data_toggle_clear.593900750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.763618382 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 697769666 ps |
| CPU time | 3.38 seconds |
| Started | Sep 11 08:34:48 AM UTC 24 |
| Finished | Sep 11 08:34:53 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=763618382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.763618382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.459767450 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 32695684619 ps |
| CPU time | 64.72 seconds |
| Started | Sep 11 08:34:48 AM UTC 24 |
| Finished | Sep 11 08:35:55 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=459767450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_device_address.459767450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3433396327 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 7029712640 ps |
| CPU time | 44.46 seconds |
| Started | Sep 11 08:34:49 AM UTC 24 |
| Finished | Sep 11 08:35:34 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3433396327 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.3433396327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.3765922682 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 544931408 ps |
| CPU time | 2.56 seconds |
| Started | Sep 11 08:34:50 AM UTC 24 |
| Finished | Sep 11 08:34:54 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3765922682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_disable_endpoint.3765922682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.506410114 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 144208379 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:34:50 AM UTC 24 |
| Finished | Sep 11 08:34:53 AM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506410114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_disconnected.506410114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_enable.1913993608 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 37092243 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:34:50 AM UTC 24 |
| Finished | Sep 11 08:34:52 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913993608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_enable.1913993608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.2299275967 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 832670045 ps |
| CPU time | 3.97 seconds |
| Started | Sep 11 08:34:50 AM UTC 24 |
| Finished | Sep 11 08:34:55 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2299275967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.2299275967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.3666712409 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 293919038 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:34:51 AM UTC 24 |
| Finished | Sep 11 08:34:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666712409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_fifo_levels.3666712409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.2482218947 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 395309585 ps |
| CPU time | 3.55 seconds |
| Started | Sep 11 08:34:51 AM UTC 24 |
| Finished | Sep 11 08:34:55 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2482218947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_fifo_rst.2482218947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.3747810258 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 251968620 ps |
| CPU time | 2.18 seconds |
| Started | Sep 11 08:34:52 AM UTC 24 |
| Finished | Sep 11 08:34:55 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3747810258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.3747810258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.3637883909 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 140723272 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:34:53 AM UTC 24 |
| Finished | Sep 11 08:34:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637883909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.3637883909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.4166162068 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 209874970 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:34:53 AM UTC 24 |
| Finished | Sep 11 08:34:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166162068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_trans.4166162068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.3502097097 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 3534436309 ps |
| CPU time | 30.4 seconds |
| Started | Sep 11 08:34:52 AM UTC 24 |
| Finished | Sep 11 08:35:24 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502097097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.3502097097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.2826580717 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 12864909326 ps |
| CPU time | 141.36 seconds |
| Started | Sep 11 08:34:53 AM UTC 24 |
| Finished | Sep 11 08:37:17 AM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826580717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.2826580717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.281365122 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 184130094 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:34:53 AM UTC 24 |
| Finished | Sep 11 08:34:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=281365122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_link_in_err.281365122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.407936481 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 12563700974 ps |
| CPU time | 22.03 seconds |
| Started | Sep 11 08:34:55 AM UTC 24 |
| Finished | Sep 11 08:35:18 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=407936481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_link_resume.407936481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.2389613690 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 3526857228 ps |
| CPU time | 8.28 seconds |
| Started | Sep 11 08:34:55 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2389613690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.2389613690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.3173464202 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 3213244138 ps |
| CPU time | 31.35 seconds |
| Started | Sep 11 08:34:55 AM UTC 24 |
| Finished | Sep 11 08:35:27 AM UTC 24 |
| Peak memory | 229780 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3173464202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.3173464202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.404750751 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 1751957702 ps |
| CPU time | 44.25 seconds |
| Started | Sep 11 08:34:55 AM UTC 24 |
| Finished | Sep 11 08:35:40 AM UTC 24 |
| Peak memory | 227496 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=404750751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.404750751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.2018441335 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 250882789 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:34:57 AM UTC 24 |
| Finished | Sep 11 08:35:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2018441335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.2018441335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.1971563724 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 191307636 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:34:57 AM UTC 24 |
| Finished | Sep 11 08:35:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1971563724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.1971563724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.3666367426 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 2141322467 ps |
| CPU time | 19.62 seconds |
| Started | Sep 11 08:34:57 AM UTC 24 |
| Finished | Sep 11 08:35:19 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666367426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.3666367426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.1890718975 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 166043489 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:34:57 AM UTC 24 |
| Finished | Sep 11 08:35:01 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890718975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.1890718975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.1911839397 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 143860958 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:34:57 AM UTC 24 |
| Finished | Sep 11 08:35:00 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1911839397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.1911839397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.2714182802 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 176682953 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:34:57 AM UTC 24 |
| Finished | Sep 11 08:35:00 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714182802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.2714182802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.4292698481 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 162122324 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:34:57 AM UTC 24 |
| Finished | Sep 11 08:35:01 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4292698481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.4292698481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.2354788902 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 223645155 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:34:57 AM UTC 24 |
| Finished | Sep 11 08:35:01 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2354788902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.2354788902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.1176361129 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 181364814 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:34:58 AM UTC 24 |
| Finished | Sep 11 08:35:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176361129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.1176361129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.3045957986 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 154087469 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:34:58 AM UTC 24 |
| Finished | Sep 11 08:35:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045957986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.3045957986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.2125637594 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 240499109 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:34:58 AM UTC 24 |
| Finished | Sep 11 08:35:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125637594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.2125637594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.3181015225 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 197534136 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:34:59 AM UTC 24 |
| Finished | Sep 11 08:35:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181015225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.3181015225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.3642480697 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 40221918 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:35:00 AM UTC 24 |
| Finished | Sep 11 08:35:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3642480697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.3642480697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.2514177467 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 14569093269 ps |
| CPU time | 40.36 seconds |
| Started | Sep 11 08:35:01 AM UTC 24 |
| Finished | Sep 11 08:35:43 AM UTC 24 |
| Peak memory | 231824 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2514177467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.2514177467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.929358758 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 156557302 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:35:01 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=929358758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_pkt_received.929358758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.3460726961 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 209882179 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:35:01 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460726961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_pkt_sent.3460726961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.1854376826 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 225285313 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:35:01 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854376826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.1854376826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.3538564175 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 172027235 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:35:01 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3538564175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.3538564175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.3874665753 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 155389837 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:35:01 AM UTC 24 |
| Finished | Sep 11 08:35:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874665753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_rx_crc_err.3874665753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.3367413192 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 305906608 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:35:01 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367413192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.3367413192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.3400260923 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 145982334 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:35:01 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400260923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_setup_stage.3400260923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.1245822492 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 151746267 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:35:01 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245822492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.1245822492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.2689362803 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 199442269 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:35:01 AM UTC 24 |
| Finished | Sep 11 08:35:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689362803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.2689362803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.3109358359 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 2509959585 ps |
| CPU time | 19.04 seconds |
| Started | Sep 11 08:35:03 AM UTC 24 |
| Finished | Sep 11 08:35:23 AM UTC 24 |
| Peak memory | 234260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109358359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.3109358359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.1940807965 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 167150386 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:35:03 AM UTC 24 |
| Finished | Sep 11 08:35:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940807965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.1940807965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.973782616 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 185795016 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:35:03 AM UTC 24 |
| Finished | Sep 11 08:35:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973782616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_stall_trans.973782616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.3928001499 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 312175337 ps |
| CPU time | 1.96 seconds |
| Started | Sep 11 08:35:03 AM UTC 24 |
| Finished | Sep 11 08:35:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3928001499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.3928001499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.3680763299 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 2654841737 ps |
| CPU time | 67.56 seconds |
| Started | Sep 11 08:35:03 AM UTC 24 |
| Finished | Sep 11 08:36:12 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3680763299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_streaming_out.3680763299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.146158282 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 947808019 ps |
| CPU time | 18.12 seconds |
| Started | Sep 11 08:34:50 AM UTC 24 |
| Finished | Sep 11 08:35:10 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=146158282 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.146158282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.3511466918 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 513190886 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:35:03 AM UTC 24 |
| Finished | Sep 11 08:35:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3511466918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.3511466918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.2466325421 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 506815794 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:37:50 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2466325421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_ tx_rx_disruption.2466325421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.2130195074 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 636570101 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:37:50 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2130195074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.2130195074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.1294087811 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 669162598 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:37:50 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1294087811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.1294087811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.1294560002 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 638925227 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:37:50 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1294560002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.1294560002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.705897659 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 562265720 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:37:50 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=705897659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_t x_rx_disruption.705897659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.2873097727 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 631006918 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:37:50 AM UTC 24 |
| Finished | Sep 11 08:38:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2873097727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.2873097727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.105978879 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 43966713 ps |
| CPU time | 1 seconds |
| Started | Sep 11 08:35:19 AM UTC 24 |
| Finished | Sep 11 08:35:22 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=105978879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.105978879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.4040914298 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 4290065323 ps |
| CPU time | 8.21 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:14 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040914298 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.4040914298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.2800824728 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 15303824649 ps |
| CPU time | 24.26 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:30 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2800824728 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.2800824728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.3576908718 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 29134082223 ps |
| CPU time | 48.71 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:55 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576908718 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.3576908718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.4182267556 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 163965388 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:07 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182267556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_av_buffer.4182267556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.2156232370 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 161074148 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156232370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_bitstuff_err.2156232370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.1266410695 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 429106317 ps |
| CPU time | 2.63 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:09 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266410695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 49.usbdev_data_toggle_clear.1266410695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.1084873688 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 597996069 ps |
| CPU time | 2.13 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:08 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1084873688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.1084873688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.3781663654 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 20765769811 ps |
| CPU time | 40.04 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:47 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781663654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.3781663654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.230158150 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 2004171405 ps |
| CPU time | 16.71 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:23 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=230158150 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.230158150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.2723550949 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 589179703 ps |
| CPU time | 2.07 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:08 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723550949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.2723550949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.1018300695 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 193114833 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018300695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.1018300695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_enable.306759334 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 40839078 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:35:06 AM UTC 24 |
| Finished | Sep 11 08:35:09 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=306759334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_enable.306759334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.3142588318 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 862040408 ps |
| CPU time | 3.11 seconds |
| Started | Sep 11 08:35:07 AM UTC 24 |
| Finished | Sep 11 08:35:11 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142588318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.3142588318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.3998317572 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 520027474 ps |
| CPU time | 1.87 seconds |
| Started | Sep 11 08:35:07 AM UTC 24 |
| Finished | Sep 11 08:35:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998317572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.3998317572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.45157554 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 192517829 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:35:07 AM UTC 24 |
| Finished | Sep 11 08:35:09 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=45157554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_fifo_levels.45157554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.1364654709 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 371603405 ps |
| CPU time | 2.4 seconds |
| Started | Sep 11 08:35:09 AM UTC 24 |
| Finished | Sep 11 08:35:12 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1364654709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.1364654709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.411087339 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 168810825 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:35:09 AM UTC 24 |
| Finished | Sep 11 08:35:11 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=411087339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.411087339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.1058780488 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 145544230 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:35:09 AM UTC 24 |
| Finished | Sep 11 08:35:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058780488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.1058780488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.877784266 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 227655106 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:35:09 AM UTC 24 |
| Finished | Sep 11 08:35:11 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=877784266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_in_trans.877784266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.2218047739 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 3576474136 ps |
| CPU time | 28.18 seconds |
| Started | Sep 11 08:35:09 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 233808 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218047739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.2218047739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.2433714530 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 9612923495 ps |
| CPU time | 62.62 seconds |
| Started | Sep 11 08:35:09 AM UTC 24 |
| Finished | Sep 11 08:36:13 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433714530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.2433714530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.3946421646 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 216455644 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:35:09 AM UTC 24 |
| Finished | Sep 11 08:35:11 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3946421646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.3946421646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.79513750 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 7713286360 ps |
| CPU time | 14.73 seconds |
| Started | Sep 11 08:35:09 AM UTC 24 |
| Finished | Sep 11 08:35:25 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=79513750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_link_resume.79513750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.2849628137 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 11135753736 ps |
| CPU time | 16.58 seconds |
| Started | Sep 11 08:35:10 AM UTC 24 |
| Finished | Sep 11 08:35:28 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849628137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.2849628137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.464835358 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 3656227466 ps |
| CPU time | 27.4 seconds |
| Started | Sep 11 08:35:10 AM UTC 24 |
| Finished | Sep 11 08:35:39 AM UTC 24 |
| Peak memory | 227632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=464835358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.464835358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.3594021379 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 2281377844 ps |
| CPU time | 57.23 seconds |
| Started | Sep 11 08:35:11 AM UTC 24 |
| Finished | Sep 11 08:36:09 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3594021379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.3594021379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.245853427 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 240518590 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:35:11 AM UTC 24 |
| Finished | Sep 11 08:35:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=245853427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.245853427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.3840851221 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 197156492 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:35:11 AM UTC 24 |
| Finished | Sep 11 08:35:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840851221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.3840851221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.889221175 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 3169291803 ps |
| CPU time | 78.6 seconds |
| Started | Sep 11 08:35:11 AM UTC 24 |
| Finished | Sep 11 08:36:31 AM UTC 24 |
| Peak memory | 229568 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=889221175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.889221175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.2965149527 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 167975684 ps |
| CPU time | 1.13 seconds |
| Started | Sep 11 08:35:11 AM UTC 24 |
| Finished | Sep 11 08:35:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2965149527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.2965149527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.2880927897 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 148549618 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:35:11 AM UTC 24 |
| Finished | Sep 11 08:35:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880927897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.2880927897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.3556807888 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 233399956 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:35:12 AM UTC 24 |
| Finished | Sep 11 08:35:15 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556807888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_nak_trans.3556807888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.2775370050 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 170790698 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:35:12 AM UTC 24 |
| Finished | Sep 11 08:35:15 AM UTC 24 |
| Peak memory | 214884 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2775370050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.2775370050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.1193713660 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 238839751 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:35:12 AM UTC 24 |
| Finished | Sep 11 08:35:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193713660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_out_stall.1193713660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.3489343127 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 182688917 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:35:12 AM UTC 24 |
| Finished | Sep 11 08:35:15 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489343127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.3489343127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.609481500 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 156742696 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:35:13 AM UTC 24 |
| Finished | Sep 11 08:35:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=609481500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pending_in_trans.609481500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.3625995528 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 223824484 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:35:13 AM UTC 24 |
| Finished | Sep 11 08:35:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3625995528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.3625995528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.3760220157 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 142577138 ps |
| CPU time | 0.99 seconds |
| Started | Sep 11 08:35:14 AM UTC 24 |
| Finished | Sep 11 08:35:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760220157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.3760220157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.716896242 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 43196378 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:35:14 AM UTC 24 |
| Finished | Sep 11 08:35:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=716896242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_phy_pins_sense.716896242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.2896089418 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 20342791250 ps |
| CPU time | 58.1 seconds |
| Started | Sep 11 08:35:14 AM UTC 24 |
| Finished | Sep 11 08:36:14 AM UTC 24 |
| Peak memory | 227704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896089418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.2896089418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.1884378611 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 177149014 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:35:14 AM UTC 24 |
| Finished | Sep 11 08:35:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884378611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.1884378611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.3822997198 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 234831207 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:35:14 AM UTC 24 |
| Finished | Sep 11 08:35:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822997198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.3822997198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.3129635922 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 254729212 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:35:16 AM UTC 24 |
| Finished | Sep 11 08:35:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129635922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.3129635922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.2309484932 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 173054327 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:35:16 AM UTC 24 |
| Finished | Sep 11 08:35:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309484932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.2309484932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.3916052361 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 136117928 ps |
| CPU time | 1.2 seconds |
| Started | Sep 11 08:35:16 AM UTC 24 |
| Finished | Sep 11 08:35:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3916052361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.3916052361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.3862889832 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 348185086 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:35:16 AM UTC 24 |
| Finished | Sep 11 08:35:19 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862889832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.3862889832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.2292071900 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 146854086 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:35:17 AM UTC 24 |
| Finished | Sep 11 08:35:20 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292071900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.2292071900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.1548382042 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 146194216 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:35:17 AM UTC 24 |
| Finished | Sep 11 08:35:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548382042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.1548382042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.3292766305 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 294368893 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:35:17 AM UTC 24 |
| Finished | Sep 11 08:35:20 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292766305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.3292766305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.11407115 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 2808599708 ps |
| CPU time | 69.19 seconds |
| Started | Sep 11 08:35:17 AM UTC 24 |
| Finished | Sep 11 08:36:28 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=11407115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.11407115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.3823365622 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 178367870 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:35:18 AM UTC 24 |
| Finished | Sep 11 08:35:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823365622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.3823365622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.1528589022 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 164900275 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:35:18 AM UTC 24 |
| Finished | Sep 11 08:35:20 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528589022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.1528589022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.3991602458 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 1019145860 ps |
| CPU time | 2.76 seconds |
| Started | Sep 11 08:35:18 AM UTC 24 |
| Finished | Sep 11 08:35:22 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3991602458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.3991602458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.1246710209 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 3946921380 ps |
| CPU time | 36.59 seconds |
| Started | Sep 11 08:35:18 AM UTC 24 |
| Finished | Sep 11 08:35:56 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1246710209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.1246710209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.3597423239 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 1325672500 ps |
| CPU time | 10.03 seconds |
| Started | Sep 11 08:35:05 AM UTC 24 |
| Finished | Sep 11 08:35:16 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597423239 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.3597423239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.1826011191 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 536970250 ps |
| CPU time | 2.01 seconds |
| Started | Sep 11 08:35:18 AM UTC 24 |
| Finished | Sep 11 08:35:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1826011191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_t x_rx_disruption.1826011191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.3283361622 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 520113353 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3283361622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.3283361622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.3025194658 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 507892018 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3025194658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.3025194658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.3470860846 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 622445284 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3470860846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.3470860846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.3162021294 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 612758045 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3162021294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.3162021294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.4075773412 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 525147863 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4075773412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.4075773412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.1757040494 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 513261013 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1757040494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_ tx_rx_disruption.1757040494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.126233369 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 565424895 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=126233369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_t x_rx_disruption.126233369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.2568486682 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 505991125 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2568486682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.2568486682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.1584180852 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 516197325 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:37:52 AM UTC 24 |
| Finished | Sep 11 08:38:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1584180852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.1584180852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.2004237009 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 88552112 ps |
| CPU time | 1.15 seconds |
| Started | Sep 11 08:21:43 AM UTC 24 |
| Finished | Sep 11 08:21:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004237009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.2004237009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.177509161 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 12255237938 ps |
| CPU time | 32.69 seconds |
| Started | Sep 11 08:21:03 AM UTC 24 |
| Finished | Sep 11 08:21:37 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=177509161 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.177509161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.1485569912 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 19090735399 ps |
| CPU time | 31.14 seconds |
| Started | Sep 11 08:21:03 AM UTC 24 |
| Finished | Sep 11 08:21:35 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485569912 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.1485569912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.2590686683 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 28652489499 ps |
| CPU time | 45.4 seconds |
| Started | Sep 11 08:21:03 AM UTC 24 |
| Finished | Sep 11 08:21:50 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590686683 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.2590686683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.214443980 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 164106242 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:21:05 AM UTC 24 |
| Finished | Sep 11 08:21:07 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=214443980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_av_buffer.214443980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.2722499152 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 145582263 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:21:05 AM UTC 24 |
| Finished | Sep 11 08:21:07 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722499152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_bitstuff_err.2722499152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.4252833080 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 558076251 ps |
| CPU time | 3.29 seconds |
| Started | Sep 11 08:21:05 AM UTC 24 |
| Finished | Sep 11 08:21:09 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252833080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.4252833080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.3036868059 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 1130763282 ps |
| CPU time | 3.16 seconds |
| Started | Sep 11 08:21:06 AM UTC 24 |
| Finished | Sep 11 08:21:11 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036868059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.3036868059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.1358176497 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 27508109599 ps |
| CPU time | 60.52 seconds |
| Started | Sep 11 08:21:06 AM UTC 24 |
| Finished | Sep 11 08:22:09 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358176497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.1358176497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.1718204678 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 154388133 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:21:06 AM UTC 24 |
| Finished | Sep 11 08:21:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1718204678 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.1718204678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.2209295401 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 409213597 ps |
| CPU time | 2.54 seconds |
| Started | Sep 11 08:21:08 AM UTC 24 |
| Finished | Sep 11 08:21:11 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209295401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.2209295401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.4205130157 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 172566869 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:21:09 AM UTC 24 |
| Finished | Sep 11 08:21:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4205130157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.4205130157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_enable.1021359860 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 33412818 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:21:09 AM UTC 24 |
| Finished | Sep 11 08:21:11 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021359860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_enable.1021359860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.3272685579 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 787313970 ps |
| CPU time | 3.68 seconds |
| Started | Sep 11 08:21:09 AM UTC 24 |
| Finished | Sep 11 08:21:14 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272685579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.3272685579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.3932841969 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 294125438 ps |
| CPU time | 1.91 seconds |
| Started | Sep 11 08:21:10 AM UTC 24 |
| Finished | Sep 11 08:21:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932841969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.3932841969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.839598290 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 300681032 ps |
| CPU time | 1.89 seconds |
| Started | Sep 11 08:21:10 AM UTC 24 |
| Finished | Sep 11 08:21:13 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=839598290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_fifo_levels.839598290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.696472681 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 275316428 ps |
| CPU time | 2.68 seconds |
| Started | Sep 11 08:21:12 AM UTC 24 |
| Finished | Sep 11 08:21:15 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=696472681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_fifo_rst.696472681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.3651944083 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 239590628 ps |
| CPU time | 2.11 seconds |
| Started | Sep 11 08:21:12 AM UTC 24 |
| Finished | Sep 11 08:21:15 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651944083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.3651944083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.2608024544 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 137367803 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:21:13 AM UTC 24 |
| Finished | Sep 11 08:21:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608024544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_stall.2608024544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.1426880698 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 243358826 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:21:14 AM UTC 24 |
| Finished | Sep 11 08:21:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426880698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.1426880698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.3645485883 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 3630570901 ps |
| CPU time | 28.97 seconds |
| Started | Sep 11 08:21:12 AM UTC 24 |
| Finished | Sep 11 08:21:42 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3645485883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.3645485883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.2850138232 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 11980763425 ps |
| CPU time | 98.27 seconds |
| Started | Sep 11 08:21:14 AM UTC 24 |
| Finished | Sep 11 08:22:55 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850138232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.2850138232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.2552445843 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 192452496 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:21:15 AM UTC 24 |
| Finished | Sep 11 08:21:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2552445843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.2552445843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.1047679282 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 10702464909 ps |
| CPU time | 25.81 seconds |
| Started | Sep 11 08:21:15 AM UTC 24 |
| Finished | Sep 11 08:21:42 AM UTC 24 |
| Peak memory | 227588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047679282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.1047679282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.2289867235 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 4224206270 ps |
| CPU time | 10.36 seconds |
| Started | Sep 11 08:21:17 AM UTC 24 |
| Finished | Sep 11 08:21:28 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289867235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.2289867235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.2299055670 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 4454822974 ps |
| CPU time | 119.99 seconds |
| Started | Sep 11 08:21:17 AM UTC 24 |
| Finished | Sep 11 08:23:19 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2299055670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.2299055670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.613800562 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 2244227094 ps |
| CPU time | 79.17 seconds |
| Started | Sep 11 08:21:18 AM UTC 24 |
| Finished | Sep 11 08:22:39 AM UTC 24 |
| Peak memory | 227680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=613800562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.613800562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.2298935071 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 257084135 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:21:19 AM UTC 24 |
| Finished | Sep 11 08:21:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2298935071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.2298935071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.4159839822 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 189347828 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:21:20 AM UTC 24 |
| Finished | Sep 11 08:21:23 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159839822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.4159839822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.2616629677 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 2638309605 ps |
| CPU time | 35.15 seconds |
| Started | Sep 11 08:21:23 AM UTC 24 |
| Finished | Sep 11 08:22:00 AM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2616629677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.2616629677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.4116124097 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 3087217612 ps |
| CPU time | 84.98 seconds |
| Started | Sep 11 08:21:23 AM UTC 24 |
| Finished | Sep 11 08:22:50 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116124097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.4116124097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.298843229 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 2260985192 ps |
| CPU time | 72.55 seconds |
| Started | Sep 11 08:21:23 AM UTC 24 |
| Finished | Sep 11 08:22:38 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=298843229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.298843229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.3524389596 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 158714710 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:21:23 AM UTC 24 |
| Finished | Sep 11 08:21:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524389596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.3524389596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.1740921063 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 139630737 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:21:24 AM UTC 24 |
| Finished | Sep 11 08:21:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1740921063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.1740921063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.612099739 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 188103181 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:21:27 AM UTC 24 |
| Finished | Sep 11 08:21:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=612099739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_nak_trans.612099739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.2965827188 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 212055846 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:21:27 AM UTC 24 |
| Finished | Sep 11 08:21:29 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2965827188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.2965827188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.3083327557 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 180037393 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:21:27 AM UTC 24 |
| Finished | Sep 11 08:21:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083327557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_out_stall.3083327557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.1346725595 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 224357097 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:21:29 AM UTC 24 |
| Finished | Sep 11 08:21:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346725595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.1346725595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.2101199325 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 168943062 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:21:29 AM UTC 24 |
| Finished | Sep 11 08:21:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101199325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.2101199325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.1758074513 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 219059397 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:21:29 AM UTC 24 |
| Finished | Sep 11 08:21:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758074513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.1758074513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.3591682903 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 163713542 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:21:29 AM UTC 24 |
| Finished | Sep 11 08:21:32 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591682903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.3591682903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.1658991660 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 41129107 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:21:29 AM UTC 24 |
| Finished | Sep 11 08:21:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1658991660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.1658991660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.1773018157 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 14663682391 ps |
| CPU time | 45.77 seconds |
| Started | Sep 11 08:21:30 AM UTC 24 |
| Finished | Sep 11 08:22:18 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773018157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_pkt_buffer.1773018157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.21649149 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 179362060 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:21:30 AM UTC 24 |
| Finished | Sep 11 08:21:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21649149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_pkt_received.21649149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.2600670986 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 170144283 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:21:30 AM UTC 24 |
| Finished | Sep 11 08:21:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2600670986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_pkt_sent.2600670986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.1047977539 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 3208292589 ps |
| CPU time | 59.08 seconds |
| Started | Sep 11 08:21:33 AM UTC 24 |
| Finished | Sep 11 08:22:34 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047977539 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.1047977539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.1210947823 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 7235785609 ps |
| CPU time | 190.62 seconds |
| Started | Sep 11 08:21:33 AM UTC 24 |
| Finished | Sep 11 08:24:47 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1210947823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.1210947823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.823942096 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 10628964812 ps |
| CPU time | 177.81 seconds |
| Started | Sep 11 08:21:33 AM UTC 24 |
| Finished | Sep 11 08:24:34 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=823942096 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.823942096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.3584480114 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 220705837 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:21:33 AM UTC 24 |
| Finished | Sep 11 08:21:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584480114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.3584480114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.3418876956 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 182697296 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:21:33 AM UTC 24 |
| Finished | Sep 11 08:21:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3418876956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.3418876956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.2363833790 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 20168265822 ps |
| CPU time | 36.52 seconds |
| Started | Sep 11 08:21:34 AM UTC 24 |
| Finished | Sep 11 08:22:12 AM UTC 24 |
| Peak memory | 217276 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363833790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.2363833790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.1033005272 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 218493102 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:21:34 AM UTC 24 |
| Finished | Sep 11 08:21:37 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033005272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.1033005272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.3160060861 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 402068401 ps |
| CPU time | 2.23 seconds |
| Started | Sep 11 08:21:36 AM UTC 24 |
| Finished | Sep 11 08:21:40 AM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160060861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.3160060861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.2348451635 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 193204539 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:21:36 AM UTC 24 |
| Finished | Sep 11 08:21:39 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348451635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.2348451635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.3134000207 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 185905045 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:21:36 AM UTC 24 |
| Finished | Sep 11 08:21:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134000207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 5.usbdev_setup_trans_ignored.3134000207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.3961109800 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 245205878 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:21:38 AM UTC 24 |
| Finished | Sep 11 08:21:40 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961109800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.3961109800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.524826289 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 2757403427 ps |
| CPU time | 34.14 seconds |
| Started | Sep 11 08:21:38 AM UTC 24 |
| Finished | Sep 11 08:22:13 AM UTC 24 |
| Peak memory | 234316 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=524826289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.524826289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.3542252981 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 187130043 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:21:39 AM UTC 24 |
| Finished | Sep 11 08:21:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542252981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.3542252981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.1532314798 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 192490975 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:21:40 AM UTC 24 |
| Finished | Sep 11 08:21:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532314798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.1532314798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.3806179810 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 1305395121 ps |
| CPU time | 5.67 seconds |
| Started | Sep 11 08:21:41 AM UTC 24 |
| Finished | Sep 11 08:21:48 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806179810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.3806179810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.1232469044 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 1722460773 ps |
| CPU time | 21.14 seconds |
| Started | Sep 11 08:21:40 AM UTC 24 |
| Finished | Sep 11 08:22:03 AM UTC 24 |
| Peak memory | 234128 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232469044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.1232469044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.961381159 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 13095751319 ps |
| CPU time | 68.12 seconds |
| Started | Sep 11 08:21:41 AM UTC 24 |
| Finished | Sep 11 08:22:51 AM UTC 24 |
| Peak memory | 234260 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=961381159 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_1 0/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.961381159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.2728600534 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 5720440718 ps |
| CPU time | 38.93 seconds |
| Started | Sep 11 08:21:08 AM UTC 24 |
| Finished | Sep 11 08:21:48 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728600534 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.2728600534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.1859588583 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 604233724 ps |
| CPU time | 2.84 seconds |
| Started | Sep 11 08:21:43 AM UTC 24 |
| Finished | Sep 11 08:21:47 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1859588583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.1859588583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.505523672 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 497856802 ps |
| CPU time | 1.85 seconds |
| Started | Sep 11 08:35:19 AM UTC 24 |
| Finished | Sep 11 08:35:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=505523672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.505523672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.2744008884 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 290344724 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:35:19 AM UTC 24 |
| Finished | Sep 11 08:35:22 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744008884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 50.usbdev_fifo_levels.2744008884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.1470829302 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 632360062 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:35:19 AM UTC 24 |
| Finished | Sep 11 08:35:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1470829302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.1470829302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.3935920193 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 454468664 ps |
| CPU time | 2.15 seconds |
| Started | Sep 11 08:35:19 AM UTC 24 |
| Finished | Sep 11 08:35:23 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935920193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.3935920193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.2208041065 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 281833795 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:35:19 AM UTC 24 |
| Finished | Sep 11 08:35:22 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2208041065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 51.usbdev_fifo_levels.2208041065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1436755080 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 589759196 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:35:21 AM UTC 24 |
| Finished | Sep 11 08:35:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1436755080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.1436755080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.3987069844 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 588630305 ps |
| CPU time | 2.56 seconds |
| Started | Sep 11 08:35:21 AM UTC 24 |
| Finished | Sep 11 08:35:25 AM UTC 24 |
| Peak memory | 217076 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987069844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.3987069844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.2550686194 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 147766755 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:35:21 AM UTC 24 |
| Finished | Sep 11 08:35:24 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550686194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.2550686194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.270875336 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 594716334 ps |
| CPU time | 2 seconds |
| Started | Sep 11 08:35:21 AM UTC 24 |
| Finished | Sep 11 08:35:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=270875336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_tx _rx_disruption.270875336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.2592511881 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 242755358 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:35:21 AM UTC 24 |
| Finished | Sep 11 08:35:24 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2592511881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.2592511881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.2393845137 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 275533006 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:35:21 AM UTC 24 |
| Finished | Sep 11 08:35:24 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393845137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 53.usbdev_fifo_levels.2393845137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.3104016727 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 604762404 ps |
| CPU time | 1.89 seconds |
| Started | Sep 11 08:35:21 AM UTC 24 |
| Finished | Sep 11 08:35:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3104016727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.3104016727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.3514906801 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 293247018 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:35:23 AM UTC 24 |
| Finished | Sep 11 08:35:26 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514906801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.3514906801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.1036019241 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 157726135 ps |
| CPU time | 0.93 seconds |
| Started | Sep 11 08:35:23 AM UTC 24 |
| Finished | Sep 11 08:35:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036019241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 54.usbdev_fifo_levels.1036019241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.1779048313 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 589451328 ps |
| CPU time | 2.38 seconds |
| Started | Sep 11 08:35:23 AM UTC 24 |
| Finished | Sep 11 08:35:27 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1779048313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.1779048313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.3079216391 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 425673422 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:35:23 AM UTC 24 |
| Finished | Sep 11 08:35:26 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3079216391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.3079216391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.3163268403 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 254310491 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:35:23 AM UTC 24 |
| Finished | Sep 11 08:35:26 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163268403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 55.usbdev_fifo_levels.3163268403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.3028201072 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 554928335 ps |
| CPU time | 2.01 seconds |
| Started | Sep 11 08:35:23 AM UTC 24 |
| Finished | Sep 11 08:35:27 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3028201072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_t x_rx_disruption.3028201072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.1980794448 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 342791727 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:35:24 AM UTC 24 |
| Finished | Sep 11 08:35:26 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980794448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.1980794448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.1828186042 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 261487134 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:35:24 AM UTC 24 |
| Finished | Sep 11 08:35:26 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828186042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 56.usbdev_fifo_levels.1828186042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.343224010 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 551228259 ps |
| CPU time | 2.11 seconds |
| Started | Sep 11 08:35:24 AM UTC 24 |
| Finished | Sep 11 08:35:27 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=343224010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_tx _rx_disruption.343224010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.1211328802 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 515753404 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:35:25 AM UTC 24 |
| Finished | Sep 11 08:35:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211328802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.1211328802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.4212021363 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 346394054 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:35:25 AM UTC 24 |
| Finished | Sep 11 08:35:28 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212021363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 57.usbdev_fifo_levels.4212021363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.1663563422 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 556325828 ps |
| CPU time | 1.98 seconds |
| Started | Sep 11 08:35:25 AM UTC 24 |
| Finished | Sep 11 08:35:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1663563422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.1663563422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.2932613922 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 144681383 ps |
| CPU time | 1.16 seconds |
| Started | Sep 11 08:35:25 AM UTC 24 |
| Finished | Sep 11 08:35:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932613922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.2932613922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.1482683155 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 251642259 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:35:25 AM UTC 24 |
| Finished | Sep 11 08:35:28 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482683155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 58.usbdev_fifo_levels.1482683155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.289363759 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 697304800 ps |
| CPU time | 2.67 seconds |
| Started | Sep 11 08:35:25 AM UTC 24 |
| Finished | Sep 11 08:35:29 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=289363759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_tx _rx_disruption.289363759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.2750312924 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 634603332 ps |
| CPU time | 2.08 seconds |
| Started | Sep 11 08:35:25 AM UTC 24 |
| Finished | Sep 11 08:35:29 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750312924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.2750312924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.381141442 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 261731305 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:35:26 AM UTC 24 |
| Finished | Sep 11 08:35:28 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=381141442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 59.usbdev_fifo_levels.381141442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.511366112 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 507214667 ps |
| CPU time | 1.88 seconds |
| Started | Sep 11 08:35:26 AM UTC 24 |
| Finished | Sep 11 08:35:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=511366112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_tx _rx_disruption.511366112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.3478144752 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 43356796 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:22:26 AM UTC 24 |
| Finished | Sep 11 08:22:28 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3478144752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.3478144752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.51869710 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 11913438399 ps |
| CPU time | 25.17 seconds |
| Started | Sep 11 08:21:45 AM UTC 24 |
| Finished | Sep 11 08:22:12 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51869710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.51869710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.3179220347 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 18618351872 ps |
| CPU time | 23.8 seconds |
| Started | Sep 11 08:21:45 AM UTC 24 |
| Finished | Sep 11 08:22:11 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3179220347 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.3179220347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.2167424711 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 30019980603 ps |
| CPU time | 55.86 seconds |
| Started | Sep 11 08:21:47 AM UTC 24 |
| Finished | Sep 11 08:22:44 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2167424711 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.2167424711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.1782806262 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 146338262 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:21:47 AM UTC 24 |
| Finished | Sep 11 08:21:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1782806262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.1782806262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.2459540635 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 191496703 ps |
| CPU time | 1.52 seconds |
| Started | Sep 11 08:21:50 AM UTC 24 |
| Finished | Sep 11 08:21:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459540635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.2459540635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.2083076581 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 576333158 ps |
| CPU time | 3.36 seconds |
| Started | Sep 11 08:21:50 AM UTC 24 |
| Finished | Sep 11 08:21:54 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2083076581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_data_toggle_clear.2083076581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.2576768472 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 817038859 ps |
| CPU time | 4.26 seconds |
| Started | Sep 11 08:21:50 AM UTC 24 |
| Finished | Sep 11 08:21:55 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576768472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.2576768472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.1982846980 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 1186803500 ps |
| CPU time | 28.09 seconds |
| Started | Sep 11 08:21:52 AM UTC 24 |
| Finished | Sep 11 08:22:22 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1982846980 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.1982846980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.2972985288 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 981994644 ps |
| CPU time | 3.93 seconds |
| Started | Sep 11 08:21:54 AM UTC 24 |
| Finished | Sep 11 08:22:00 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2972985288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_disable_endpoint.2972985288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.1210121387 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 140737457 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:21:54 AM UTC 24 |
| Finished | Sep 11 08:21:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1210121387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.1210121387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_enable.2631066519 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 36194097 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:21:57 AM UTC 24 |
| Finished | Sep 11 08:21:59 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2631066519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.2631066519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.485144266 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 1005801112 ps |
| CPU time | 4.46 seconds |
| Started | Sep 11 08:21:57 AM UTC 24 |
| Finished | Sep 11 08:22:03 AM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=485144266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.485144266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.1310859532 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 584242230 ps |
| CPU time | 1.98 seconds |
| Started | Sep 11 08:21:57 AM UTC 24 |
| Finished | Sep 11 08:22:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310859532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.1310859532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.678812073 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 222958454 ps |
| CPU time | 1.76 seconds |
| Started | Sep 11 08:21:59 AM UTC 24 |
| Finished | Sep 11 08:22:02 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=678812073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_fifo_levels.678812073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.3403274590 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 290331909 ps |
| CPU time | 2.37 seconds |
| Started | Sep 11 08:22:02 AM UTC 24 |
| Finished | Sep 11 08:22:06 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403274590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_fifo_rst.3403274590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.1396557711 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 196544972 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:22:02 AM UTC 24 |
| Finished | Sep 11 08:22:05 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396557711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.1396557711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.4080418839 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 143891685 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:22:02 AM UTC 24 |
| Finished | Sep 11 08:22:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4080418839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.4080418839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.927350643 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 222339712 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:22:02 AM UTC 24 |
| Finished | Sep 11 08:22:05 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=927350643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_in_trans.927350643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.847001340 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 3563176025 ps |
| CPU time | 99.15 seconds |
| Started | Sep 11 08:22:02 AM UTC 24 |
| Finished | Sep 11 08:23:44 AM UTC 24 |
| Peak memory | 227048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=847001340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.847001340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.1379508270 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 10448467307 ps |
| CPU time | 125.2 seconds |
| Started | Sep 11 08:22:06 AM UTC 24 |
| Finished | Sep 11 08:24:13 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379508270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.1379508270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.3845460295 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 228249397 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:22:06 AM UTC 24 |
| Finished | Sep 11 08:22:08 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845460295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_in_err.3845460295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.1398256038 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 12912873693 ps |
| CPU time | 27.84 seconds |
| Started | Sep 11 08:22:06 AM UTC 24 |
| Finished | Sep 11 08:22:35 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398256038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.1398256038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.1400487735 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 5275679347 ps |
| CPU time | 7.92 seconds |
| Started | Sep 11 08:22:06 AM UTC 24 |
| Finished | Sep 11 08:22:15 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1400487735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.1400487735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.1539922072 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 3147576073 ps |
| CPU time | 88.22 seconds |
| Started | Sep 11 08:22:06 AM UTC 24 |
| Finished | Sep 11 08:23:36 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539922072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.1539922072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.2410466206 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 2850705093 ps |
| CPU time | 36.18 seconds |
| Started | Sep 11 08:22:08 AM UTC 24 |
| Finished | Sep 11 08:22:46 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2410466206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.2410466206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.2456525722 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 249706894 ps |
| CPU time | 1.84 seconds |
| Started | Sep 11 08:22:08 AM UTC 24 |
| Finished | Sep 11 08:22:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456525722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.2456525722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.2072365540 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 210575190 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:22:08 AM UTC 24 |
| Finished | Sep 11 08:22:11 AM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072365540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.2072365540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.3550020789 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 2647298216 ps |
| CPU time | 21.86 seconds |
| Started | Sep 11 08:22:08 AM UTC 24 |
| Finished | Sep 11 08:22:32 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3550020789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.3550020789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.2480144344 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 2570222127 ps |
| CPU time | 22.56 seconds |
| Started | Sep 11 08:22:11 AM UTC 24 |
| Finished | Sep 11 08:22:35 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480144344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.2480144344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.3651022722 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 2732405526 ps |
| CPU time | 25.11 seconds |
| Started | Sep 11 08:22:11 AM UTC 24 |
| Finished | Sep 11 08:22:37 AM UTC 24 |
| Peak memory | 229704 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651022722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.3651022722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.2359575450 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 162694356 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:22:13 AM UTC 24 |
| Finished | Sep 11 08:22:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359575450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.2359575450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.256617779 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 170511010 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:22:13 AM UTC 24 |
| Finished | Sep 11 08:22:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=256617779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.256617779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.39549290 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 202034776 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:22:13 AM UTC 24 |
| Finished | Sep 11 08:22:16 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=39549290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_nak_trans.39549290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.2556635575 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 198703750 ps |
| CPU time | 1.26 seconds |
| Started | Sep 11 08:22:13 AM UTC 24 |
| Finished | Sep 11 08:22:15 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556635575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.2556635575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.1786006637 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 183151172 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:22:15 AM UTC 24 |
| Finished | Sep 11 08:22:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786006637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.1786006637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.2725363010 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 197552312 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:22:16 AM UTC 24 |
| Finished | Sep 11 08:22:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725363010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.2725363010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.690453644 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 160225085 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:22:16 AM UTC 24 |
| Finished | Sep 11 08:22:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690453644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pending_in_trans.690453644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.3054911585 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 215882900 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:22:16 AM UTC 24 |
| Finished | Sep 11 08:22:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3054911585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.3054911585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.2509371274 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 154113914 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:22:16 AM UTC 24 |
| Finished | Sep 11 08:22:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2509371274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.2509371274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.2052309062 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 55662836 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:22:17 AM UTC 24 |
| Finished | Sep 11 08:22:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2052309062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.2052309062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.4112561245 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 21703033970 ps |
| CPU time | 62.29 seconds |
| Started | Sep 11 08:22:17 AM UTC 24 |
| Finished | Sep 11 08:23:21 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112561245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.4112561245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.1691404979 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 189660899 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:22:17 AM UTC 24 |
| Finished | Sep 11 08:22:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1691404979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_pkt_received.1691404979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.3175515989 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 180443655 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:22:17 AM UTC 24 |
| Finished | Sep 11 08:22:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3175515989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_pkt_sent.3175515989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.3539743642 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 11117914895 ps |
| CPU time | 99.33 seconds |
| Started | Sep 11 08:22:19 AM UTC 24 |
| Finished | Sep 11 08:24:00 AM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539743642 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.3539743642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.2143297082 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 7739000462 ps |
| CPU time | 40.36 seconds |
| Started | Sep 11 08:22:19 AM UTC 24 |
| Finished | Sep 11 08:23:01 AM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143297082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.2143297082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.2295032138 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 9411102385 ps |
| CPU time | 49.7 seconds |
| Started | Sep 11 08:22:19 AM UTC 24 |
| Finished | Sep 11 08:23:10 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295032138 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.2295032138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.3447044886 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 213571443 ps |
| CPU time | 1.23 seconds |
| Started | Sep 11 08:22:17 AM UTC 24 |
| Finished | Sep 11 08:22:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447044886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_random_length_in_transaction.3447044886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.293491764 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 229640659 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:22:19 AM UTC 24 |
| Finished | Sep 11 08:22:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=293491764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.293491764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.4229674152 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 20168481295 ps |
| CPU time | 37.96 seconds |
| Started | Sep 11 08:22:19 AM UTC 24 |
| Finished | Sep 11 08:22:58 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229674152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.4229674152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.1693278558 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 141197616 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:22:20 AM UTC 24 |
| Finished | Sep 11 08:22:23 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693278558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_rx_crc_err.1693278558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.2681534133 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 423023724 ps |
| CPU time | 2.37 seconds |
| Started | Sep 11 08:22:20 AM UTC 24 |
| Finished | Sep 11 08:22:24 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2681534133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.2681534133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.323860714 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 154444834 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:22:21 AM UTC 24 |
| Finished | Sep 11 08:22:23 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=323860714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_setup_stage.323860714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.3489851153 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 152040282 ps |
| CPU time | 1.27 seconds |
| Started | Sep 11 08:22:21 AM UTC 24 |
| Finished | Sep 11 08:22:23 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489851153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.3489851153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.1081277508 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 227959878 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:22:21 AM UTC 24 |
| Finished | Sep 11 08:22:23 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081277508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.1081277508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.3638384196 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 3472721828 ps |
| CPU time | 23.16 seconds |
| Started | Sep 11 08:22:21 AM UTC 24 |
| Finished | Sep 11 08:22:45 AM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3638384196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.3638384196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.873031573 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 182597260 ps |
| CPU time | 1.51 seconds |
| Started | Sep 11 08:22:21 AM UTC 24 |
| Finished | Sep 11 08:22:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873031573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.873031573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.1933174714 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 199517043 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:22:22 AM UTC 24 |
| Finished | Sep 11 08:22:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933174714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_stall_trans.1933174714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.1596718652 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 628302423 ps |
| CPU time | 2.76 seconds |
| Started | Sep 11 08:22:23 AM UTC 24 |
| Finished | Sep 11 08:22:27 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1596718652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.1596718652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.2956093766 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 2844292929 ps |
| CPU time | 24.29 seconds |
| Started | Sep 11 08:22:22 AM UTC 24 |
| Finished | Sep 11 08:22:48 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2956093766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.2956093766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.1694615294 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 8534173763 ps |
| CPU time | 239.12 seconds |
| Started | Sep 11 08:22:24 AM UTC 24 |
| Finished | Sep 11 08:26:26 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694615294 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.1694615294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.1705737604 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 1099459309 ps |
| CPU time | 32.26 seconds |
| Started | Sep 11 08:21:52 AM UTC 24 |
| Finished | Sep 11 08:22:26 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705737604 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.1705737604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.1052742737 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 557283749 ps |
| CPU time | 2.7 seconds |
| Started | Sep 11 08:22:24 AM UTC 24 |
| Finished | Sep 11 08:22:27 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1052742737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.1052742737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.2026317089 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 485581547 ps |
| CPU time | 1.98 seconds |
| Started | Sep 11 08:35:26 AM UTC 24 |
| Finished | Sep 11 08:35:29 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2026317089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.2026317089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.3084453026 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 275587664 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:35:26 AM UTC 24 |
| Finished | Sep 11 08:35:28 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084453026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.3084453026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.1304487680 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 651825356 ps |
| CPU time | 1.98 seconds |
| Started | Sep 11 08:35:27 AM UTC 24 |
| Finished | Sep 11 08:35:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1304487680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.1304487680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.4197480335 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 448893994 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:35:27 AM UTC 24 |
| Finished | Sep 11 08:35:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197480335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.4197480335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.107524857 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 152483269 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:35:27 AM UTC 24 |
| Finished | Sep 11 08:35:29 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=107524857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 61.usbdev_fifo_levels.107524857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.1876918634 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 565416927 ps |
| CPU time | 2.42 seconds |
| Started | Sep 11 08:35:27 AM UTC 24 |
| Finished | Sep 11 08:35:31 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1876918634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_t x_rx_disruption.1876918634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.328397751 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 509685549 ps |
| CPU time | 2.16 seconds |
| Started | Sep 11 08:35:27 AM UTC 24 |
| Finished | Sep 11 08:35:30 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=328397751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.328397751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.1404436291 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 264676916 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:35:27 AM UTC 24 |
| Finished | Sep 11 08:35:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1404436291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 62.usbdev_fifo_levels.1404436291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.443003532 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 563465305 ps |
| CPU time | 1.75 seconds |
| Started | Sep 11 08:35:27 AM UTC 24 |
| Finished | Sep 11 08:35:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=443003532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_tx _rx_disruption.443003532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.951325775 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 388492448 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:35:27 AM UTC 24 |
| Finished | Sep 11 08:35:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=951325775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.951325775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.1110478831 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 308579311 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:35:27 AM UTC 24 |
| Finished | Sep 11 08:35:30 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110478831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 63.usbdev_fifo_levels.1110478831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.2116303623 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 494907667 ps |
| CPU time | 1.98 seconds |
| Started | Sep 11 08:35:27 AM UTC 24 |
| Finished | Sep 11 08:35:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2116303623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.2116303623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.218289938 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 438797465 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=218289938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.218289938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.3771094677 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 263018184 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:31 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3771094677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 64.usbdev_fifo_levels.3771094677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.2563505238 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 626388716 ps |
| CPU time | 2.15 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:32 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2563505238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_t x_rx_disruption.2563505238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.1289173020 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 268077003 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:31 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1289173020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.1289173020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.2997685567 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 538216846 ps |
| CPU time | 1.94 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2997685567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_t x_rx_disruption.2997685567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.776451843 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 523691055 ps |
| CPU time | 1.96 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=776451843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.776451843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2567285673 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 187477284 ps |
| CPU time | 1.36 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:32 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2567285673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 66.usbdev_fifo_levels.2567285673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.4033589450 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 507120455 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4033589450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.4033589450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.1794299032 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 193747083 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:31 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1794299032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.1794299032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.3744412976 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 264238745 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:32 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744412976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 67.usbdev_fifo_levels.3744412976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.805154622 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 597523325 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:35:29 AM UTC 24 |
| Finished | Sep 11 08:35:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=805154622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_tx _rx_disruption.805154622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.4046492096 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 312418137 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046492096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.4046492096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.3768130027 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 206485631 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768130027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 68.usbdev_fifo_levels.3768130027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.2979201585 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 495204261 ps |
| CPU time | 1.93 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2979201585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_t x_rx_disruption.2979201585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.4060351860 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 288514098 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:33 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060351860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.4060351860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.3976527363 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 270452954 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:33 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976527363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 69.usbdev_fifo_levels.3976527363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.1071027319 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 557051485 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1071027319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.1071027319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.3334858473 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 56156358 ps |
| CPU time | 1 seconds |
| Started | Sep 11 08:22:56 AM UTC 24 |
| Finished | Sep 11 08:22:58 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3334858473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.3334858473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.1409171753 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 10300237587 ps |
| CPU time | 19.48 seconds |
| Started | Sep 11 08:22:26 AM UTC 24 |
| Finished | Sep 11 08:22:46 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1409171753 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.1409171753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.1088404370 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 25578625276 ps |
| CPU time | 36.71 seconds |
| Started | Sep 11 08:22:27 AM UTC 24 |
| Finished | Sep 11 08:23:05 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088404370 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.1088404370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.4131166405 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 163424300 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:22:27 AM UTC 24 |
| Finished | Sep 11 08:22:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4131166405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.4131166405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.1487226786 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 146819487 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:22:27 AM UTC 24 |
| Finished | Sep 11 08:22:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487226786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.1487226786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.4246653757 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 165456480 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:22:28 AM UTC 24 |
| Finished | Sep 11 08:22:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246653757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_data_toggle_clear.4246653757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.4095609076 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 838868955 ps |
| CPU time | 4.37 seconds |
| Started | Sep 11 08:22:28 AM UTC 24 |
| Finished | Sep 11 08:22:34 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095609076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.4095609076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.2189165206 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 22186465634 ps |
| CPU time | 41.53 seconds |
| Started | Sep 11 08:22:28 AM UTC 24 |
| Finished | Sep 11 08:23:11 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2189165206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.2189165206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.2905850328 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 1571894683 ps |
| CPU time | 15.6 seconds |
| Started | Sep 11 08:22:29 AM UTC 24 |
| Finished | Sep 11 08:22:45 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905850328 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.2905850328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.3276748215 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 335686182 ps |
| CPU time | 2.23 seconds |
| Started | Sep 11 08:22:31 AM UTC 24 |
| Finished | Sep 11 08:22:34 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276748215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.3276748215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.3568535513 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 169574317 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:22:32 AM UTC 24 |
| Finished | Sep 11 08:22:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3568535513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.3568535513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_enable.2435191540 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 46806565 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:22:32 AM UTC 24 |
| Finished | Sep 11 08:22:34 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435191540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_enable.2435191540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.2679800261 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 923868541 ps |
| CPU time | 4.44 seconds |
| Started | Sep 11 08:22:32 AM UTC 24 |
| Finished | Sep 11 08:22:38 AM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2679800261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.2679800261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.1154415058 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 277867988 ps |
| CPU time | 1.38 seconds |
| Started | Sep 11 08:22:35 AM UTC 24 |
| Finished | Sep 11 08:22:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1154415058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.1154415058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.2127205195 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 291301744 ps |
| CPU time | 1.95 seconds |
| Started | Sep 11 08:22:35 AM UTC 24 |
| Finished | Sep 11 08:22:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2127205195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_fifo_levels.2127205195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.1288251826 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 452778118 ps |
| CPU time | 4.11 seconds |
| Started | Sep 11 08:22:35 AM UTC 24 |
| Finished | Sep 11 08:22:40 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288251826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_fifo_rst.1288251826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.786077089 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 181463526 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:22:36 AM UTC 24 |
| Finished | Sep 11 08:22:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=786077089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.786077089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.3152785542 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 155634927 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:22:36 AM UTC 24 |
| Finished | Sep 11 08:22:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152785542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.3152785542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.2331166930 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 189436802 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:22:36 AM UTC 24 |
| Finished | Sep 11 08:22:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331166930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_trans.2331166930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.554270664 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 4433518301 ps |
| CPU time | 33.81 seconds |
| Started | Sep 11 08:22:36 AM UTC 24 |
| Finished | Sep 11 08:23:11 AM UTC 24 |
| Peak memory | 234164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=554270664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.554270664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.3560318330 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 4505163748 ps |
| CPU time | 55.88 seconds |
| Started | Sep 11 08:22:39 AM UTC 24 |
| Finished | Sep 11 08:23:36 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560318330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.3560318330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.4055686718 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 196541567 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:22:39 AM UTC 24 |
| Finished | Sep 11 08:22:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055686718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.4055686718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.82074829 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 26996113246 ps |
| CPU time | 55.09 seconds |
| Started | Sep 11 08:22:39 AM UTC 24 |
| Finished | Sep 11 08:23:35 AM UTC 24 |
| Peak memory | 227580 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=82074829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_link_resume.82074829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.605513975 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 10306592218 ps |
| CPU time | 18.94 seconds |
| Started | Sep 11 08:22:39 AM UTC 24 |
| Finished | Sep 11 08:22:59 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=605513975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_suspend.605513975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.3261935576 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 3295143463 ps |
| CPU time | 97.82 seconds |
| Started | Sep 11 08:22:39 AM UTC 24 |
| Finished | Sep 11 08:24:19 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3261935576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.3261935576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.1472515877 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 1952785397 ps |
| CPU time | 14.15 seconds |
| Started | Sep 11 08:22:40 AM UTC 24 |
| Finished | Sep 11 08:22:56 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1472515877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.1472515877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.4103954269 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 244102622 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:22:40 AM UTC 24 |
| Finished | Sep 11 08:22:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103954269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.4103954269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.26973704 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 207598848 ps |
| CPU time | 1.74 seconds |
| Started | Sep 11 08:22:40 AM UTC 24 |
| Finished | Sep 11 08:22:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=26973704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.26973704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.2997265998 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 2947113985 ps |
| CPU time | 79.67 seconds |
| Started | Sep 11 08:22:40 AM UTC 24 |
| Finished | Sep 11 08:24:02 AM UTC 24 |
| Peak memory | 227620 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997265998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.2997265998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.934946340 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 2904897182 ps |
| CPU time | 25.06 seconds |
| Started | Sep 11 08:22:42 AM UTC 24 |
| Finished | Sep 11 08:23:09 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=934946340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.934946340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.4088376132 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 3159052919 ps |
| CPU time | 23.77 seconds |
| Started | Sep 11 08:22:42 AM UTC 24 |
| Finished | Sep 11 08:23:07 AM UTC 24 |
| Peak memory | 227656 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4088376132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.4088376132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.4081438869 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 185365067 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:22:43 AM UTC 24 |
| Finished | Sep 11 08:22:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081438869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.4081438869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.4155710858 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 168324116 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:22:44 AM UTC 24 |
| Finished | Sep 11 08:22:47 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4155710858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.4155710858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.2058914562 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 175593489 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:22:45 AM UTC 24 |
| Finished | Sep 11 08:22:48 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058914562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.2058914562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.3704374708 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 198756820 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:22:46 AM UTC 24 |
| Finished | Sep 11 08:22:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704374708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.3704374708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.2998469086 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 202738463 ps |
| CPU time | 1.62 seconds |
| Started | Sep 11 08:22:47 AM UTC 24 |
| Finished | Sep 11 08:22:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998469086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.2998469086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.1593271746 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 149270631 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:22:47 AM UTC 24 |
| Finished | Sep 11 08:22:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593271746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.1593271746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.427605761 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 237873925 ps |
| CPU time | 1.78 seconds |
| Started | Sep 11 08:22:47 AM UTC 24 |
| Finished | Sep 11 08:22:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=427605761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.427605761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.1266159797 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 136076228 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:22:47 AM UTC 24 |
| Finished | Sep 11 08:22:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266159797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.1266159797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.748225540 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 41745280 ps |
| CPU time | 1.08 seconds |
| Started | Sep 11 08:22:50 AM UTC 24 |
| Finished | Sep 11 08:22:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=748225540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_phy_pins_sense.748225540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.816961234 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 15392630590 ps |
| CPU time | 47.07 seconds |
| Started | Sep 11 08:22:50 AM UTC 24 |
| Finished | Sep 11 08:23:38 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=816961234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_pkt_buffer.816961234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.1525187964 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 210149083 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:22:50 AM UTC 24 |
| Finished | Sep 11 08:22:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525187964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_pkt_received.1525187964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.428840567 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 255341540 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:22:50 AM UTC 24 |
| Finished | Sep 11 08:22:52 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=428840567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_pkt_sent.428840567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.603668040 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 6838299562 ps |
| CPU time | 31.55 seconds |
| Started | Sep 11 08:22:50 AM UTC 24 |
| Finished | Sep 11 08:23:23 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=603668040 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.603668040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.4078549002 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 10318080128 ps |
| CPU time | 52.88 seconds |
| Started | Sep 11 08:22:50 AM UTC 24 |
| Finished | Sep 11 08:23:44 AM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4078549002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.4078549002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.1913785881 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 11124135453 ps |
| CPU time | 54.82 seconds |
| Started | Sep 11 08:22:51 AM UTC 24 |
| Finished | Sep 11 08:23:48 AM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913785881 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.1913785881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.3947653160 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 239867255 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:22:50 AM UTC 24 |
| Finished | Sep 11 08:22:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947653160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_random_length_in_transaction.3947653160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.3922159565 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 172115569 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:22:50 AM UTC 24 |
| Finished | Sep 11 08:22:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922159565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.3922159565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.4089555915 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 20165255110 ps |
| CPU time | 46.49 seconds |
| Started | Sep 11 08:22:51 AM UTC 24 |
| Finished | Sep 11 08:23:39 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089555915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.4089555915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.3061673265 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 157911755 ps |
| CPU time | 1.49 seconds |
| Started | Sep 11 08:22:51 AM UTC 24 |
| Finished | Sep 11 08:22:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3061673265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_rx_crc_err.3061673265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.1221977711 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 154744265 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:22:52 AM UTC 24 |
| Finished | Sep 11 08:22:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221977711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.1221977711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.1093504087 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 160902830 ps |
| CPU time | 1.32 seconds |
| Started | Sep 11 08:22:53 AM UTC 24 |
| Finished | Sep 11 08:22:55 AM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1093504087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.1093504087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.643317772 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 183331617 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:22:53 AM UTC 24 |
| Finished | Sep 11 08:22:56 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=643317772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.643317772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.1257355836 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 1736335666 ps |
| CPU time | 46.62 seconds |
| Started | Sep 11 08:22:53 AM UTC 24 |
| Finished | Sep 11 08:23:41 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1257355836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.1257355836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.1385926763 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 230539838 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:22:53 AM UTC 24 |
| Finished | Sep 11 08:22:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385926763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.1385926763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.3001431152 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 191292551 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:22:53 AM UTC 24 |
| Finished | Sep 11 08:22:56 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001431152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_stall_trans.3001431152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.1564431804 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 984533136 ps |
| CPU time | 4.4 seconds |
| Started | Sep 11 08:22:55 AM UTC 24 |
| Finished | Sep 11 08:23:00 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564431804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.1564431804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.737377678 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 3247989628 ps |
| CPU time | 38.79 seconds |
| Started | Sep 11 08:22:53 AM UTC 24 |
| Finished | Sep 11 08:23:33 AM UTC 24 |
| Peak memory | 227652 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=737377678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_streaming_out.737377678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.2364212805 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 11726604956 ps |
| CPU time | 77.71 seconds |
| Started | Sep 11 08:22:55 AM UTC 24 |
| Finished | Sep 11 08:24:14 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2364212805 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.2364212805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.2010675632 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 707937021 ps |
| CPU time | 16.24 seconds |
| Started | Sep 11 08:22:31 AM UTC 24 |
| Finished | Sep 11 08:22:48 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010675632 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.2010675632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.1024367103 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 495212639 ps |
| CPU time | 2.47 seconds |
| Started | Sep 11 08:22:56 AM UTC 24 |
| Finished | Sep 11 08:23:00 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1024367103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx _rx_disruption.1024367103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.2240127106 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 155470688 ps |
| CPU time | 1.41 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240127106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.2240127106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.3653921753 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 202934894 ps |
| CPU time | 0.94 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:33 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653921753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 70.usbdev_fifo_levels.3653921753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.620437159 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 641898252 ps |
| CPU time | 1.86 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=620437159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_tx _rx_disruption.620437159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.3516523107 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 529990735 ps |
| CPU time | 2.13 seconds |
| Started | Sep 11 08:35:31 AM UTC 24 |
| Finished | Sep 11 08:35:35 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3516523107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_t x_rx_disruption.3516523107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.3737272453 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 269447016 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737272453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.3737272453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.4050783685 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 579196634 ps |
| CPU time | 2.17 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4050783685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_t x_rx_disruption.4050783685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.3651975670 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 329979975 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651975670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.3651975670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.4193305780 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 263346132 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4193305780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 73.usbdev_fifo_levels.4193305780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.2497883419 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 665090764 ps |
| CPU time | 2.12 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2497883419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.2497883419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.2253654979 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 166601920 ps |
| CPU time | 1.11 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253654979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.2253654979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.1924081937 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 159996418 ps |
| CPU time | 0.98 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:35 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924081937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 74.usbdev_fifo_levels.1924081937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.2676913631 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 537548008 ps |
| CPU time | 2.13 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:37 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2676913631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.2676913631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.241291873 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 585617168 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=241291873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.241291873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.3466580717 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 256484647 ps |
| CPU time | 1.25 seconds |
| Started | Sep 11 08:35:33 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3466580717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 75.usbdev_fifo_levels.3466580717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.3140146021 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 661028436 ps |
| CPU time | 2.31 seconds |
| Started | Sep 11 08:35:34 AM UTC 24 |
| Finished | Sep 11 08:35:37 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3140146021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_t x_rx_disruption.3140146021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.379284420 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 533167347 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:35:34 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=379284420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.379284420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.2102568130 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 292974997 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:35:34 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102568130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 76.usbdev_fifo_levels.2102568130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.2806609464 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 538362545 ps |
| CPU time | 2.09 seconds |
| Started | Sep 11 08:35:34 AM UTC 24 |
| Finished | Sep 11 08:35:37 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2806609464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_t x_rx_disruption.2806609464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.916056788 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 490357140 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:35:34 AM UTC 24 |
| Finished | Sep 11 08:35:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=916056788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.916056788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.3470190479 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 186291187 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:35:35 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470190479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 77.usbdev_fifo_levels.3470190479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.2021177392 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 673454017 ps |
| CPU time | 1.99 seconds |
| Started | Sep 11 08:35:35 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2021177392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_t x_rx_disruption.2021177392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.2144273090 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 520304991 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:35:36 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2144273090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_t x_rx_disruption.2144273090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.3891064260 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 468234577 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:35:36 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891064260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.3891064260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.776217019 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 268682775 ps |
| CPU time | 1.63 seconds |
| Started | Sep 11 08:35:36 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=776217019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 79.usbdev_fifo_levels.776217019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.198748491 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 525751146 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:35:36 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=198748491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_tx _rx_disruption.198748491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.3222574508 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 29407169 ps |
| CPU time | 1.05 seconds |
| Started | Sep 11 08:23:28 AM UTC 24 |
| Finished | Sep 11 08:23:30 AM UTC 24 |
| Peak memory | 214764 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3222574508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.3222574508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.4207638472 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 9706602006 ps |
| CPU time | 24.05 seconds |
| Started | Sep 11 08:22:56 AM UTC 24 |
| Finished | Sep 11 08:23:22 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207638472 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.4207638472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.2344154158 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 19308765695 ps |
| CPU time | 25.05 seconds |
| Started | Sep 11 08:22:56 AM UTC 24 |
| Finished | Sep 11 08:23:23 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344154158 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.2344154158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.3106781885 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 24235709396 ps |
| CPU time | 46.94 seconds |
| Started | Sep 11 08:22:57 AM UTC 24 |
| Finished | Sep 11 08:23:45 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106781885 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.3106781885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.3780003593 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 207338586 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:22:57 AM UTC 24 |
| Finished | Sep 11 08:22:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3780003593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.3780003593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.1067417583 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 160380571 ps |
| CPU time | 1.54 seconds |
| Started | Sep 11 08:22:58 AM UTC 24 |
| Finished | Sep 11 08:23:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067417583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.1067417583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.1141597384 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 466084818 ps |
| CPU time | 2.94 seconds |
| Started | Sep 11 08:22:59 AM UTC 24 |
| Finished | Sep 11 08:23:03 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1141597384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.1141597384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.273748944 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 410736798 ps |
| CPU time | 2.49 seconds |
| Started | Sep 11 08:22:59 AM UTC 24 |
| Finished | Sep 11 08:23:02 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=273748944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.273748944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.5254166 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 43269198260 ps |
| CPU time | 86.5 seconds |
| Started | Sep 11 08:22:59 AM UTC 24 |
| Finished | Sep 11 08:24:27 AM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=5254166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_device_address.5254166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.1815118448 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 3866982789 ps |
| CPU time | 43.22 seconds |
| Started | Sep 11 08:23:00 AM UTC 24 |
| Finished | Sep 11 08:23:45 AM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815118448 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.1815118448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.1198259928 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 582627107 ps |
| CPU time | 2.99 seconds |
| Started | Sep 11 08:23:00 AM UTC 24 |
| Finished | Sep 11 08:23:04 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198259928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.1198259928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.3578459600 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 143372373 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:23:02 AM UTC 24 |
| Finished | Sep 11 08:23:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3578459600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_disconnected.3578459600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_enable.2637943415 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 57219537 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:23:02 AM UTC 24 |
| Finished | Sep 11 08:23:04 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637943415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.2637943415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.1021173875 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 939870766 ps |
| CPU time | 4.24 seconds |
| Started | Sep 11 08:23:02 AM UTC 24 |
| Finished | Sep 11 08:23:08 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021173875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.1021173875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.1863214778 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 464039250 ps |
| CPU time | 2.51 seconds |
| Started | Sep 11 08:23:02 AM UTC 24 |
| Finished | Sep 11 08:23:06 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863214778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.1863214778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.1866316811 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 155230625 ps |
| CPU time | 1.4 seconds |
| Started | Sep 11 08:23:04 AM UTC 24 |
| Finished | Sep 11 08:23:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866316811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_fifo_levels.1866316811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.162053045 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 413534896 ps |
| CPU time | 3.66 seconds |
| Started | Sep 11 08:23:04 AM UTC 24 |
| Finished | Sep 11 08:23:08 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=162053045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_fifo_rst.162053045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.1788515376 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 234617935 ps |
| CPU time | 2.35 seconds |
| Started | Sep 11 08:23:05 AM UTC 24 |
| Finished | Sep 11 08:23:08 AM UTC 24 |
| Peak memory | 227332 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788515376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.1788515376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.2980043261 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 147026624 ps |
| CPU time | 1.43 seconds |
| Started | Sep 11 08:23:06 AM UTC 24 |
| Finished | Sep 11 08:23:09 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980043261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.2980043261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.3894552372 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 178329516 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:23:06 AM UTC 24 |
| Finished | Sep 11 08:23:09 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894552372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_trans.3894552372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.1165260256 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 3015673729 ps |
| CPU time | 30.33 seconds |
| Started | Sep 11 08:23:05 AM UTC 24 |
| Finished | Sep 11 08:23:37 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165260256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.1165260256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.2187973583 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 9629718562 ps |
| CPU time | 99.09 seconds |
| Started | Sep 11 08:23:07 AM UTC 24 |
| Finished | Sep 11 08:24:48 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2187973583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.2187973583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.851664525 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 185465206 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:23:08 AM UTC 24 |
| Finished | Sep 11 08:23:10 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=851664525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_link_in_err.851664525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.3725091282 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 25979187378 ps |
| CPU time | 46.6 seconds |
| Started | Sep 11 08:23:08 AM UTC 24 |
| Finished | Sep 11 08:23:56 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3725091282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.3725091282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.3425127073 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 8549475683 ps |
| CPU time | 24.03 seconds |
| Started | Sep 11 08:23:08 AM UTC 24 |
| Finished | Sep 11 08:23:33 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3425127073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_link_suspend.3425127073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.235927569 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 2768104266 ps |
| CPU time | 30 seconds |
| Started | Sep 11 08:23:10 AM UTC 24 |
| Finished | Sep 11 08:23:41 AM UTC 24 |
| Peak memory | 234296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=235927569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.235927569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.3641734418 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 2568514863 ps |
| CPU time | 28.6 seconds |
| Started | Sep 11 08:23:10 AM UTC 24 |
| Finished | Sep 11 08:23:40 AM UTC 24 |
| Peak memory | 234232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641734418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.3641734418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.570720542 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 279874168 ps |
| CPU time | 1.83 seconds |
| Started | Sep 11 08:23:10 AM UTC 24 |
| Finished | Sep 11 08:23:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=570720542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.570720542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.1869024245 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 190048401 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:23:10 AM UTC 24 |
| Finished | Sep 11 08:23:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869024245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.1869024245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.1574020082 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 1780683031 ps |
| CPU time | 51.01 seconds |
| Started | Sep 11 08:23:10 AM UTC 24 |
| Finished | Sep 11 08:24:02 AM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574020082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.1574020082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.499436977 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 2301610393 ps |
| CPU time | 17.45 seconds |
| Started | Sep 11 08:23:10 AM UTC 24 |
| Finished | Sep 11 08:23:29 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=499436977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.499436977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.1900725448 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 1830860008 ps |
| CPU time | 21.17 seconds |
| Started | Sep 11 08:23:12 AM UTC 24 |
| Finished | Sep 11 08:23:34 AM UTC 24 |
| Peak memory | 229380 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1900725448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.1900725448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.2354230350 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 193332148 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:23:12 AM UTC 24 |
| Finished | Sep 11 08:23:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2354230350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.2354230350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.197887627 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 143069988 ps |
| CPU time | 1.28 seconds |
| Started | Sep 11 08:23:12 AM UTC 24 |
| Finished | Sep 11 08:23:14 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197887627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.197887627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.1557745033 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 219513169 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:23:12 AM UTC 24 |
| Finished | Sep 11 08:23:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557745033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_nak_trans.1557745033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.1082408951 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 183447473 ps |
| CPU time | 1.55 seconds |
| Started | Sep 11 08:23:14 AM UTC 24 |
| Finished | Sep 11 08:23:17 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1082408951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.1082408951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.321209482 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 193950201 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:23:14 AM UTC 24 |
| Finished | Sep 11 08:23:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=321209482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_out_stall.321209482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.200585232 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 155869203 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:23:14 AM UTC 24 |
| Finished | Sep 11 08:23:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=200585232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_out_trans_nak.200585232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.2939857357 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 210428930 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:23:14 AM UTC 24 |
| Finished | Sep 11 08:23:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939857357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.2939857357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.37278174 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 189485186 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:23:14 AM UTC 24 |
| Finished | Sep 11 08:23:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=37278174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.37278174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.2413164074 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 151293287 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:23:15 AM UTC 24 |
| Finished | Sep 11 08:23:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2413164074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.2413164074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.1127938071 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 43446365 ps |
| CPU time | 1.03 seconds |
| Started | Sep 11 08:23:16 AM UTC 24 |
| Finished | Sep 11 08:23:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127938071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.1127938071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.859333417 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 13095362804 ps |
| CPU time | 36.74 seconds |
| Started | Sep 11 08:23:16 AM UTC 24 |
| Finished | Sep 11 08:23:54 AM UTC 24 |
| Peak memory | 231752 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=859333417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_pkt_buffer.859333417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.4124288754 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 147401026 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:23:18 AM UTC 24 |
| Finished | Sep 11 08:23:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124288754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_pkt_received.4124288754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.3901299027 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 215038643 ps |
| CPU time | 1.56 seconds |
| Started | Sep 11 08:23:18 AM UTC 24 |
| Finished | Sep 11 08:23:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901299027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.3901299027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.2119239772 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 5749036370 ps |
| CPU time | 75.01 seconds |
| Started | Sep 11 08:23:18 AM UTC 24 |
| Finished | Sep 11 08:24:35 AM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2119239772 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.2119239772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.960105335 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 6437001930 ps |
| CPU time | 92.29 seconds |
| Started | Sep 11 08:23:19 AM UTC 24 |
| Finished | Sep 11 08:24:54 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=960105335 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.960105335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.148858265 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 228806800 ps |
| CPU time | 1.72 seconds |
| Started | Sep 11 08:23:18 AM UTC 24 |
| Finished | Sep 11 08:23:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=148858265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_random_length_in_transaction.148858265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.273831324 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 143368250 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:23:18 AM UTC 24 |
| Finished | Sep 11 08:23:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=273831324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.273831324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.1067244521 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 20194256100 ps |
| CPU time | 29.7 seconds |
| Started | Sep 11 08:23:20 AM UTC 24 |
| Finished | Sep 11 08:23:51 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067244521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.1067244521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.3687039935 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 144188617 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:23:22 AM UTC 24 |
| Finished | Sep 11 08:23:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687039935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.3687039935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.104854413 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 375958203 ps |
| CPU time | 2.39 seconds |
| Started | Sep 11 08:23:22 AM UTC 24 |
| Finished | Sep 11 08:23:26 AM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=104854413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_rx_full.104854413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.1398753144 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 154585608 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:23:23 AM UTC 24 |
| Finished | Sep 11 08:23:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398753144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.1398753144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.3313749229 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 169671423 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:23:23 AM UTC 24 |
| Finished | Sep 11 08:23:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313749229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.3313749229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.419371381 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 186942357 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:23:23 AM UTC 24 |
| Finished | Sep 11 08:23:25 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=419371381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.419371381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.3825134824 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 2446919503 ps |
| CPU time | 64.6 seconds |
| Started | Sep 11 08:23:23 AM UTC 24 |
| Finished | Sep 11 08:24:29 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825134824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.3825134824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.734320970 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 164367573 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:23:24 AM UTC 24 |
| Finished | Sep 11 08:23:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=734320970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.734320970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.3407700458 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 168455466 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:23:24 AM UTC 24 |
| Finished | Sep 11 08:23:27 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407700458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.3407700458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.3747044313 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 1138917264 ps |
| CPU time | 4.88 seconds |
| Started | Sep 11 08:23:25 AM UTC 24 |
| Finished | Sep 11 08:23:31 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3747044313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.3747044313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.2249461985 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 2610497801 ps |
| CPU time | 26.01 seconds |
| Started | Sep 11 08:23:24 AM UTC 24 |
| Finished | Sep 11 08:23:52 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249461985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.2249461985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.2698314438 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 7503601605 ps |
| CPU time | 109.25 seconds |
| Started | Sep 11 08:23:27 AM UTC 24 |
| Finished | Sep 11 08:25:18 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2698314438 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.2698314438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.2612570988 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 4281982110 ps |
| CPU time | 27.66 seconds |
| Started | Sep 11 08:23:00 AM UTC 24 |
| Finished | Sep 11 08:23:29 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2612570988 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.2612570988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.2071451584 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 586831484 ps |
| CPU time | 2.59 seconds |
| Started | Sep 11 08:23:27 AM UTC 24 |
| Finished | Sep 11 08:23:30 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2071451584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.2071451584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.3832567006 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 294956170 ps |
| CPU time | 1.31 seconds |
| Started | Sep 11 08:35:36 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832567006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.3832567006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.887445534 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 270218619 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:35:36 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=887445534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 80.usbdev_fifo_levels.887445534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.1910680647 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 483160820 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:35:36 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1910680647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_t x_rx_disruption.1910680647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.3408931506 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 396787311 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:35:36 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3408931506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.3408931506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.4201190127 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 252779417 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:35:36 AM UTC 24 |
| Finished | Sep 11 08:35:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4201190127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 81.usbdev_fifo_levels.4201190127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/81.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.3449288714 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 635383979 ps |
| CPU time | 1.82 seconds |
| Started | Sep 11 08:35:38 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3449288714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_t x_rx_disruption.3449288714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.4218811837 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 152811957 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:35:38 AM UTC 24 |
| Finished | Sep 11 08:35:40 AM UTC 24 |
| Peak memory | 214632 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4218811837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.4218811837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.432393114 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 284284460 ps |
| CPU time | 1.18 seconds |
| Started | Sep 11 08:35:38 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=432393114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 82.usbdev_fifo_levels.432393114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/82.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.2310580835 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 451863192 ps |
| CPU time | 1.8 seconds |
| Started | Sep 11 08:35:38 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2310580835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.2310580835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.234235746 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 459294527 ps |
| CPU time | 1.53 seconds |
| Started | Sep 11 08:35:38 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=234235746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.234235746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.599135534 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 250598053 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:35:38 AM UTC 24 |
| Finished | Sep 11 08:35:40 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=599135534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 83.usbdev_fifo_levels.599135534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.2615973467 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 687544797 ps |
| CPU time | 1.92 seconds |
| Started | Sep 11 08:35:38 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2615973467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.2615973467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.2651793223 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 229669076 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:35:38 AM UTC 24 |
| Finished | Sep 11 08:35:40 AM UTC 24 |
| Peak memory | 214680 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2651793223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.2651793223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.1860215467 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 285537027 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860215467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 84.usbdev_fifo_levels.1860215467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.1406522712 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 525703395 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1406522712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_t x_rx_disruption.1406522712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.416044211 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 462450603 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=416044211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.416044211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.4120017525 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 269445342 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120017525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 85.usbdev_fifo_levels.4120017525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.1696791197 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 628465881 ps |
| CPU time | 2.05 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:42 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1696791197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.1696791197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.3864464544 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 147259807 ps |
| CPU time | 0.86 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864464544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.3864464544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.1339904962 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 314787248 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1339904962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 86.usbdev_fifo_levels.1339904962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.356021889 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 626872807 ps |
| CPU time | 1.87 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=356021889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_tx _rx_disruption.356021889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.1024086873 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 265787561 ps |
| CPU time | 1.17 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024086873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.1024086873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.346100782 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 279126826 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=346100782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 87.usbdev_fifo_levels.346100782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.691291875 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 519594267 ps |
| CPU time | 1.91 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=691291875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_tx _rx_disruption.691291875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.2600448697 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 534611910 ps |
| CPU time | 1.7 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2600448697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.2600448697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.1243114933 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 204171241 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243114933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 88.usbdev_fifo_levels.1243114933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.534718750 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 540361643 ps |
| CPU time | 1.47 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=534718750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_tx _rx_disruption.534718750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.1487995429 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 245579908 ps |
| CPU time | 0.97 seconds |
| Started | Sep 11 08:35:39 AM UTC 24 |
| Finished | Sep 11 08:35:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487995429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.1487995429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.1938898090 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 249289685 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1938898090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 89.usbdev_fifo_levels.1938898090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.2290764520 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 489327903 ps |
| CPU time | 1.77 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:43 AM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2290764520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_t x_rx_disruption.2290764520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.3467711174 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 51052032 ps |
| CPU time | 1.02 seconds |
| Started | Sep 11 08:23:53 AM UTC 24 |
| Finished | Sep 11 08:23:55 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467711174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.3467711174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.3793579233 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 9902990541 ps |
| CPU time | 19.83 seconds |
| Started | Sep 11 08:23:28 AM UTC 24 |
| Finished | Sep 11 08:23:49 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793579233 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.3793579233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.2807765509 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 19581106113 ps |
| CPU time | 34.22 seconds |
| Started | Sep 11 08:23:29 AM UTC 24 |
| Finished | Sep 11 08:24:06 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807765509 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.2807765509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.3437324809 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 23678671772 ps |
| CPU time | 37.07 seconds |
| Started | Sep 11 08:23:29 AM UTC 24 |
| Finished | Sep 11 08:24:08 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3437324809 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.3437324809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.2882901737 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 195810002 ps |
| CPU time | 1.71 seconds |
| Started | Sep 11 08:23:29 AM UTC 24 |
| Finished | Sep 11 08:23:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2882901737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.2882901737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.372361112 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 158231423 ps |
| CPU time | 1.44 seconds |
| Started | Sep 11 08:23:30 AM UTC 24 |
| Finished | Sep 11 08:23:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=372361112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_bitstuff_err.372361112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.998171280 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 534605133 ps |
| CPU time | 2.85 seconds |
| Started | Sep 11 08:23:32 AM UTC 24 |
| Finished | Sep 11 08:23:36 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=998171280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_data_toggle_clear.998171280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.975843271 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 852113168 ps |
| CPU time | 3.98 seconds |
| Started | Sep 11 08:23:32 AM UTC 24 |
| Finished | Sep 11 08:23:37 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=975843271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.975843271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.1726572967 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 28247961838 ps |
| CPU time | 58.24 seconds |
| Started | Sep 11 08:23:33 AM UTC 24 |
| Finished | Sep 11 08:24:33 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726572967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.1726572967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.675343654 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 272688326 ps |
| CPU time | 4.1 seconds |
| Started | Sep 11 08:23:34 AM UTC 24 |
| Finished | Sep 11 08:23:39 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=675343654 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.675343654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.2418447578 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 709833996 ps |
| CPU time | 3.26 seconds |
| Started | Sep 11 08:23:34 AM UTC 24 |
| Finished | Sep 11 08:23:39 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2418447578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.2418447578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.3813318686 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 165189625 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:23:34 AM UTC 24 |
| Finished | Sep 11 08:23:36 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813318686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_disconnected.3813318686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_enable.747509454 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 43208771 ps |
| CPU time | 1.1 seconds |
| Started | Sep 11 08:23:35 AM UTC 24 |
| Finished | Sep 11 08:23:38 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=747509454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_enable.747509454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.1931039842 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 904676266 ps |
| CPU time | 3.35 seconds |
| Started | Sep 11 08:23:37 AM UTC 24 |
| Finished | Sep 11 08:23:42 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931039842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.1931039842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.3152239642 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 617594631 ps |
| CPU time | 3.05 seconds |
| Started | Sep 11 08:23:37 AM UTC 24 |
| Finished | Sep 11 08:23:41 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152239642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.3152239642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.1587629727 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 162765979 ps |
| CPU time | 1.29 seconds |
| Started | Sep 11 08:23:37 AM UTC 24 |
| Finished | Sep 11 08:23:40 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1587629727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_fifo_levels.1587629727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.1200178011 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 289024081 ps |
| CPU time | 2.37 seconds |
| Started | Sep 11 08:23:37 AM UTC 24 |
| Finished | Sep 11 08:23:41 AM UTC 24 |
| Peak memory | 216696 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200178011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_fifo_rst.1200178011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.1591163842 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 229106807 ps |
| CPU time | 1.84 seconds |
| Started | Sep 11 08:23:40 AM UTC 24 |
| Finished | Sep 11 08:23:43 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591163842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.1591163842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.376577724 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 177555767 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:23:40 AM UTC 24 |
| Finished | Sep 11 08:23:42 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=376577724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_in_stall.376577724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.875516983 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 237476427 ps |
| CPU time | 1.35 seconds |
| Started | Sep 11 08:23:40 AM UTC 24 |
| Finished | Sep 11 08:23:42 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=875516983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_in_trans.875516983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.1137077221 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 4594904526 ps |
| CPU time | 46.48 seconds |
| Started | Sep 11 08:23:37 AM UTC 24 |
| Finished | Sep 11 08:24:25 AM UTC 24 |
| Peak memory | 234192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1137077221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.1137077221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.2389289148 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 6374076007 ps |
| CPU time | 43.28 seconds |
| Started | Sep 11 08:23:40 AM UTC 24 |
| Finished | Sep 11 08:24:25 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2389289148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.2389289148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.3998728216 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 238699994 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:23:40 AM UTC 24 |
| Finished | Sep 11 08:23:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998728216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_in_err.3998728216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.868840480 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 3789264861 ps |
| CPU time | 8.84 seconds |
| Started | Sep 11 08:23:40 AM UTC 24 |
| Finished | Sep 11 08:23:50 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=868840480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_suspend.868840480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.3625952192 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 5064007818 ps |
| CPU time | 50.94 seconds |
| Started | Sep 11 08:23:42 AM UTC 24 |
| Finished | Sep 11 08:24:34 AM UTC 24 |
| Peak memory | 231564 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3625952192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.3625952192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.2783957243 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 3735025959 ps |
| CPU time | 27.01 seconds |
| Started | Sep 11 08:23:42 AM UTC 24 |
| Finished | Sep 11 08:24:10 AM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2783957243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.2783957243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.2903072651 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 280416802 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:23:42 AM UTC 24 |
| Finished | Sep 11 08:23:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903072651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.2903072651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.2740274435 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 189490870 ps |
| CPU time | 1.5 seconds |
| Started | Sep 11 08:23:42 AM UTC 24 |
| Finished | Sep 11 08:23:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740274435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.2740274435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.4092989959 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 2002973994 ps |
| CPU time | 14.86 seconds |
| Started | Sep 11 08:23:42 AM UTC 24 |
| Finished | Sep 11 08:23:58 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4092989959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.4092989959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.95847568 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 4171984088 ps |
| CPU time | 42.95 seconds |
| Started | Sep 11 08:23:42 AM UTC 24 |
| Finished | Sep 11 08:24:27 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=95847568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.95847568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.4204762044 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 2999452287 ps |
| CPU time | 79.6 seconds |
| Started | Sep 11 08:23:42 AM UTC 24 |
| Finished | Sep 11 08:25:04 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204762044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.4204762044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.1591761566 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 176385403 ps |
| CPU time | 1.22 seconds |
| Started | Sep 11 08:23:44 AM UTC 24 |
| Finished | Sep 11 08:23:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591761566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.1591761566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.1356458618 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 144516074 ps |
| CPU time | 1.37 seconds |
| Started | Sep 11 08:23:44 AM UTC 24 |
| Finished | Sep 11 08:23:46 AM UTC 24 |
| Peak memory | 214836 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356458618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.1356458618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.3553950812 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 206750886 ps |
| CPU time | 1.65 seconds |
| Started | Sep 11 08:23:44 AM UTC 24 |
| Finished | Sep 11 08:23:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3553950812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.3553950812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.1369827416 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 174532059 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:23:44 AM UTC 24 |
| Finished | Sep 11 08:23:46 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369827416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_out_iso.1369827416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.3426837331 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 168880731 ps |
| CPU time | 1.33 seconds |
| Started | Sep 11 08:23:44 AM UTC 24 |
| Finished | Sep 11 08:23:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3426837331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.3426837331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.3246853101 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 161699159 ps |
| CPU time | 1.42 seconds |
| Started | Sep 11 08:23:44 AM UTC 24 |
| Finished | Sep 11 08:23:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246853101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_out_trans_nak.3246853101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.611046863 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 147871938 ps |
| CPU time | 1.34 seconds |
| Started | Sep 11 08:23:45 AM UTC 24 |
| Finished | Sep 11 08:23:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=611046863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pending_in_trans.611046863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.2000582155 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 233186266 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:23:45 AM UTC 24 |
| Finished | Sep 11 08:23:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000582155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.2000582155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.2921986250 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 150113211 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:23:45 AM UTC 24 |
| Finished | Sep 11 08:23:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2921986250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.2921986250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.3021547818 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 33577760 ps |
| CPU time | 1.06 seconds |
| Started | Sep 11 08:23:45 AM UTC 24 |
| Finished | Sep 11 08:23:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021547818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.3021547818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.1242071734 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 8877935812 ps |
| CPU time | 25.4 seconds |
| Started | Sep 11 08:23:47 AM UTC 24 |
| Finished | Sep 11 08:24:14 AM UTC 24 |
| Peak memory | 234192 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242071734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.1242071734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.4070426387 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 173409685 ps |
| CPU time | 1.48 seconds |
| Started | Sep 11 08:23:47 AM UTC 24 |
| Finished | Sep 11 08:23:50 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4070426387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.4070426387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.105394272 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 247175580 ps |
| CPU time | 1.68 seconds |
| Started | Sep 11 08:23:47 AM UTC 24 |
| Finished | Sep 11 08:23:50 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=105394272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_pkt_sent.105394272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.348209743 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 3455266002 ps |
| CPU time | 29.49 seconds |
| Started | Sep 11 08:23:47 AM UTC 24 |
| Finished | Sep 11 08:24:18 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=348209743 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.348209743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.3733284730 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 1801599872 ps |
| CPU time | 11.99 seconds |
| Started | Sep 11 08:23:48 AM UTC 24 |
| Finished | Sep 11 08:24:01 AM UTC 24 |
| Peak memory | 234132 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733284730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.3733284730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.484390574 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 7395373425 ps |
| CPU time | 99.09 seconds |
| Started | Sep 11 08:23:48 AM UTC 24 |
| Finished | Sep 11 08:25:29 AM UTC 24 |
| Peak memory | 227728 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=484390574 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.484390574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.2829462896 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 241578894 ps |
| CPU time | 1.82 seconds |
| Started | Sep 11 08:23:47 AM UTC 24 |
| Finished | Sep 11 08:23:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2829462896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_random_length_in_transaction.2829462896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.689307637 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 189942227 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:23:47 AM UTC 24 |
| Finished | Sep 11 08:23:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=689307637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.689307637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.3808403074 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 20158414737 ps |
| CPU time | 31.92 seconds |
| Started | Sep 11 08:23:50 AM UTC 24 |
| Finished | Sep 11 08:24:23 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808403074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_resume_link_active.3808403074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.921758497 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 187601386 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:23:50 AM UTC 24 |
| Finished | Sep 11 08:23:52 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921758497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_rx_crc_err.921758497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.2722613683 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 346684337 ps |
| CPU time | 1.89 seconds |
| Started | Sep 11 08:23:50 AM UTC 24 |
| Finished | Sep 11 08:23:53 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722613683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.2722613683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.2993397094 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 211291961 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:23:50 AM UTC 24 |
| Finished | Sep 11 08:23:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993397094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.2993397094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.22958436 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 163683829 ps |
| CPU time | 1.39 seconds |
| Started | Sep 11 08:23:50 AM UTC 24 |
| Finished | Sep 11 08:23:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=22958436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_setup_trans_ignored.22958436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.2071802026 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 210259650 ps |
| CPU time | 1.69 seconds |
| Started | Sep 11 08:23:50 AM UTC 24 |
| Finished | Sep 11 08:23:53 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071802026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.2071802026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.619832885 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 3048336265 ps |
| CPU time | 33.1 seconds |
| Started | Sep 11 08:23:51 AM UTC 24 |
| Finished | Sep 11 08:24:26 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=619832885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.619832885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.3655723564 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 189201193 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:23:51 AM UTC 24 |
| Finished | Sep 11 08:23:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3655723564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.3655723564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.1255078275 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 191554662 ps |
| CPU time | 1.46 seconds |
| Started | Sep 11 08:23:52 AM UTC 24 |
| Finished | Sep 11 08:23:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255078275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_stall_trans.1255078275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.1608819671 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 617634550 ps |
| CPU time | 2.44 seconds |
| Started | Sep 11 08:23:52 AM UTC 24 |
| Finished | Sep 11 08:23:55 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1608819671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.1608819671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.477228883 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 2453868302 ps |
| CPU time | 22.78 seconds |
| Started | Sep 11 08:23:52 AM UTC 24 |
| Finished | Sep 11 08:24:16 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477228883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_streaming_out.477228883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.211789249 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 9707247068 ps |
| CPU time | 47.18 seconds |
| Started | Sep 11 08:23:52 AM UTC 24 |
| Finished | Sep 11 08:24:40 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=211789249 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_1 0/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.211789249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.2522375221 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 2987351348 ps |
| CPU time | 24.1 seconds |
| Started | Sep 11 08:23:34 AM UTC 24 |
| Finished | Sep 11 08:24:00 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522375221 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.2522375221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.1016228625 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 607947494 ps |
| CPU time | 2.06 seconds |
| Started | Sep 11 08:23:53 AM UTC 24 |
| Finished | Sep 11 08:23:56 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1016228625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.1016228625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.4288873999 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 246425157 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288873999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 90.usbdev_fifo_levels.4288873999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/90.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.1210610953 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 486439383 ps |
| CPU time | 1.67 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1210610953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.1210610953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.3250639931 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 532485454 ps |
| CPU time | 1.58 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250639931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.3250639931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.3324088539 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 288646020 ps |
| CPU time | 1.24 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324088539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 91.usbdev_fifo_levels.3324088539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/91.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.441792183 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 545581962 ps |
| CPU time | 1.82 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=441792183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_tx _rx_disruption.441792183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.3169832663 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 293445400 ps |
| CPU time | 1.19 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3169832663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.3169832663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.1320391092 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 291295349 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320391092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 92.usbdev_fifo_levels.1320391092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/92.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.3806759977 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 497075035 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:35:41 AM UTC 24 |
| Finished | Sep 11 08:35:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3806759977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.3806759977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.308966101 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 267112635 ps |
| CPU time | 1.04 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=308966101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.308966101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.1706918650 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 255804452 ps |
| CPU time | 1.12 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1706918650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 93.usbdev_fifo_levels.1706918650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/93.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.2458081927 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 490366912 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2458081927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.2458081927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.2617252594 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 232322246 ps |
| CPU time | 1.09 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:45 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2617252594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.2617252594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.4037294561 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 193422791 ps |
| CPU time | 0.94 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037294561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 94.usbdev_fifo_levels.4037294561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/94.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.1745647064 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 654514879 ps |
| CPU time | 1.66 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1745647064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_t x_rx_disruption.1745647064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.1050455517 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 572466810 ps |
| CPU time | 1.64 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1050455517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.1050455517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.752963519 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 190499318 ps |
| CPU time | 1.02 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=752963519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 95.usbdev_fifo_levels.752963519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1980682886 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 610584314 ps |
| CPU time | 1.79 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1980682886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.1980682886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.2094052993 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 306553774 ps |
| CPU time | 1.14 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094052993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 96.usbdev_fifo_levels.2094052993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.1899937901 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 626518352 ps |
| CPU time | 1.61 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1899937901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_t x_rx_disruption.1899937901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2268533918 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 525981196 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268533918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.2268533918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.20107160 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 246972599 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=20107160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 97.usbdev_fifo_levels.20107160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.1102257812 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 483650932 ps |
| CPU time | 1.45 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1102257812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_t x_rx_disruption.1102257812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.1442573484 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 631022052 ps |
| CPU time | 1.59 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442573484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.1442573484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.2387520580 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 229975142 ps |
| CPU time | 1.01 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2387520580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 98.usbdev_fifo_levels.2387520580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.3924029964 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 493666067 ps |
| CPU time | 1.57 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 214908 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3924029964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.3924029964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.3146031929 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 304923432 ps |
| CPU time | 1.07 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146031929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.3146031929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.2879413207 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 257820351 ps |
| CPU time | 1.21 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2879413207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 99.usbdev_fifo_levels.2879413207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.1749438193 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 501089368 ps |
| CPU time | 1.6 seconds |
| Started | Sep 11 08:35:43 AM UTC 24 |
| Finished | Sep 11 08:35:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.us-west1-a.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1749438193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_t x_rx_disruption.1749438193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |