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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.84 98.06 95.93 97.44 91.53 98.25 98.21 98.46


Total test records in report: 3866
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T2977 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.78295665 Oct 09 09:37:34 PM UTC 24 Oct 09 09:37:37 PM UTC 24 360817805 ps
T2978 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.23213608 Oct 09 09:37:34 PM UTC 24 Oct 09 09:37:37 PM UTC 24 214436458 ps
T2979 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.1793318200 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:37 PM UTC 24 185337427 ps
T2980 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.3367541736 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:37 PM UTC 24 39952079 ps
T2981 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.1480584240 Oct 09 09:37:34 PM UTC 24 Oct 09 09:37:37 PM UTC 24 167508814 ps
T2982 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_enable.1331514991 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:37 PM UTC 24 41663730 ps
T2983 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.3472013005 Oct 09 09:37:36 PM UTC 24 Oct 09 09:37:38 PM UTC 24 190415863 ps
T2984 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.2768968351 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:38 PM UTC 24 235299713 ps
T2985 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.787122279 Oct 09 09:37:36 PM UTC 24 Oct 09 09:37:38 PM UTC 24 172969598 ps
T2986 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.2398694130 Oct 09 09:37:36 PM UTC 24 Oct 09 09:37:38 PM UTC 24 139204362 ps
T2987 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.3837336546 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:38 PM UTC 24 226373293 ps
T2988 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.918100957 Oct 09 09:37:36 PM UTC 24 Oct 09 09:37:38 PM UTC 24 207577801 ps
T2989 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.1961751045 Oct 09 09:37:36 PM UTC 24 Oct 09 09:37:38 PM UTC 24 165797420 ps
T2990 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.1650201410 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:38 PM UTC 24 511363546 ps
T353 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.3476786363 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:38 PM UTC 24 256877987 ps
T444 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.2857831584 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:38 PM UTC 24 327221821 ps
T2991 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.2287823997 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:38 PM UTC 24 259586797 ps
T2992 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.3857933770 Oct 09 09:37:36 PM UTC 24 Oct 09 09:37:38 PM UTC 24 172593806 ps
T2993 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.1320669266 Oct 09 09:37:36 PM UTC 24 Oct 09 09:37:38 PM UTC 24 244586899 ps
T2994 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.2700477882 Oct 09 09:37:36 PM UTC 24 Oct 09 09:37:38 PM UTC 24 203119364 ps
T2995 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.3822726617 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:39 PM UTC 24 714575106 ps
T2996 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.2861060680 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:39 PM UTC 24 265612833 ps
T2997 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.1893632336 Oct 09 09:37:34 PM UTC 24 Oct 09 09:37:39 PM UTC 24 1120957689 ps
T2998 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.561060365 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:39 PM UTC 24 846747580 ps
T2999 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.1123986711 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:41 PM UTC 24 309951064 ps
T3000 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.2149551618 Oct 09 09:36:38 PM UTC 24 Oct 09 09:37:44 PM UTC 24 36849019532 ps
T3001 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.1196528318 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:44 PM UTC 24 489552124 ps
T3002 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.1251928255 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:46 PM UTC 24 6416212878 ps
T3003 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.590546689 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:51 PM UTC 24 11154361870 ps
T3004 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.2627478560 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:52 PM UTC 24 10575418836 ps
T3005 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.2465007091 Oct 09 09:37:34 PM UTC 24 Oct 09 09:37:54 PM UTC 24 2653824957 ps
T3006 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.2752475030 Oct 09 09:37:35 PM UTC 24 Oct 09 09:37:59 PM UTC 24 19374916754 ps
T3007 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.1924497975 Oct 09 09:36:38 PM UTC 24 Oct 09 09:38:05 PM UTC 24 14030244751 ps
T3008 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.556378361 Oct 09 09:37:34 PM UTC 24 Oct 09 09:38:05 PM UTC 24 3455555152 ps
T3009 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.1826625765 Oct 09 09:36:38 PM UTC 24 Oct 09 09:38:09 PM UTC 24 3571934247 ps
T3010 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.2777014604 Oct 09 09:37:36 PM UTC 24 Oct 09 09:38:12 PM UTC 24 1597575059 ps
T3011 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.1642458691 Oct 09 09:37:35 PM UTC 24 Oct 09 09:38:16 PM UTC 24 31262040237 ps
T3012 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.405051610 Oct 09 09:37:35 PM UTC 24 Oct 09 09:38:20 PM UTC 24 27883489947 ps
T3013 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.4194609023 Oct 09 09:35:47 PM UTC 24 Oct 09 09:38:26 PM UTC 24 6340385985 ps
T3014 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.4226366487 Oct 09 09:37:35 PM UTC 24 Oct 09 09:38:27 PM UTC 24 5737519320 ps
T3015 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.3180923168 Oct 09 09:38:26 PM UTC 24 Oct 09 09:38:27 PM UTC 24 37718596 ps
T3016 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.782291444 Oct 09 09:38:26 PM UTC 24 Oct 09 09:38:27 PM UTC 24 183490498 ps
T3017 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.2044837731 Oct 09 09:38:26 PM UTC 24 Oct 09 09:38:28 PM UTC 24 197790088 ps
T3018 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.3131547965 Oct 09 09:38:26 PM UTC 24 Oct 09 09:38:28 PM UTC 24 194090764 ps
T3019 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.1833478036 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:29 PM UTC 24 166989593 ps
T3020 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.3394885052 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 509828452 ps
T3021 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.1381293134 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:29 PM UTC 24 185765924 ps
T3022 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.3274880137 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:29 PM UTC 24 186524762 ps
T451 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.3724391377 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 583853684 ps
T3023 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.2233849137 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:29 PM UTC 24 162094027 ps
T3024 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.1303758279 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:29 PM UTC 24 243849850 ps
T3025 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.2419256534 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:29 PM UTC 24 166064099 ps
T3026 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.174327169 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 264175680 ps
T3027 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.2404133400 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:29 PM UTC 24 222773399 ps
T3028 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.3065937646 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:29 PM UTC 24 305685674 ps
T3029 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.652657717 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 299013214 ps
T3030 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.373560751 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:29 PM UTC 24 234886040 ps
T3031 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.418353344 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:29 PM UTC 24 67558477 ps
T3032 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.573447434 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:30 PM UTC 24 179240611 ps
T3033 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.4145560773 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:30 PM UTC 24 158433436 ps
T3034 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.4219745671 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:30 PM UTC 24 179388719 ps
T343 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.1434134803 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 327522163 ps
T3035 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.1815254763 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:30 PM UTC 24 449909562 ps
T3036 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.172752736 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 596653429 ps
T3037 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_enable.604029631 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:30 PM UTC 24 51918941 ps
T3038 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.1017486695 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:30 PM UTC 24 145775095 ps
T3039 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.1622960341 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:30 PM UTC 24 542506094 ps
T3040 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.3762672754 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:46 PM UTC 24 12247296269 ps
T3041 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.3975879846 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:30 PM UTC 24 181938462 ps
T3042 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.1681606156 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:30 PM UTC 24 172936624 ps
T3043 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.4168503717 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:30 PM UTC 24 203438748 ps
T3044 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.4213405915 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:30 PM UTC 24 443421854 ps
T3045 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.1031563910 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:30 PM UTC 24 214081654 ps
T3046 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.573488271 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:30 PM UTC 24 198094212 ps
T432 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.3548116538 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:31 PM UTC 24 487553889 ps
T3047 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.4240068703 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:31 PM UTC 24 186741852 ps
T3048 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.3644672297 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:31 PM UTC 24 285834262 ps
T3049 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.3918862771 Oct 09 09:37:35 PM UTC 24 Oct 09 09:38:31 PM UTC 24 2301644132 ps
T3050 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.1526289181 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:31 PM UTC 24 904137212 ps
T3051 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.416206363 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:32 PM UTC 24 830353832 ps
T3052 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.866770881 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:32 PM UTC 24 490737000 ps
T3053 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.1575305406 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:34 PM UTC 24 3413491700 ps
T3054 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.4062751487 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:43 PM UTC 24 1586295593 ps
T3055 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.254074684 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:44 PM UTC 24 2368289955 ps
T3056 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.892235124 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:51 PM UTC 24 1152953432 ps
T3057 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.1535918260 Oct 09 09:38:27 PM UTC 24 Oct 09 09:38:51 PM UTC 24 20148951325 ps
T3058 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.2530970994 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:52 PM UTC 24 2558964192 ps
T3059 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.3278617805 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:56 PM UTC 24 1447070637 ps
T3060 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.3533087696 Oct 09 09:38:28 PM UTC 24 Oct 09 09:38:59 PM UTC 24 4579886677 ps
T3061 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.3325651967 Oct 09 09:38:28 PM UTC 24 Oct 09 09:39:00 PM UTC 24 3552031965 ps
T3062 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.3260236071 Oct 09 09:37:35 PM UTC 24 Oct 09 09:39:01 PM UTC 24 3530861991 ps
T3063 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.2162539760 Oct 09 09:38:27 PM UTC 24 Oct 09 09:39:03 PM UTC 24 3955789517 ps
T3064 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.2292234466 Oct 09 09:38:28 PM UTC 24 Oct 09 09:39:09 PM UTC 24 24596108525 ps
T3065 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.3362385725 Oct 09 09:38:26 PM UTC 24 Oct 09 09:39:09 PM UTC 24 18814350951 ps
T3066 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.687694203 Oct 09 09:38:28 PM UTC 24 Oct 09 09:39:11 PM UTC 24 7284437311 ps
T3067 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.2963809017 Oct 09 09:38:27 PM UTC 24 Oct 09 09:39:15 PM UTC 24 30949379631 ps
T3068 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.1765720482 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:27 PM UTC 24 146869412 ps
T3069 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.239868186 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:27 PM UTC 24 190645258 ps
T3070 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.3111076510 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:27 PM UTC 24 166225370 ps
T3071 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.26114389 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:27 PM UTC 24 174661045 ps
T3072 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.2903608960 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:27 PM UTC 24 182218408 ps
T3073 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.2086119472 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:27 PM UTC 24 154896499 ps
T3074 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.2394791994 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:27 PM UTC 24 193542594 ps
T3075 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.136935705 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:27 PM UTC 24 37453526 ps
T3076 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.2424191165 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:28 PM UTC 24 146741377 ps
T3077 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.65386945 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:28 PM UTC 24 220359961 ps
T3078 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.878254376 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:28 PM UTC 24 188288638 ps
T3079 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.3652300158 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:28 PM UTC 24 152933398 ps
T3080 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.4062942756 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:28 PM UTC 24 231465290 ps
T3081 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.800420077 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:28 PM UTC 24 232555050 ps
T3082 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.3508584246 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:28 PM UTC 24 166158673 ps
T3083 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.2630524360 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:28 PM UTC 24 253508443 ps
T3084 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.3524190365 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:28 PM UTC 24 195623079 ps
T3085 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.1051136488 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:28 PM UTC 24 168205576 ps
T321 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.2926653036 Oct 09 09:41:25 PM UTC 24 Oct 09 09:41:27 PM UTC 24 242021975 ps
T3086 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.280201246 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:28 PM UTC 24 181129743 ps
T3087 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.2631109328 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:28 PM UTC 24 53034597 ps
T3088 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.2355884993 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:28 PM UTC 24 205507930 ps
T3089 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.2342764666 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:28 PM UTC 24 224552929 ps
T3090 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.3013791196 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:28 PM UTC 24 246135826 ps
T3091 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.3941265206 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:28 PM UTC 24 224837255 ps
T3092 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_enable.1258429186 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:29 PM UTC 24 63979829 ps
T3093 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.3530850451 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:29 PM UTC 24 180279859 ps
T3094 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.3936804311 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:29 PM UTC 24 199096583 ps
T3095 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.463769493 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:29 PM UTC 24 278842124 ps
T3096 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.3461348566 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:29 PM UTC 24 177846404 ps
T3097 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.2511508601 Oct 09 09:39:27 PM UTC 24 Oct 09 09:39:29 PM UTC 24 173647224 ps
T3098 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.3024823941 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:29 PM UTC 24 541047797 ps
T3099 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.3952694982 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:29 PM UTC 24 180292888 ps
T3100 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.722276426 Oct 09 09:39:27 PM UTC 24 Oct 09 09:39:29 PM UTC 24 195431173 ps
T3101 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.1225755102 Oct 09 09:39:27 PM UTC 24 Oct 09 09:39:29 PM UTC 24 170343765 ps
T3102 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.3480422275 Oct 09 09:39:27 PM UTC 24 Oct 09 09:39:29 PM UTC 24 206898044 ps
T3103 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.4117027389 Oct 09 09:39:27 PM UTC 24 Oct 09 09:39:29 PM UTC 24 252664565 ps
T3104 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.4129689326 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:30 PM UTC 24 653838578 ps
T439 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.1075450063 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:30 PM UTC 24 553444542 ps
T3105 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.4095463174 Oct 09 09:39:27 PM UTC 24 Oct 09 09:39:30 PM UTC 24 201308192 ps
T3106 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.682698698 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:30 PM UTC 24 818559179 ps
T3107 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.1622808896 Oct 09 09:39:27 PM UTC 24 Oct 09 09:39:31 PM UTC 24 208733055 ps
T3108 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.795554597 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:31 PM UTC 24 1225896904 ps
T3109 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.2578273614 Oct 09 09:38:27 PM UTC 24 Oct 09 09:39:33 PM UTC 24 36816172095 ps
T3110 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.1323896306 Oct 09 09:37:35 PM UTC 24 Oct 09 09:39:34 PM UTC 24 10836613404 ps
T3111 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.3632114138 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:35 PM UTC 24 5223933549 ps
T3112 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3130956456 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:41 PM UTC 24 721290559 ps
T3113 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.573017715 Oct 09 09:39:27 PM UTC 24 Oct 09 09:39:42 PM UTC 24 10924493070 ps
T3114 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.1815405484 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:45 PM UTC 24 2103095453 ps
T3115 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.458283850 Oct 09 09:39:27 PM UTC 24 Oct 09 09:39:47 PM UTC 24 2848538431 ps
T3116 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.3724150791 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:47 PM UTC 24 1041058226 ps
T3117 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.1961376196 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:53 PM UTC 24 20782211781 ps
T3118 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.3770858611 Oct 09 09:39:25 PM UTC 24 Oct 09 09:39:53 PM UTC 24 11329060240 ps
T3119 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.2082901496 Oct 09 09:39:26 PM UTC 24 Oct 09 09:39:59 PM UTC 24 23574280005 ps
T3120 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.2305559494 Oct 09 09:39:27 PM UTC 24 Oct 09 09:40:08 PM UTC 24 27036553991 ps
T3121 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.2682884057 Oct 09 09:40:25 PM UTC 24 Oct 09 09:40:27 PM UTC 24 158866834 ps
T3122 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.4157915458 Oct 09 09:40:25 PM UTC 24 Oct 09 09:40:27 PM UTC 24 190032284 ps
T3123 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.1500672503 Oct 09 09:40:25 PM UTC 24 Oct 09 09:40:28 PM UTC 24 159380641 ps
T3124 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.2558707259 Oct 09 09:40:25 PM UTC 24 Oct 09 09:40:28 PM UTC 24 141068525 ps
T3125 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.782263821 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:28 PM UTC 24 42000926 ps
T3126 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.3897292630 Oct 09 09:40:25 PM UTC 24 Oct 09 09:40:28 PM UTC 24 208520973 ps
T3127 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.1426197554 Oct 09 09:40:25 PM UTC 24 Oct 09 09:40:28 PM UTC 24 211333476 ps
T3128 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.2663725758 Oct 09 09:40:25 PM UTC 24 Oct 09 09:40:28 PM UTC 24 163809641 ps
T3129 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.2648062268 Oct 09 09:40:25 PM UTC 24 Oct 09 09:40:28 PM UTC 24 144037670 ps
T3130 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.173536954 Oct 09 09:40:25 PM UTC 24 Oct 09 09:40:28 PM UTC 24 186671724 ps
T3131 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.1043658243 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:28 PM UTC 24 174058664 ps
T3132 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.1235000259 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:28 PM UTC 24 210043620 ps
T3133 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.4255861567 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:28 PM UTC 24 161002204 ps
T366 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.3008238012 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 328651896 ps
T3134 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.2755581310 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:28 PM UTC 24 187974697 ps
T3135 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.2778253648 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:28 PM UTC 24 190039797 ps
T3136 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.3291616003 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:29 PM UTC 24 164874676 ps
T454 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.3098862371 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 249055691 ps
T3137 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.611809900 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:29 PM UTC 24 32770303 ps
T3138 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.4047183707 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:29 PM UTC 24 244850733 ps
T3139 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.3100679026 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:29 PM UTC 24 220209994 ps
T3140 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.2834692788 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:29 PM UTC 24 209848202 ps
T3141 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.3890636412 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:29 PM UTC 24 419366582 ps
T3142 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.3687729110 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 210663400 ps
T3143 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.120722824 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:29 PM UTC 24 280236963 ps
T3144 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_enable.3430351686 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:29 PM UTC 24 34628637 ps
T3145 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.1410672963 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:29 PM UTC 24 154081651 ps
T3146 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.3880503289 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:29 PM UTC 24 150039759 ps
T3147 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.651280805 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:29 PM UTC 24 192362391 ps
T3148 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.2566848584 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:29 PM UTC 24 499207476 ps
T3149 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.1179196505 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:29 PM UTC 24 142757343 ps
T3150 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.2187512296 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:30 PM UTC 24 374632734 ps
T3151 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.3882110332 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:30 PM UTC 24 197740586 ps
T3152 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.2573630796 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:30 PM UTC 24 239318627 ps
T3153 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.1258085441 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:30 PM UTC 24 273787912 ps
T3154 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.3451491001 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:30 PM UTC 24 423112016 ps
T3155 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.3616592979 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:30 PM UTC 24 229282843 ps
T3156 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.4286066310 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:30 PM UTC 24 240215025 ps
T403 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.3758331519 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:30 PM UTC 24 571499902 ps
T3157 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.2300438369 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:30 PM UTC 24 295095919 ps
T3158 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.2875848447 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:31 PM UTC 24 924199569 ps
T3159 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.3441908097 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:31 PM UTC 24 1321584292 ps
T3160 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.1986578078 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:36 PM UTC 24 5972703861 ps
T3161 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.3052564373 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:37 PM UTC 24 5872376524 ps
T3162 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.2114355679 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:38 PM UTC 24 577189889 ps
T3163 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.1048449557 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:43 PM UTC 24 2396903904 ps
T3164 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.4259227060 Oct 09 09:39:26 PM UTC 24 Oct 09 09:40:44 PM UTC 24 45204562258 ps
T3165 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3184531153 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:46 PM UTC 24 13430872151 ps
T3166 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.1114388945 Oct 09 09:40:25 PM UTC 24 Oct 09 09:40:48 PM UTC 24 2628273508 ps
T3167 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.1962191130 Oct 09 09:40:27 PM UTC 24 Oct 09 09:40:49 PM UTC 24 3118206210 ps
T3168 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.2761128566 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:52 PM UTC 24 3626366543 ps
T3169 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.3957367200 Oct 09 09:40:26 PM UTC 24 Oct 09 09:40:54 PM UTC 24 1309718783 ps
T3170 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.606273823 Oct 09 09:40:26 PM UTC 24 Oct 09 09:41:02 PM UTC 24 24536902813 ps
T3171 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.1016223289 Oct 09 09:39:27 PM UTC 24 Oct 09 09:41:05 PM UTC 24 3996749397 ps
T3172 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.3271469960 Oct 09 09:39:27 PM UTC 24 Oct 09 09:41:06 PM UTC 24 9331671449 ps
T3173 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.2154505298 Oct 09 09:39:26 PM UTC 24 Oct 09 09:41:11 PM UTC 24 4143108295 ps
T3174 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.894529916 Oct 09 09:40:27 PM UTC 24 Oct 09 09:41:12 PM UTC 24 28180676318 ps
T3175 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.2423044085 Oct 09 09:40:26 PM UTC 24 Oct 09 09:41:13 PM UTC 24 20895039968 ps
T3176 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.2898855166 Oct 09 09:40:26 PM UTC 24 Oct 09 09:41:15 PM UTC 24 25859972097 ps
T3177 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.4033727030 Oct 09 09:39:27 PM UTC 24 Oct 09 09:41:22 PM UTC 24 4734204941 ps
T3178 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.377608446 Oct 09 09:40:27 PM UTC 24 Oct 09 09:41:22 PM UTC 24 8392907041 ps
T3179 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.2769586113 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 187463582 ps
T3180 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.2120691655 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:26 PM UTC 24 171243238 ps
T3181 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.2542697735 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 142589408 ps
T3182 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.2435438033 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 169752185 ps
T3183 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.3380792652 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 180995527 ps
T3184 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.3992417971 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 58465231 ps
T3185 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.3492238926 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 284222467 ps
T3186 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.1998566662 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 157300551 ps
T3187 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.764831707 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 200769355 ps
T3188 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.593679478 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 235928187 ps
T3189 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.3352599622 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 185659019 ps
T3190 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.1382312040 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:25 PM UTC 24 239958212 ps
T3191 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.2475088597 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:26 PM UTC 24 154732415 ps
T3192 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.4083389955 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:26 PM UTC 24 255194789 ps
T3193 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.3657617456 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:26 PM UTC 24 202783500 ps
T3194 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.2384299556 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:26 PM UTC 24 198596902 ps
T3195 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.1098372452 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:26 PM UTC 24 181574593 ps
T3196 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.2880670103 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:26 PM UTC 24 147068882 ps
T3197 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.4213504426 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:26 PM UTC 24 181286605 ps
T3198 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.3197450021 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:26 PM UTC 24 254660154 ps
T3199 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.2369429940 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:26 PM UTC 24 178051009 ps
T3200 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.3183552716 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:26 PM UTC 24 196652403 ps
T3201 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.3185115988 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 276824745 ps
T3202 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.1306747833 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:26 PM UTC 24 150796527 ps
T3203 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.1992579315 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 163954326 ps
T3204 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.1479895862 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:26 PM UTC 24 84477779 ps
T3205 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.476525027 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:26 PM UTC 24 210196571 ps
T484 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.2999127766 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 230125181 ps
T3206 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.1060677787 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 490380028 ps
T3207 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.1050512873 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 515890384 ps
T393 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.1599073431 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 492641525 ps
T456 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.375220911 Oct 09 09:41:25 PM UTC 24 Oct 09 09:41:27 PM UTC 24 375899965 ps
T452 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.1385694161 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:27 PM UTC 24 781595844 ps
T3208 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.2460516975 Oct 09 09:41:25 PM UTC 24 Oct 09 09:41:27 PM UTC 24 442776578 ps
T3209 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.3432238840 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:28 PM UTC 24 631599044 ps
T184 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.3458404115 Oct 09 09:41:24 PM UTC 24 Oct 09 09:41:28 PM UTC 24 658718440 ps
T3210 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.2449463910 Oct 09 09:41:23 PM UTC 24 Oct 09 09:41:45 PM UTC 24 2456314115 ps
T3211 /workspaces/repo/scratch/os_regression_2024_10_08/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.2974570069 Oct 09 09:40:27 PM UTC 24 Oct 09 09:41:49 PM UTC 24 3351402366 ps
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